Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study

A. Sprenger, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, in: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, Virtual Conference - Originally Frascati (Rome), Italy, n.d.

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Conference Paper | Accepted | English
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IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020
Conference Date
2020-10-19 – 2020-10-21
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Sprenger A, Sadeghi-Kohan S, Reimer JD, Hellebrand S. Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy.
Sprenger, A., Sadeghi-Kohan, S., Reimer, J. D., & Hellebrand, S. (n.d.). Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy.
@inproceedings{Sprenger_Sadeghi-Kohan_Reimer_Hellebrand, place={Virtual Conference - Originally Frascati (Rome), Italy}, title={Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study}, booktitle={IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020}, author={Sprenger, Alexander and Sadeghi-Kohan, Somayeh and Reimer, Jan Dennis and Hellebrand, Sybille} }
Sprenger, Alexander, Somayeh Sadeghi-Kohan, Jan Dennis Reimer, and Sybille Hellebrand. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy, n.d.
A. Sprenger, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study,” in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020.
Sprenger, Alexander, et al. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020.

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