7 Publications

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[7]
2020 | Conference Paper | LibreCat-ID: 19422
A. Sprenger, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study,” in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020.
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 19421
S. Holst et al., “Logic Fault Diagnosis of Hidden Delay Defects,” in IEEE International Test Conference (ITC’20), November 2020.
LibreCat
 
[5]
2019 | Misc | LibreCat-ID: 8112
M. U. Maaz, A. Sprenger, and S. Hellebrand, A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
LibreCat
 
[4]
2019 | Journal Article | LibreCat-ID: 8667
A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, vol. 28, no. 1, pp. 1–23, 2019.
LibreCat | DOI
 
[3]
2019 | Conference Paper | LibreCat-ID: 12918
M. U. Maaz, A. Sprenger, and S. Hellebrand, “A Hybrid Space Compactor for Adaptive X-Handling,” in 50th IEEE International Test Conference (ITC), Washington, DC, USA, 2019, pp. 1–8.
LibreCat
 
[2]
2018 | Misc | LibreCat-ID: 4576
A. Sprenger and S. Hellebrand, Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
LibreCat
 
[1]
2018 | Conference Paper | LibreCat-ID: 4575
A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,” in 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2018.
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7 Publications

Mark all

[7]
2020 | Conference Paper | LibreCat-ID: 19422
A. Sprenger, S. Sadeghi-Kohan, J. D. Reimer, and S. Hellebrand, “Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study,” in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020.
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 19421
S. Holst et al., “Logic Fault Diagnosis of Hidden Delay Defects,” in IEEE International Test Conference (ITC’20), November 2020.
LibreCat
 
[5]
2019 | Misc | LibreCat-ID: 8112
M. U. Maaz, A. Sprenger, and S. Hellebrand, A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
LibreCat
 
[4]
2019 | Journal Article | LibreCat-ID: 8667
A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, vol. 28, no. 1, pp. 1–23, 2019.
LibreCat | DOI
 
[3]
2019 | Conference Paper | LibreCat-ID: 12918
M. U. Maaz, A. Sprenger, and S. Hellebrand, “A Hybrid Space Compactor for Adaptive X-Handling,” in 50th IEEE International Test Conference (ITC), Washington, DC, USA, 2019, pp. 1–8.
LibreCat
 
[2]
2018 | Misc | LibreCat-ID: 4576
A. Sprenger and S. Hellebrand, Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
LibreCat
 
[1]
2018 | Conference Paper | LibreCat-ID: 4575
A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,” in 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2018.
LibreCat | DOI
 

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