8 Publications

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[8]
2023 | Dissertation | LibreCat-ID: 46482 | OA
Sprenger, Alexander. Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Universität Paderborn, 2023, doi:10.17619/UNIPB/1-1787.
LibreCat | DOI | Download (ext.)
 
[7]
2020 | Conference Paper | LibreCat-ID: 19422
Sprenger, Alexander, et al. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, 2020.
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 19421
Holst, Stefan, et al. “Logic Fault Diagnosis of Hidden Delay Defects.” IEEE International Test Conference (ITC’20), November 2020, 2020.
LibreCat
 
[5]
2019 | Misc | LibreCat-ID: 8112
Maaz, Mohammad Urf, et al. A Hybrid Space Compactor for Varying X-Rates. 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
LibreCat
 
[4]
2019 | Journal Article | LibreCat-ID: 8667
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, vol. 28, no. 1, World Scientific Publishing Company, 2019, pp. 1–23, doi:10.1142/s0218126619400012.
LibreCat | DOI
 
[3]
2019 | Conference Paper | LibreCat-ID: 12918
Maaz, Mohammad Urf, et al. “A Hybrid Space Compactor for Adaptive X-Handling.” 50th IEEE International Test Conference (ITC), IEEE, 2019, pp. 1–8.
LibreCat
 
[2]
2018 | Misc | LibreCat-ID: 4576
Sprenger, Alexander, and Sybille Hellebrand. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
LibreCat
 
[1]
2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, 2018, doi:10.1109/ddecs.2018.00020.
LibreCat | DOI
 

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8 Publications

Mark all

[8]
2023 | Dissertation | LibreCat-ID: 46482 | OA
Sprenger, Alexander. Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen. Universität Paderborn, 2023, doi:10.17619/UNIPB/1-1787.
LibreCat | DOI | Download (ext.)
 
[7]
2020 | Conference Paper | LibreCat-ID: 19422
Sprenger, Alexander, et al. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, 2020.
LibreCat
 
[6]
2020 | Conference Paper | LibreCat-ID: 19421
Holst, Stefan, et al. “Logic Fault Diagnosis of Hidden Delay Defects.” IEEE International Test Conference (ITC’20), November 2020, 2020.
LibreCat
 
[5]
2019 | Misc | LibreCat-ID: 8112
Maaz, Mohammad Urf, et al. A Hybrid Space Compactor for Varying X-Rates. 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
LibreCat
 
[4]
2019 | Journal Article | LibreCat-ID: 8667
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers, vol. 28, no. 1, World Scientific Publishing Company, 2019, pp. 1–23, doi:10.1142/s0218126619400012.
LibreCat | DOI
 
[3]
2019 | Conference Paper | LibreCat-ID: 12918
Maaz, Mohammad Urf, et al. “A Hybrid Space Compactor for Adaptive X-Handling.” 50th IEEE International Test Conference (ITC), IEEE, 2019, pp. 1–8.
LibreCat
 
[2]
2018 | Misc | LibreCat-ID: 4576
Sprenger, Alexander, and Sybille Hellebrand. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
LibreCat
 
[1]
2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, 2018, doi:10.1109/ddecs.2018.00020.
LibreCat | DOI
 

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