Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer
A. Awny, L. Möller, J. Junio, C. Scheytt, A. Thiede, IEEE JOURNAL OF SOLID-STATE CIRCUITS Vol.49 (2014) 452–470.
Download
No fulltext has been uploaded.
Journal Article
| English
Author
Abstract
A millimeter wave frequency mixed-signal design of a 1-tap half-rate look-ahead decision feedback equalizer for 80 Gb/s short-reach optical communication systems is presented. On-wafer tests are developed to determine the maximum operating bit rate of the equalizer. Results are also presented for intersymbol interference mitigation at 80 Gb/s for a 20 GHz bandwidth-limited channel. Further improvements on the architecture of the 80 Gb/s equalizer are discussed and used in the design and on-wafer measurement of a 110 Gb/s equalizer. The equalizers are designed in a 0.13 μm SiGe:C BiCMOS technology. The 80 and 110 Gb/s versions dissipate 4 and 5.75 W, respectively and occupy 2 and 2.56 mm 2 , respectively.
Publishing Year
Journal Title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume
Vol.49
Issue
No.2
Page
452-470
eISSN
LibreCat-ID
Cite this
Awny A, Möller L, Junio J, Scheytt C, Thiede A. Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer. IEEE JOURNAL OF SOLID-STATE CIRCUITS. 2014;Vol.49(No.2):452-470. doi:10.1109/JSSC.2013.2285385
Awny, A., Möller, L., Junio, J., Scheytt, C., & Thiede, A. (2014). Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer. IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol.49(No.2), 452–470. https://doi.org/10.1109/JSSC.2013.2285385
@article{Awny_Möller_Junio_Scheytt_Thiede_2014, title={Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer}, volume={Vol.49}, DOI={10.1109/JSSC.2013.2285385}, number={No.2}, journal={IEEE JOURNAL OF SOLID-STATE CIRCUITS}, author={Awny, Ahmed and Möller, Lothar and Junio, Josef and Scheytt, Christoph and Thiede, Andreas}, year={2014}, pages={452–470} }
Awny, Ahmed, Lothar Möller, Josef Junio, Christoph Scheytt, and Andreas Thiede. “Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer.” IEEE JOURNAL OF SOLID-STATE CIRCUITS Vol.49, no. No.2 (2014): 452–70. https://doi.org/10.1109/JSSC.2013.2285385.
A. Awny, L. Möller, J. Junio, C. Scheytt, and A. Thiede, “Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. Vol.49, no. No.2, pp. 452–470, 2014, doi: 10.1109/JSSC.2013.2285385.
Awny, Ahmed, et al. “Design and Measurement Techniques for an 80 Gb/s 1-Tap Decision Feedback Equalizer.” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. Vol.49, no. No.2, 2014, pp. 452–70, doi:10.1109/JSSC.2013.2285385.
Google Scholar