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264 Publications
2020 | Conference Paper | LibreCat-ID: 24027
Adelt, P., Koppelmann, B., Müller, W., & Scheytt, C. (2020). A Scalable Platform for QEMU Based Fault Effect Analysis for RISC-V Hardware Architectures. MBMV 2020 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop.
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2019 | Conference Paper | LibreCat-ID: 24058
Koppelmann, B., Adelt, P., Müller, W., & Scheytt, C. (2019). RISC-V Extensions for Bit Manipulation Instructions. 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). https://doi.org/10.1109/PATMOS.2019.8862170
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2019 | Conference Paper | LibreCat-ID: 24060
Adelt, P., Koppelmann, B., Müller, W., & Scheytt, C. (2019). Analyse sicherheitskritischer Software für RISC-V Prozessoren. MBMV 2019-22.Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2019).
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2019 | Conference Paper | LibreCat-ID: 24061
Adelt, P., Koppelmann, B., Müller, W., Scheytt, C., & Driessen, B. (2019). QEMU for Dynamic Memory Analysis of Security Sensitive Software. 2nd International Workshop on Embedded Software for Industrial IoT in Conjunction with DATE 2019, 32–34.
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2019 | Journal Article | LibreCat-ID: 24063
Adelt, P., Koppelmann, B., Müller, W., & Scheytt, C. (2019). QEMU Support for RISC-V: Current State and Future Releases. 2nd International Workshop on RISC-V Research Activities, (Presentation).
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2019 | Book (Editor) | LibreCat-ID: 53596
Bringmann, O., Ecker, W., Müller, W., & Müller-Gridschneder, D. (Eds.). (2019). Proceedings of the 2nd International Workshop on Embedded Software for Industrial IoT - ESIIT.
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2018 | Journal Article | LibreCat-ID: 24194
Adelt, P., Koppelmann, B., & Müller, W. (2018). Current and Future RISC-V Activities for Virtual Prototyping and Chip Design. International Workshop on RISC-V Research Activities, Presentation.
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2018 | Conference Paper | LibreCat-ID: 24196
Wu, L., Hussain, M. K., Abughannam, S., Müller, W., Scheytt, C., & Ecker, W. (2018). Analog fault simulation automation at schematic level with random sampling techniques. 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)) . https://doi.org/10.1109/DTIS.2018.8368549
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2018 | Book (Editor) | LibreCat-ID: 53595
Bringmann, O., Ecker, W., Müller, W., & Müller-Gridschneder, D. (Eds.). (2018). Proceedings of the 1st International Workshop on Embedded Software for Industrial IoT - ESIIT.
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2017 | Conference Paper | LibreCat-ID: 24220
Adelt, P., Koppelmann, B., Müller, W., Mueller-Gritschneder, D., Kleinjohann, B., & Scheytt, C. (2017). Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen. Tagungsband des Wissenschaftsforums Intelligente Technische Systeme. https://doi.org/10.17619/UNIPB/1-93
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2017 | Conference Paper | LibreCat-ID: 24223
Wu, L., Abughannam, S., Müller, W., Scheytt, C., & Ecker, W. (2017). SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study. 2nd Workshop on Resiliency in Embedded Electronic Systems (REES), 68.
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2017 | Conference Paper | LibreCat-ID: 24224
Adelt, P., Koppelmann, B., Müller, W., Kleinjohann, B., & Scheytt, C. (2017). ANALISA - A Tool for Static Instruction Set Analysis. Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation.
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2017 | Conference Paper | LibreCat-ID: 24225
Adelt, P., Koppelmann, B., Müller, W., Kleinjohann, B., & Scheytt, C. (2017). An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries. 2nd Workshop on Resiliency in Embedded Electronic Systems (REES) , 44.
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2016 | Conference Paper | LibreCat-ID: 24264
Adelt, P., Koppelmann, B., Müller, W., Becker, M., Kleinjohann, B., & Scheytt, C. (2016). Fast Dynamic Fault Injection for Virtual Microcontroller Platforms. Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC). https://doi.org/10.1109/VLSI-SoC.2016.7753545
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2016 | Conference Paper | LibreCat-ID: 24263
Abughannam, S., Wu, L., Müller, W., Scheytt, C., Ecker, W., & Novello, C. (2016). Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study. Analog 2016 - VDE.
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2015 | Conference Paper | LibreCat-ID: 24289
Müller, W., Wu, L., Scheytt, C., Becker, M., & Schoenberg, S. (2015). On the Correlation of HW Faults and SW Errors. In D. Mueller-Gritschneder, W. Müller, & S. Mitra (Eds.), Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014).
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2015 | Book (Editor) | LibreCat-ID: 53590
Müller-Gridschneder, D., Müller, W., & Mitra, S. (Eds.). (2015). Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems.
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2014 | Conference Paper | LibreCat-ID: 25145
Becker, M., Kuznik, C., & Müller, W. (2014). Virtual Platforms for Model-Based Design of Dependable Cyber-Physical System Software. 17th Euromicro Conference on Digital Systems Design (DSD).
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2014 | Conference Paper | LibreCat-ID: 25155
Becker, M., Kuznik, C., & Müller, W. (2014). Fault Effect Modeling in a Heterogeneous SystemC Virtual Platform Framework for Cyber-Physical Systems. ACM/IEEE 5th International Conference on Cyber-Physical Systems.
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2014 | Conference Paper | LibreCat-ID: 25161
Koppelmann, B., Becker, M., & Müller, W. (2014). Portierung der TriCore-Architektur auf QEMU. 17. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2014) .
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