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152 Publications
1996 | Conference Paper | LibreCat-ID: 13010
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996. https://doi.org/10.1109/test.1996.556962.
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1995 | Report | LibreCat-ID: 13026
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis Procedures for Self-Testable Controllers. University of Siegen, Germany, 1995.
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1995 | Report | LibreCat-ID: 13027
Hellebrand, Sybille, Hans-Joachim Wunderlich, F. Goncalves, and Joao Paulo Teixeira. Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis. University Siegen, Germany, 1995.
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1995 | Report | LibreCat-ID: 13028
Hellebrand, Sybille, Maik Herzog, and Hans-Joachim Wunderlich. Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing. University of Siegen, Germany, 1995.
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1995 | Misc | LibreCat-ID: 13086
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. Pattern Generation for a Deterministic BIST Scheme. 2nd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1995.
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1995 | Journal Article | LibreCat-ID: 13011
Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” IEEE Transactions on Computers 44, no. 2 (1995): 223–33. https://doi.org/10.1109/12.364534.
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1995 | Conference Paper | LibreCat-ID: 13012
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. “Pattern Generation for a Deterministic BIST Scheme.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), 88–94. San Jose, CA, USA: IEEE, 1995. https://doi.org/10.1109/iccad.1995.479997.
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1994 | Report | LibreCat-ID: 13024
Hellebrand, Sybille, Arne Juergensen, and Hans-Joachim Wunderlich. Synthesis for Off-Line Testability. University of Siegen, Germany, 1994.
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1994 | Report | LibreCat-ID: 13025
Hellebrand, Sybille, Arne Juergensen, Albrecht Stroele, and Hans-Joachim Wunderlich. Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time. University of Siegen, Germany, 1994.
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1994 | Misc | LibreCat-ID: 13083
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. Effiziente Testsatzkodierung Für Prüfpfad-Basierte Selbsttestarchitekturen. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
LibreCat
1994 | Misc | LibreCat-ID: 13084
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Ein Verfahren Zur Testfreundlichen Steuerwerkssynthese. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
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1994 | Misc | LibreCat-ID: 13085
Hellebrand, Sybille, Joao Paulo Teixeira, and Hans-Joachim Wunderlich. Synthesis for Testability - the ARCHIMEDES Approach. 1st IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1994.
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1994 | Conference Paper | LibreCat-ID: 13014
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures.” In ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 110–16. San Jose, CA, USA: IEEE, 1994. https://doi.org/10.1109/iccad.1994.629752.
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1994 | Conference Paper | LibreCat-ID: 13059
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthese Schneller Selbsttestbarer Steuerwerke.” In Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, 3–11. Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994.
LibreCat
1994 | Conference Paper | LibreCat-ID: 13013
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthesis of Self-Testable Controllers.” In European Design and Test Conference (EDAC/ETC/EUROASIC), 580–85. Paris, France, 1994. https://doi.org/10.1109/edtc.1994.326815.
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1993 | Misc | LibreCat-ID: 13081
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Effiziente Erzeugung Deterministischer Muster Im Selbsttest. 5th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Holzhau, Germany, 1993.
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1993 | Misc | LibreCat-ID: 13082
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis of Self-Testable Controllers. ARCHIMEDES Open Workshop on “Synthesis - Architectural Testability Support”, Montpellier, France, 1993.
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1993 | Conference Paper | LibreCat-ID: 13015
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. “An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’93). IEEE, 1993. https://doi.org/10.1109/iccad.1993.580117.
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1992 | Report | LibreCat-ID: 13023
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. Institut National Polytechnique de Grenoble, Grenoble, France, 1992.
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1992 | Misc | LibreCat-ID: 13076
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. IEEE Design for Testability Workshop, Vail, CO, USA, 1992.
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