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165 Publications
2001 | Journal Article | LibreCat-ID: 13068
S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters,” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 17, no. 3/4, pp. 341–349, 2001.
LibreCat
2000 | Misc | LibreCat-ID: 13094
S. Hellebrand and H.-J. Wunderlich, Hardwarepraktikum im Diplomstudiengang Informatik. Handbuch Lehre, Berlin, Raabe Verlag, 2000.
LibreCat
2000 | Misc | LibreCat-ID: 13095
S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. IEEE European Test Workshop, Cascais, Portugal, 2000.
LibreCat
2000 | Conference Paper | LibreCat-ID: 13005
S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters,” in IEEE International Test Conference (ITC’00), 2000, pp. 778–784, doi: 10.1109/test.2000.894274.
LibreCat
| DOI
1999 | Book | LibreCat-ID: 13065
S. Hellebrand, Selbsttestbare Steuerwerke - Strukturen und Syntheseverfahren. Verlag Dr. Kovac, Hamburg: Verlag Dr. Kovac, Hamburg, 1999.
LibreCat
1999 | Misc | LibreCat-ID: 13093
S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, Exploiting Symmetries to Speed Up Transparent BIST. 11th GI/ITG/GMM/IEEE Workshop, 1999.
LibreCat
1999 | Conference Paper | LibreCat-ID: 13006
S. Hellebrand, H.-J. Wunderlich, A. A. Ivaniuk, Y. V. Klimets, and V. N. Yarmolik, “Error Detecting Refreshment for Embedded DRAMs,” in 17th IEEE VLSI Test Symposium (VTS’99), 1999, pp. 384–390, doi: 10.1109/vtest.1999.766693.
LibreCat
| DOI
1999 | Conference Paper | LibreCat-ID: 13066
V. N. Yarmolik, I. V. Bykov, S. Hellebrand, and H.-J. Wunderlich, “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms,” 1999.
LibreCat
1999 | Conference Paper | LibreCat-ID: 13067
S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Symmetric Transparent BIST for RAMs,” in Design Automation and Test in Europe (DATE’99), 1999, pp. 702–707.
LibreCat
1998 | Report | LibreCat-ID: 13029
S. Hellebrand and H.-J. Wunderlich, Test und Synthese schneller eingebetteter Systeme. Universität Stuttgart, 1998.
LibreCat
1998 | Misc | LibreCat-ID: 13091
V. N. Yarmolik, S. Hellebrand, and H.-J. Wunderlich, Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.
LibreCat
1998 | Misc | LibreCat-ID: 13092
V. N. Yarmolik, S. Hellebrand, and H.-J. Wunderlich, Efficient Consistency Checking for Embedded Memories. 10th GI/ITG/GMM/IEEE Workshop, 1998.
LibreCat
1998 | Book Chapter | LibreCat-ID: 13060
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” in Mixed-Mode BIST Using Embedded Processors, In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998: Kluwer Academic Publishers, 1998.
LibreCat
1998 | Journal Article | LibreCat-ID: 13061
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” Journal of Electronic Testing Theory and Applications - JETTA, vol. 12, no. 1/2, pp. 127–138, 1998.
LibreCat
1998 | Journal Article | LibreCat-ID: 13064
S. Hellebrand, A. Hertwig, and H.-J. Wunderlich, “Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications,” IEEE Design and Test, vol. 15, no. 4, pp. 36–41, 1998.
LibreCat
1998 | Conference Paper | LibreCat-ID: 13007
A. Hertwig, S. Hellebrand, and H.-J. Wunderlich, “Fast Self-Recovering Controllers,” in 16th IEEE VLSI Test Symposium (VTS’98), 1998, pp. 296–302, doi: 10.1109/vtest.1998.670883.
LibreCat
| DOI
1998 | Conference Paper | LibreCat-ID: 13008
S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs,” in Design Automation and Test in Europe (DATE’98), 1998, pp. 173–179, doi: 10.1109/date.1998.655853.
LibreCat
| DOI
1998 | Conference Paper | LibreCat-ID: 13063
V. N. Yarmolik, Y. V. Klimets, S. Hellebrand, and H.-J. Wunderlich, “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression,” in Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 1998, pp. 27–33.
LibreCat
1997 | Misc | LibreCat-ID: 13089
K.-H. Tsai, S. Hellebrand, J. Rajski, and M. Marek-Sadowska, STARBIST: Scan Autocorrelated Random Pattern Generation. 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1997.
LibreCat
1997 | Misc | LibreCat-ID: 13090
A. Hertwig, S. Hellebrand, and H.-J. Wunderlich, Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 3rd IEEE International On-Line Testing Workshop, Crete, Greece, 1997.
LibreCat