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426 Publications


2022 | Dissertation | LibreCat-ID: 34041
Witschen, L. M. (2022). Frameworks and Methodologies for Search-based Approximate Logic Synthesis. https://doi.org/10.17619/UNIPB/1-1649
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2022 | Conference Paper | LibreCat-ID: 32342
Ahmed, Q. A., & Platzner, M. (2022). On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus.
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2022 | Bachelorsthesis | LibreCat-ID: 42839
Mehlich, F. (2022). An Evaluation of XCS on the OpenAI Gym. Paderborn University.
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2022 | Journal Article | LibreCat-ID: 33990
Jentzsch, F., Umuroglu, Y., Pappalardo, A., Blott, M., & Platzner, M. (2022). RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro, 42(6), 125–133. https://doi.org/10.1109/MM.2022.3202091
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2022 | Mastersthesis | LibreCat-ID: 45715
Tcheussi Ngayap, V. I. (2022). FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators.
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2022 | Mastersthesis | LibreCat-ID: 45914
Manjunatha, S. (2022). Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In  Predictive Maintenance. Paderborn University .
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2022 | Mastersthesis | LibreCat-ID: 45915
Kaur , P. (2022). Analysis of Time-Series Classification in Conditional Monitoring Systems.
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2021 | Dissertation | LibreCat-ID: 26746 | OA
Wiersema, T. (2021). Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University.
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2021 | Journal Article | LibreCat-ID: 29150
Lienen, C., & Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Transactions on Reconfigurable Technology and Systems, 1–20. https://doi.org/10.1145/3494571
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2021 | Mastersthesis | LibreCat-ID: 29151
Kashikar, C. (2021). A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University.
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2021 | Conference Paper | LibreCat-ID: 21610
Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2021). LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021 (pp. 27–32). Virtual: ACM. https://doi.org/10.1145/3453688.3461506
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2021 | Bachelorsthesis | LibreCat-ID: 22216
Rehnen, J. W. (2021). Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.
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2021 | Conference Paper | LibreCat-ID: 22309
Awais, M., & Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient Approximate Accelerators. Proceedings of IEEE Computer Society Annual Symposium on VLSI, 384–389.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
Brede, M. (2021). Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University.
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2021 | Conference Paper | LibreCat-ID: 21953
Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., & Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, & D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-030-79025-7_4
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2021 | Journal Article | LibreCat-ID: 30906
Boschmann, A., Neuhaus, D., Vogt, S., Kaltschmidt, C., Platzner, M., & Dosen, S. (2021). Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis. Journal of NeuroEngineering and Rehabilitation, 18(1), Article 25. https://doi.org/10.1186/s12984-021-00822-6
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2021 | Journal Article | LibreCat-ID: 30907
Rodriguez, A., Otero, A., Platzner, M., & De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers, 1–1. https://doi.org/10.1109/tc.2021.3107196
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2021 | Conference Paper | LibreCat-ID: 29137
Hansmeier, T. (2021). Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART ’21), Online. https://doi.org/10.1145/3468044.3468055
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2021 | Mastersthesis | LibreCat-ID: 29540
Sheikh, M. A. (2021). Design and Implementation of a ReconROS-based Obstacle Avoidance System. Paderborn University.
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2021 | Preprint | LibreCat-ID: 22764 | OA
Lienen, C., & Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. In arXiv:2107.07208.
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2021 | Conference Paper | LibreCat-ID: 21813
Hansmeier, T., & Platzner, M. (2021). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1639–1647. https://doi.org/10.1145/3449726.3463159
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2021 | Journal Article | LibreCat-ID: 27841
Jakobs, M.-C., Pauck, F., Platzner, M., Wehrheim, H., & Wiersema, T. (2021). Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access. https://doi.org/10.1109/ACCESS.2021.3131213
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2021 | Conference Paper | LibreCat-ID: 29138
Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC). https://doi.org/10.1109/vlsi-soc53125.2021.9606974
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2021 | Conference Paper | LibreCat-ID: 20681 | OA
Ahmed, Q. A., Wiersema, T., & Platzner, M. (2021). Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France. https://doi.org/10.23919/DATE51398.2021.9474026
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2021 | Conference Paper | LibreCat-ID: 30909
Clausing, L. (2021). ReconOS64: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. https://doi.org/10.1145/3468044.3468056
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2021 | Conference Paper | LibreCat-ID: 30908
Ghasemzadeh Mohammadi, H., Jentzsch, F., Kuschel, M., Arshad, R., Rautmare, S., Manjunatha, S., Platzner, M., Boschmann, A., & Schollbach, D. (2021). FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. Machine Learning and Principles and Practice of Knowledge Discovery in Databases. https://doi.org/10.1007/978-3-030-93736-2_27
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2020 | Conference Paper | LibreCat-ID: 3583
Guetttatfi, Z., Kaufmann, P., & Platzner, M. (2020). Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC).
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar, K. (2020). Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke, L.-S. (2020). Evaluation of a ReconOS-ROS Combination based on a Video Processing Application.
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2020 | Conference Paper | LibreCat-ID: 21584
Gatica, C. P., & Platzner, M. (2020). Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-59084-3_9
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2020 | Journal Article | LibreCat-ID: 17358
Witschen, L. M., Wiersema, T., & Platzner, M. (2020). Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems, 28(9), 2084–2088. https://doi.org/10.1109/TVLSI.2020.3008061
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2020 | Journal Article | LibreCat-ID: 17369
Ho, N., Kaufmann, P., & Platzner, M. (2020). Evolution of Application-Specific Cache Mappings. International Journal of Hybrid Intelligent Systems.
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2020 | Preprint | LibreCat-ID: 20748
Witschen, L. M., Wiersema, T., & Platzner, M. (n.d.). Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).
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2020 | Conference Paper | LibreCat-ID: 20750
Lienen, C., Platzner, M., & Rinner, B. (2020). ReconROS: Flexible Hardware Acceleration for ROS2 Applications. In Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT).
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele, S. (2020). Implementing Machine Learning Functions as PYNQ FPGA Overlays.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath, V. (2020). Extension and Evaluation of Python-based High-Level Synthesis Tool Flows.
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2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1756–1764. https://doi.org/10.1145/3377929.3398106
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2020 | Journal Article | LibreCat-ID: 17092
Anwer, J., Meisner, S., & Platzner, M. (2020). Dynamic Reliability Management for FPGA-Based Systems. International Journal of Reconfigurable Computing, 1–19. https://doi.org/10.1155/2020/2808710
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2020 | Journal Article | LibreCat-ID: 15836
Bellman, K., Dutt, N., Esterle, L., Herkersdorf, A., Jantsch, A., Landauer, C., … Tammemäe, K. (2020). Self-aware Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems, Accepted for Publication, 1–24.
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2020 | Conference Paper | LibreCat-ID: 16213
Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2020). A Hybrid Synthesis Methodology for Approximate Circuits. In Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020 (pp. 421–426). Beijing, China: ACM. https://doi.org/10.1145/3386263.3406952
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2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM). https://doi.org/10.1145/3377929.3389968
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2020 | Conference Paper | LibreCat-ID: 20838
Lösch, A., & Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). https://doi.org/10.1109/ipdpsw50202.2020.00012
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch, F. P. (2020). Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture.
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2019 | Journal Article | LibreCat-ID: 3585
Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., & Platzner, M. (2019). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Microelectronics Reliability, 99, 277–290. https://doi.org/10.1016/j.microrel.2019.04.003
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2019 | Preprint | LibreCat-ID: 16853
Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., & Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
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2019 | Conference Paper | LibreCat-ID: 10577
Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., & Platzner, M. (2019). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19. New York, NY, USA: ACM. https://doi.org/10.1145/3299874.3317998
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2019 | Journal Article | LibreCat-ID: 11950
Boschmann, A., Agne, A., Thombansen, G., Witschen, L. M., Kraus, F., & Platzner, M. (2019). Zynq-based acceleration of robust high density myoelectric signal processing. Journal of Parallel and Distributed Computing, 123, 77–89. https://doi.org/10.1016/j.jpdc.2018.07.004
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2019 | Journal Article | LibreCat-ID: 12967
Hansmeier, T., Platzner, M., Pantho, M. J. H., & Andrews, D. (2019). An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems, 91(11), 1259–1272. https://doi.org/10.1007/s11265-018-1435-y
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2019 | Conference Paper | LibreCat-ID: 15422
Ho, N., Kaufmann, P., & Platzner, M. (2019). Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In World Congress on Nature and Biologically Inspired Computing (NaBIC). Springer.
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2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar, S. (2019). Incremental learning with Support Vector Machine on embedded platforms.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta, J. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Recon􏰃gurable System-on-Chip.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.
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2019 | Conference Paper | LibreCat-ID: 31067
Guettatfi, Z., Platzner, M., Kermia, O., & Khouas, A. (2019). An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). https://doi.org/10.1109/ipdpsw.2019.00027
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2019 | Conference Paper | LibreCat-ID: 9913 | OA
Ahmed, Q. A., Wiersema, T., & Platzner, M. (2019). Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In C. Hochberger, B. Nelson, A. Koch, R. Woods, & P. Diniz (Eds.), Applied Reconfigurable Computing (Vol. 11444, pp. 127–136). Springer International Publishing. https://doi.org/10.1007/978-3-030-17227-5_10
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2019 | Mastersthesis | LibreCat-ID: 15874 | OA
Lienen, C. (n.d.). Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
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2019 | Journal Article | LibreCat-ID: 12871 | OA
Platzner, M., & Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum. https://doi.org/10.1007/s00287-019-01187-w
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2019 | Mastersthesis | LibreCat-ID: 52478
Mehta, J. D. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip.
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch, A., Wiens, A., & Platzner, M. (2018). Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In Proceedings of the International Conference on Architecture of Computing Systems (ARCS) (Vol. 10793, pp. 73–84). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-77610-1_6
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer, J.-P. (2018). Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce, M. (2018). Evaluation of OpenCL-based Compilation for FPGAs. Universität Paderborn.
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier, T., Platzner, M., & Andrews, D. (2018). An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications (Vol. 10824, pp. 153–165). Santorini, Greece: Springer International Publishing. https://doi.org/10.1007/978-3-319-78890-6_13
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2018 | Preprint | LibreCat-ID: 3586
Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., & Platzner, M. (n.d.). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
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2018 | Dissertation | LibreCat-ID: 3720
Ho, N. (2018). FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn. https://doi.org/10.17619/UNIPB/1-376
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2018 | Preprint | LibreCat-ID: 1165
Witschen, L. M., Wiersema, T., & Platzner, M. (2018). Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018).
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch, A., & Platzner, M. (2018). A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Milan, Italy: IEEE. https://doi.org/10.1109/asap.2018.8445098
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2018 | Conference Paper | LibreCat-ID: 10598
Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2018). An MCTS-based Framework for Synthesis of Approximate Circuits. In 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (pp. 219–224). https://doi.org/10.1109/VLSI-SoC.2018.8645026
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing, L. (2018). Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch, F. P. (2018). Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn.
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2018 | Journal Article | LibreCat-ID: 12965
Ghribi, I., Abdallah, R. B., Khalgui, M., Li, Z., Alnowibet, K., & Platzner, M. (2018). R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access, 14078–14092. https://doi.org/10.1109/access.2018.2799852
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2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier, T. (2017). An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen, L. M. (2017). A Framework for the Synthesis of Approximate Circuits. Universität Paderborn.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr, C. (2017). OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn.
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2017 | Journal Article | LibreCat-ID: 9919
Shen, C., Kaufmann, P., & Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES), 94, 287–299. https://doi.org/10.1016/j.ijepes.2017.07.007
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2017 | Conference Paper | LibreCat-ID: 65
Lösch, A., & Platzner, M. (2017). reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). https://doi.org/10.1109/ASAP.2017.7995272
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2017 | Journal Article | LibreCat-ID: 68
Isenberg, T., Platzner, M., Wehrheim, H., & Wiersema, T. (2017). Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems, (4), 61:1--61:23. https://doi.org/10.1145/3054743
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2017 | Journal Article | LibreCat-ID: 10600
H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O., … Wang, Y. (2017). The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems. https://doi.org/10.1145/2996468
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2017 | Journal Article | LibreCat-ID: 10601
F. DeMara, R., Platzner, M., & Ottavi, M. (2017). Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing. https://doi.org/10.1109/TETC.2016.2641599
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2017 | Journal Article | LibreCat-ID: 10611
Anwer, J., & Platzner, M. (2017). Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems, 160–172. https://doi.org/10.1016/j.micpro.2017.06.002
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2017 | Bachelorsthesis | LibreCat-ID: 10613
Kaltschmidt, C. (2017). An AR-based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University.
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2017 | Conference Paper | LibreCat-ID: 10630
Boschmann, A., Thombansen, G., Witschen, L. M., Wiens, A., & Platzner, M. (2017). A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In Design, Automation and Test in Europe (DATE). https://doi.org/10.23919/DATE.2017.7927137
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2017 | Mastersthesis | LibreCat-ID: 10666
Riaz, U. (2017). Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University.
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2017 | Conference Paper | LibreCat-ID: 10672
Ho, N., Ashraf, I. I., Kaufmann, P., & Platzner, M. (2017). Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In Proc. Design, Automation and Test in Europe Conf. (DATE). https://doi.org/10.23919/DATE.2017.7927096
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2017 | Conference Paper | LibreCat-ID: 10676
Ho, N., Kaufmann, P., & Platzner, M. (2017). Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In 2017 International Conference on Field Programmable Technology (ICFPT) (pp. 215–218). https://doi.org/10.1109/FPT.2017.8280144
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2017 | Journal Article | LibreCat-ID: 10692
Shen, C., Kaufmann, P., & Braun, M. (2017). Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES).
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2017 | Mastersthesis | LibreCat-ID: 10708
Dietrich, A. (2017). Reconfigurable Cryptographic Services. Paderborn University.
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2017 | Journal Article | LibreCat-ID: 10740
Shen, C., Kaufmann, P., & Braun, M. (2017). Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering, 19pp. https://doi.org/10.1049/joe.2017.0032
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2017 | Book | LibreCat-ID: 10759
Squillero, G., Burelli, P., M. Mora, A., Agapitos, A., S. Bush, W., Cagnoni, S., … Zhang (editors), M. (2017). Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer.
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2017 | Conference Paper | LibreCat-ID: 10760
Kaufmann, P., & Kalkreuth, R. (2017). Parametrizing Cartesian Genetic Programming: An Empirical Study. In KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing. https://doi.org/10.1007/978-3-319-67190-1_26
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2017 | Conference Paper | LibreCat-ID: 10761
Kaufmann, P., Ho, N., & Platzner, M. (2017). Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In Adaptive Hardware and Systems (AHS). IEEE. https://doi.org/10.1109/AHS.2017.8046380
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2017 | Conference Paper | LibreCat-ID: 10762
Kaufmann, P., & Kalkreuth, R. (2017). An Empirical Study on the Parametrization of Cartesian Genetic Programming. In Genetic and Evolutionary Computation (GECCO), Compendium. ACM. https://doi.org/10.1145/3067695.3075980
LibreCat | DOI
 

2017 | Conference Paper | LibreCat-ID: 10780
Guettatfi, Z., Hübner, P., Platzner, M., & Rinner, B. (2017). Computational self-awareness as design approach for visual sensor nodes. In 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (pp. 1–8). https://doi.org/10.1109/ReCoSoC.2017.8016147
LibreCat | DOI
 

2017 | Conference Paper | LibreCat-ID: 14893
Ghribi, I., Abdallah, R. B., Khalgui, M., & Platzner, M. (2017). I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In Communications in Computer and Information Science. Cham: Springer . https://doi.org/10.1007/978-3-319-62569-0_8
LibreCat | DOI
 

2016 | Journal Article | LibreCat-ID: 222
Wiersema, T., Bockhorn, A., & Platzner, M. (2016). An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip. Computers & Electrical Engineering, 112--122. https://doi.org/10.1016/j.compeleceng.2016.04.005
LibreCat | Files available | DOI
 

2016 | Conference Paper | LibreCat-ID: 5812
Boschmann, A., Agne, A., Witschen, L., Thombansen, G., Kraus, F., & Platzner, M. (2016). FPGA-based acceleration of high density myoelectric signal processing. In 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE. https://doi.org/10.1109/reconfig.2015.7393312
LibreCat | DOI
 

2016 | Mastersthesis | LibreCat-ID: 10612
Cedric Mertens, J. (2016). Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion. Paderborn University.
LibreCat
 

2016 | Mastersthesis | LibreCat-ID: 10616
Nassery, A. S. (2016). Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University.
LibreCat
 

2016 | Mastersthesis | LibreCat-ID: 10617
Amin, O. (2016). Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University.
LibreCat
 

2016 | Conference Paper | LibreCat-ID: 10622
Anwer, J., & Platzner, M. (2016). Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs. In Euromicro Conference on Digital System Design (DSD). https://doi.org/10.1109/DSD.2016.35
LibreCat | DOI
 

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