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369 Publications


2011 | Conference Paper | LibreCat-ID: 2194
Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.
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2011 | Book Chapter | LibreCat-ID: 2202
Plessl, Christian, and Marco Platzner. “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors.” Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, edited by Mohamed Khalgui and Hans-Michael Hanisch, IGI Global, 2011, doi:10.4018/978-1-60960-086-0.
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2011 | Conference Paper | LibreCat-ID: 666
Drzevitzky, Stephanie, and Marco Platzner. “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach.” Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65, doi:10.1109/ReCoSoC.2011.5981499.
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2010 | Book Chapter | LibreCat-ID: 10704
Lübbers, Enno, and Marco Platzner. “ReconOS: An Operating System for Dynamically Reconfigurable Hardware.” Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, edited by Marco Platzner et al., Springer-Verlag GmbH, 2010, pp. 269–90, doi:10.1007/978-90-481-3485-4_13.
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2010 | Conference Paper | LibreCat-ID: 13640
Giefers, Heiner, and Marco Platzner. “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier.” Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2010.
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2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks, Toomas P., et al., editors. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
Breitlauch, Daniel. Evolvable Cache Controller. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10697
Knieper, Tobias. Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
Niekamp, Manuel. Transparente Hardwarebeschleunigung Durch Shared Library Interposing. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
Runde, Bodo. A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 13641
Schäfer, Wilhelm, et al. “Engineering Self-Coordinating Software Intensive Systems.” Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–24.
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2010 | Conference Paper | LibreCat-ID: 2216
Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2010, pp. 67–72, doi:10.1109/ReConFig.2010.19.
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2010 | Conference Paper | LibreCat-ID: 2223
Lübbers, Enno, et al. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–31.
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2010 | Conference Paper | LibreCat-ID: 2228
Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.
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2010 | Journal Article | LibreCat-ID: 10605
Drzevitzky, Stephanie, et al. “Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification.” International Journal of Reconfigurable Computing, vol. 2010, Hindawi Publishing Corporation, 2010, doi:10.1155/2010/180242.
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2010 | Mastersthesis | LibreCat-ID: 10629
Boschmann, Alexander. EMG-Basierte Ganganalyse. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 10686
Kaufmann, Paul, et al. “A Novel Hybrid Evolutionary Strategy and Its Periodization with Multi-Objective Genetic Optimizers.” IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), IEEE, 2010, pp. 541–48.
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2010 | Book (Editor) | LibreCat-ID: 10763
Platzner, Marco, et al., editors. Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH, 2010, doi:10.1007/978-90-481-3485-4.
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2010 | Conference Paper | LibreCat-ID: 13642
Giefers, Heiner, and Marco Platzner. “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics.” Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 2224
Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–50.
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2010 | Conference Paper | LibreCat-ID: 10776
Khatir, Mehrdad, et al. “Sub-Threshold Charge Recovery Circuits.” Computer Design (ICCD), 2010 IEEE International Conference On, IEEE, 2010, pp. 138–44, doi:10.1109/ICCD.2010.5647815.
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2010 | Bachelorsthesis | LibreCat-ID: 10649
Dridger, Denis. Soft Microprocessors with Tightly Coupled Application-Specific Coprocessors. Paderborn University, 2010.
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2010 | Journal Article | LibreCat-ID: 10694
Kebschull, Udo, et al. “Selected Papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (Editorial).” IET Computers Digital Techniques, vol. 4, no. 3, 2010, pp. 157–58, doi:10.1049/iet-cdt.2010.9044.
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2010 | Conference Paper | LibreCat-ID: 10699
Knieper, Tobias, et al. “Coping with Resource Fluctuations: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 6274, Springer, 2010, pp. 250–61.
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2010 | Mastersthesis | LibreCat-ID: 10752
Wiersema, Tobias. Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 2206
Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.” Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341.
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2010 | Conference Paper | LibreCat-ID: 2220
Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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2010 | Conference Paper | LibreCat-ID: 10683
Kaufmann, Paul, et al. “Fluctuating EMG Signals: Investigating Long-Term Effects of Pattern Matching Algorithms.” International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), IEEE, 2010, pp. 6357–60.
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2010 | Mastersthesis | LibreCat-ID: 10710
Meiche, Robert. FPGA/CPU Multicore-Plattform Für ReconOS/ECos. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10614
Agne, Andreas. Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University, 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10657
Graf, Tobias. Parallelization of the UCT Algorithm on HPC-Clusters. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 2226
Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798.
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2009 | Conference Paper | LibreCat-ID: 10639
Boschmann, Alexander, et al. “Towards Multi-Movement Hand Prostheses: Combining Adaptive Classification with High Precision Sockets.” Proc. Technically Assisted Rehabilitation (TAR), 2009.
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2009 | Conference Paper | LibreCat-ID: 13638
Happe, Markus, et al. “An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning.” Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), IEEE, 2009, doi:10.1109/fpt.2009.5377645.
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2009 | Conference Paper | LibreCat-ID: 13634
Giefers, Heiner, and Marco Platzner. “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh.” Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
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2009 | Conference Paper | LibreCat-ID: 13639
Drzevitzky, Stephanie, et al. “Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 2350
Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.
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2009 | Conference Paper | LibreCat-ID: 2261
Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44.
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2009 | Mastersthesis | LibreCat-ID: 10749
Warkentin, Alexander. Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units. Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 13635
Giefers, Heiner, and Marco Platzner. “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores.” Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 2262
Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.
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2009 | Mastersthesis | LibreCat-ID: 10702
Kostin, Alexander. Evolvable Robot Controller. Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 13636
Lübbers, Enno, and Marco Platzner. “Cooperative Multithreading in Dynamically Reconfigurable Systems.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 2263
Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22.
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2009 | Conference Paper | LibreCat-ID: 10777
Ghasemzadeh Mohammadi, Hassan, et al. “Signature Self Checking (SSC): A Low-Cost Reliable Control Logic for Pipelined Microprocessors.” Dependable Computing (PRDC), 2009 IEEE Pacific Rim International Symposium On, IEEE, 2009, pp. 252–55, doi:10.1109/PRDC.2009.69.
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2009 | Journal Article | LibreCat-ID: 10703
Lübbers, Enno, and Marco Platzner. “ReconOS: Multithreaded Programming for Reconfigurable Computers.” ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, 2009, pp. 8:1-8:33, doi:10.1145/1596532.1596540.
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2009 | Mastersthesis | LibreCat-ID: 10746
Tofall, Martin. Compiler for a Custom Instruction Set CPU. Paderborn University, 2009.
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2009 | Bachelorsthesis | LibreCat-ID: 10753
Wildenhain, Benedikt. Implementierung von Kryptographie-Hardwarebeschleunigern Für Das HW/SW-Betriebssystem ReconOS. Paderborn University, 2009.
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2009 | Conference Paper | LibreCat-ID: 13632
Happe, Markus, et al. “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms.” Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Springer, 2009.
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2009 | Conference Paper | LibreCat-ID: 13637
Giefers, Heiner, and Marco Platzner. “Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh.” Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , IEEE, 2009.
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2009 | Conference Paper | LibreCat-ID: 2238
Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.
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2008 | Conference Paper | LibreCat-ID: 10778
Ghasemzadeh Mohammadi, Hassan, et al. “A Cost-Effective Error Detection and Roll-Back Recovery Technique for Embedded Microprocessor Control Logic.” 2008 International Conference on Microelectronics, IEEE, 2008, pp. 444–47, doi:10.1109/ICM.2008.5393497.
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2008 | Bachelorsthesis | LibreCat-ID: 10641
Breitlauch, Daniel. Selbstoptimierender Cache-Kontroller. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10653
Glette, Kyrre, et al. “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control.” IEEE Adaptive Hardware and Systems (AHS), IEEE, 2008, pp. 32–39.
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2008 | Conference Paper | LibreCat-ID: 10691
Kaufmann, Paul, and Marco Platzner. “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming.” Genetic and Evolutionary Computation (GECCO), ACM Press, 2008, pp. 1219–26.
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2008 | Bachelorsthesis | LibreCat-ID: 10696
Knieper, Tobias. Implementierung Und Bewertung Des Multikriteriellen Optimierungsverfahrens IBEA Für Den Automatisierten Schaltungsentwurf. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10628
Boschmann, Alexander. Aufbau Und Experimentelle Bewertung Eines Systems Zur Langzeitklassifikation von EMG-Signalen. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10698
Knieper, Tobias, et al. “On Robust Evolution of Digital Hardware.” Biologically Inspired Collaborative Computing (BICC), vol. 268, Springer, 2008, pp. 2313–222.
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2008 | Bachelorsthesis | LibreCat-ID: 10718
Niklas, Jörg. Eine Monitoring- Und Debugging-Infrastruktur Für Hybride HW/SW-Systeme. Paderborn University, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10751
Westerheide, Nico. Design and Evaluation of MicroBlaze Multi-Core Architectures. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 13630
Lübbers, Enno, and Marco Platzner. “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems.” Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008.
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2008 | Bachelorsthesis | LibreCat-ID: 10644
Ceylan, Toni, and Coni Yalcin. Verteilte Simulation von Mobilen Robotern Mit EyeSim. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 10656
Glette, Kyrre, et al. “A Comparison of Evolvable Hardware Architectures for Classification Tasks.” IEEE Intl. Conf. on Evolvable Systems (ICES), vol. 5216, Springer, 2008, pp. 22–33.
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2008 | Bachelorsthesis | LibreCat-ID: 10721
Östermann, Marco. Raytracing on a Custom Instruction Set CPU. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 13629
Giefers, Heiner, and Marco Platzner. “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays.” Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), IEEE, 2008.
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2008 | Conference Paper | LibreCat-ID: 13631
Lübbers, Enno, and Marco Platzner. “A Portable Abstraction Layer for Hardware Threads.” Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2008, doi:10.1109/fpl.2008.4629901.
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2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
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2008 | Preprint | LibreCat-ID: 10690
Torresen, Jim, et al. Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS). 2008.
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2008 | Mastersthesis | LibreCat-ID: 10669
Happe, Markus. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008.
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2008 | Conference Paper | LibreCat-ID: 2358
Beisel, Tobias, et al. “A Method for OSEM PET Reconstruction on Parallel Architectures Using STIR.” IEEE Nuclear Science Symposium Conference Record (NSS), IEEE, 2008, pp. 4161–68, doi:10.1109/NSSMIC.2008.4774198.
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2008 | Conference Paper | LibreCat-ID: 2365
Platzner, Marco, et al. “The GOmputer: Accelerating GO with FPGAs.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
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2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
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2007 | Journal Article | LibreCat-ID: 10646
Danne, Klaus, et al. “Server-Based Execution of Periodic Tasks on Dynamically Reconfigurable Hardware.” IET Computers Digital Techniques, vol. 1, no. 4, 2007, pp. 295–302, doi:10.1049/iet-cdt:20060186.
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2007 | Conference Paper | LibreCat-ID: 10689
Kaufmann, Paul, and Marco Platzner. “Toward Self-Adaptive Embedded Systems: Multi-Objective Hardware Evolution.” Architecture of Computing Systems (ARCS), vol. 4415, Springer, 2007, pp. 199–208.
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2007 | Bachelorsthesis | LibreCat-ID: 10709
Meiche, Robert. VHDL-Implementierung Eines Clustering-Verfahrens Für Multikriterielle Optimierungsalgorithmen. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10728
Reisch, Waldemar. Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS. Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 10735
Schumacher, Tobias, et al. “Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster.” Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), vol. 15, IOS Press, 2007, pp. 749–56.
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2007 | Conference Paper | LibreCat-ID: 6508
Kaufmann, Paul, and Marco Platzner. “MOVES: A Modular Framework for Hardware Evolution.” Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), IEEE, 2007, pp. 447–54, doi:10.1109/ahs.2007.73.
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2007 | Mastersthesis | LibreCat-ID: 10623
Beisel, Tobias. Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10647
Defo, Bertrand. A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
Rethmeier, Eike. Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem. Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 13627
Giefers, Heiner, and Marco Platzner. “A Many-Core Implementation Based on the Reconfigurable Mesh Model.” Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007, doi:10.1109/fpl.2007.4380623.
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2007 | Bachelorsthesis | LibreCat-ID: 10643
Ceylan, Toni, and Coni Yalcin. Distributed Simulation of Mobile Robots Using EyeSim. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
Döhre, Sven. Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme. Paderborn University, 2007.
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2007 | Conference Paper | LibreCat-ID: 13628
Lübbers, Enno, and Marco Platzner. “ReconOS: An RTOS Supporting Hard-and Software Threads.” Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2007, doi:10.1109/fpl.2007.4380686.
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2007 | Journal Article | LibreCat-ID: 10625
Bergmann, Neil, et al. “Dynamically Reconfigurable Architectures (Editorial).” {EURASIP} Journal on Embedded Systems, vol. 2007, Springer Science+Business Media, 2007, pp. 1–2, doi:10.1155/2007/28405.
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2006 | Bachelorsthesis | LibreCat-ID: 10716
Mühlenbernd, Roland. FPGA-Implementierung Eines Server-Basierten Schedulers Für Periodische Hardwaretasks. Paderborn University, 2006.
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2006 | Conference Paper | LibreCat-ID: 13626
Danne, Klaus, and Marco Platzner. “Partitioned Scheduling of Periodic Real-Time Tasks onto Reconfigurable Hardware.” Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), IEEE CS Press, 2006.
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2006 | Conference Paper | LibreCat-ID: 2401
Plessl, Christian, et al. “Optimal Temporal Partitioning Based on Slowdown and Retiming.” Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–48, doi:10.1109/FPT.2006.270344.
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2006 | Conference Paper | LibreCat-ID: 13624
Danne, Klaus, et al. “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-Time Conditions.” Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2006.
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2006 | Conference Paper | LibreCat-ID: 10688
Kaufmann, Paul, and Marco Platzner. “Multi-Objective Intrinsic Hardware Evolution.” Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
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2006 | Conference Paper | LibreCat-ID: 13625
Danne, Klaus, and Marco Platzner. “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices.” In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
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2005 | Conference Paper | LibreCat-ID: 13621
Danne, Klaus, and Marco Platzner. “Periodic Real-Time Scheduling for FPGA Computers.” Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005, doi:10.1109/wises.2005.1438720.
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2005 | Journal Article | LibreCat-ID: 2412
Enzler, Rolf, et al. “System-Level Performance Evaluation of Reconfigurable Processors.” Microprocessors and Microsystems, vol. 29, no. 2–3, Elsevier, 2005, pp. 63–73, doi:10.1016/j.micpro.2004.06.004.
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2005 | Conference Paper | LibreCat-ID: 13622
Danne, Klaus, and Marco Platzner. “Memory-Demanding Periodic Real-Time Applications on FPGA Computers.” Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS), 2005.
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2005 | Conference Paper | LibreCat-ID: 13623
Danne, Klaus, and Marco Platzner. “A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware.” Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), IEEE CS Press, 2005, doi:10.1109/fpl.2005.1515787.
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2005 | Conference Paper | LibreCat-ID: 2411
Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–18, doi:10.1109/ASAP.2005.69.
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2004 | Journal Article | LibreCat-ID: 10742
Steiger, Christoph, et al. “Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks.” {IEEE} Transactions on Computers, vol. 53, no. 11, 2004, pp. 1393–407, doi:10.1109/tc.2004.99.
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2004 | Conference Paper | LibreCat-ID: 13619
Walder, Hebert, et al. “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems.” Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004.
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2004 | Conference Paper | LibreCat-ID: 2415
Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
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