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427 Publications
2012 | Misc | LibreCat-ID: 13462
P. Lewis, M. Platzner, and X. Yao, An outlook for self-awareness in computing systems. Awareness Magazine, 2012.
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2012 | Conference Paper | LibreCat-ID: 2106
B. Meyer, J. Schumacher, C. Plessl, and J. Förstner, “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2012, pp. 189–196, doi: 10.1109/FPL.2012.6339370.
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2012 | Journal Article | LibreCat-ID: 2108
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi: 10.1016/j.micpro.2011.04.002.
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2012 | Conference Paper | LibreCat-ID: 615
M. Happe, H. Hangmann, A. Agne, and C. Plessl, “Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators,” in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416745.
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2012 | Conference Paper | LibreCat-ID: 591
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.
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2012 | Conference Paper | LibreCat-ID: 609
M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
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2012 | Conference Paper | LibreCat-ID: 567
P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.
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2012 | Conference Paper | LibreCat-ID: 612
C. Rüthing, M. Happe, A. Agne, and C. Plessl, “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2012, pp. 559–562, doi: 10.1109/FPL.2012.6339370.
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2012 | Conference Paper | LibreCat-ID: 2180
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux,” 2012.
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2012 | Journal Article | LibreCat-ID: 2177
M. Grad and C. Plessl, “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors,” Int. Journal of Reconfigurable Computing (IJRC), 2012, doi: 10.1155/2012/418315.
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2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
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2011 | Book Chapter | LibreCat-ID: 2202
C. Plessl and M. Platzner, “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors,” in Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, M. Khalgui and H.-M. Hanisch, Eds. Hershey, PA, USA: IGI Global, 2011.
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2011 | Conference Paper | LibreCat-ID: 666
S. Drzevitzky and M. Platzner, “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach,” in Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65.
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2011 | Conference Paper | LibreCat-ID: 10637
A. Boschmann, P. Kaufmann, and M. Platzner, “Accurate gait phase detection using surface electromyographic signals and support vector machines,” in Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
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2011 | Conference Paper | LibreCat-ID: 10638
A. Boschmann, M. Platzner, M. Robrecht, M. Hahn, and M. Winkler, “Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems,” in Proc. MyoElectric Controls Symposium (MEC), 2011.
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2011 | Bachelorsthesis | LibreCat-ID: 10678
N. Ikonomakis, PinSim: Schnelle Simulation mit Pintools. Paderborn University, 2011.
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2011 | Bachelorsthesis | LibreCat-ID: 10680
H. Kassner, MPI-CUDA Codegenerierung für Nanophoton Simulationen auf Clustern. Paderborn University, 2011.
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2011 | Book Chapter | LibreCat-ID: 10687
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Evolution of Embedded Systems,” in Organic Computing---A Paradigm Shift for Complex Systems, vol. 1, C. Müller-Schloer, H. Schmeck, and T. Ungerer, Eds. Springer Basel, 2011, pp. 193–206.
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2011 | Mastersthesis | LibreCat-ID: 10736
A. Schwabe, Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University, 2011.
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2011 | Book Chapter | LibreCat-ID: 10737
L. Sekanina, J. A. Walker, P. Kaufmann, C. Plessl, and M. Platzner, “Evolution of Electronic Circuits,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
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2011 | Book Chapter | LibreCat-ID: 10748
J. A. Walker, J. F. Miller, P. Kaufmann, and M. Platzner, “Problem Decomposition in Cartesian Genetic Programming,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 35–99.
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2011 | Mastersthesis | LibreCat-ID: 10750
D. Welp, User Space Scheduling for Heterogeneous Systems. Paderborn University, 2011.
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2011 | Conference Paper | LibreCat-ID: 2194
B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63, doi: 10.1109/SAAHPC.2011.12.
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2011 | Conference Paper | LibreCat-ID: 2193
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226, doi: 10.1109/ASAP.2011.6043273.
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2011 | Conference Paper | LibreCat-ID: 656
M. Happe, A. Agne, and C. Plessl, “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time,” in Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 2011, pp. 55–60, doi: 10.1109/ReConFig.2011.59.
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2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
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2011 | Journal Article | LibreCat-ID: 2201
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study,” Int. Journal of Recon- figurable Computing (IJRC), 2011, doi: 10.1155/2011/760954.
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2011 | Conference Paper | LibreCat-ID: 2198
M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285, doi: 10.1109/IPDPS.2011.153.
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2010 | Mastersthesis | LibreCat-ID: 10614
A. Agne, Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10629
A. Boschmann, EMG-basierte Ganganalyse. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
D. Breitlauch, Evolvable Cache Controller. Paderborn University, 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10649
D. Dridger, Soft Microprocessors with tightly coupled Application-Specific Coprocessors. Paderborn University, 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10657
T. Graf, Parallelization of the UCT Algorithm on HPC-Clusters. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 10683
P. Kaufmann, K. Englehart, and M. Platzner, “Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms,” in International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2010, pp. 6357–6360.
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2010 | Conference Paper | LibreCat-ID: 10686
P. Kaufmann, T. Knieper, and M. Platzner, “A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers,” in IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), 2010, pp. 541–548.
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2010 | Mastersthesis | LibreCat-ID: 10697
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 10699
T. Knieper, P. Kaufmann, K. Glette, M. Platzner, and J. Torresen, “Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2010, vol. 6274, pp. 250–261.
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2010 | Book Chapter | LibreCat-ID: 10704
E. Lübbers and M. Platzner, “ReconOS: An Operating System for Dynamically Reconfigurable Hardware,” in Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, M. Platzner, J. Teich, and N. Wehn, Eds. Springer-Verlag GmbH, 2010, pp. 269–290.
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2010 | Mastersthesis | LibreCat-ID: 10710
R. Meiche, FPGA/CPU Multicore-Plattform für ReconOS/eCos. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
M. Niekamp, Transparente Hardwarebeschleunigung durch Shared Library Interposing. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10752
T. Wiersema, Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 13640
H. Giefers and M. Platzner, “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier,” in Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), 2010.
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