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364 Publications


2011 | Mastersthesis | LibreCat-ID: 10736
A. Schwabe, Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University, 2011.
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2011 | Mastersthesis | LibreCat-ID: 10750
D. Welp, User Space Scheduling for Heterogeneous Systems. Paderborn University, 2011.
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2011 | Bachelorsthesis | LibreCat-ID: 10680
H. Kassner, MPI-CUDA Codegenerierung für Nanophoton Simulationen auf Clustern. Paderborn University, 2011.
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2011 | Bachelorsthesis | LibreCat-ID: 10678
N. Ikonomakis, PinSim: Schnelle Simulation mit Pintools. Paderborn University, 2011.
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2011 | Book Chapter | LibreCat-ID: 10748
J. A. Walker, J. F. Miller, P. Kaufmann, and M. Platzner, “Problem Decomposition in Cartesian Genetic Programming,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 35–99.
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2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180.
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2011 | Book Chapter | LibreCat-ID: 10737
L. Sekanina, J. A. Walker, P. Kaufmann, C. Plessl, and M. Platzner, “Evolution of Electronic Circuits,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
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2011 | Conference Paper | LibreCat-ID: 2193
T. Beisel, T. Wiersema, C. Plessl, and A. Brinkmann, “Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2011, pp. 223–226.
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2011 | Journal Article | LibreCat-ID: 2201
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study,” Int. Journal of Recon- figurable Computing (IJRC), 2011.
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2011 | Conference Paper | LibreCat-ID: 2198
M. Grad and C. Plessl, “Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture,” in Proc. Reconfigurable Architectures Workshop (RAW), 2011, pp. 278–285.
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2011 | Conference Paper | LibreCat-ID: 13643
A. Agne, M. Platzner, and E. Lübbers, “Memory Virtualization for Multithreaded Reconfigurable Hardware,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2011, pp. 185–188.
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2011 | Conference Paper | LibreCat-ID: 10637
A. Boschmann, P. Kaufmann, and M. Platzner, “Accurate gait phase detection using surface electromyographic signals and support vector machines,” in Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
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2011 | Book Chapter | LibreCat-ID: 10687
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Evolution of Embedded Systems,” in Organic Computing---A Paradigm Shift for Complex Systems, vol. 1, C. Müller-Schloer, H. Schmeck, and T. Ungerer, Eds. Springer Basel, 2011, pp. 193–206.
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2011 | Book Chapter | LibreCat-ID: 2202
C. Plessl and M. Platzner, “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors,” in Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, M. Khalgui and H.-M. Hanisch, Eds. Hershey, PA, USA: IGI Global, 2011.
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2011 | Conference Paper | LibreCat-ID: 666
S. Drzevitzky and M. Platzner, “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach,” in Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65.
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2011 | Conference Paper | LibreCat-ID: 2194
B. Meyer, C. Plessl, and J. Förstner, “Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend,” in Symp. on Application Accelerators in High Performance Computing (SAAHPC), 2011, pp. 60–63.
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2011 | Conference Paper | LibreCat-ID: 13644
J. Henkel et al., “Design and architectures for dependable embedded systems,” in Proceedings of the seventh IEEE/ACM/IFIP International Conference on Hardware/software Codesign and system synthesis - CODES+ISSS ’11, 2011.
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2011 | Conference Paper | LibreCat-ID: 10638
A. Boschmann, M. Platzner, M. Robrecht, M. Hahn, and M. Winkler, “Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems,” in Proc. MyoElectric Controls Symposium (MEC), 2011.
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2010 | Conference (Editor) | LibreCat-ID: 2222
T. P. Plaks et al., Eds., Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
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2010 | Conference Paper | LibreCat-ID: 13640
H. Giefers and M. Platzner, “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier,” in Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), 2010.
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2010 | Book Chapter | LibreCat-ID: 10704
E. Lübbers and M. Platzner, “ReconOS: An Operating System for Dynamically Reconfigurable Hardware,” in Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, M. Platzner, J. Teich, and N. Wehn, Eds. Springer-Verlag GmbH, 2010, pp. 269–290.
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2010 | Conference Paper | LibreCat-ID: 2223
E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.
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2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
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2010 | Mastersthesis | LibreCat-ID: 10697
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
M. Niekamp, Transparente Hardwarebeschleunigung durch Shared Library Interposing. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
D. Breitlauch, Evolvable Cache Controller. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 2216
M. Grad and C. Plessl, “Pruning the Design Space for Just-In-Time Processor Customization,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2010, pp. 67–72.
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2010 | Conference Paper | LibreCat-ID: 13641
W. Schäfer et al., “Engineering Self-Coordinating Software Intensive Systems,” in Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–324.
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2010 | Mastersthesis | LibreCat-ID: 10629
A. Boschmann, EMG-basierte Ganganalyse. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 2224
M. Grad and C. Plessl, “An Open Source Circuit Library with Benchmarking Facilities,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 144–150.
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2010 | Journal Article | LibreCat-ID: 10605
S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification,” International Journal of Reconfigurable Computing, vol. 2010, 2010.
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2010 | Conference Paper | LibreCat-ID: 10686
P. Kaufmann, T. Knieper, and M. Platzner, “A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers,” in IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), 2010, pp. 541–548.
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2010 | Conference Paper | LibreCat-ID: 13642
H. Giefers and M. Platzner, “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics,” in Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010.
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2010 | Book (Editor) | LibreCat-ID: 10763
M. Platzner, J. Teich, and N. Wehn, Eds., Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH, 2010.
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2010 | Conference Paper | LibreCat-ID: 2206
A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376.
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2010 | Mastersthesis | LibreCat-ID: 10752
T. Wiersema, Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University, 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10649
D. Dridger, Soft Microprocessors with tightly coupled Application-Specific Coprocessors. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 2220
D. Andrews and C. Plessl, “Configurable Processor Architectures: History and Trends,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, p. 165.
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2010 | Journal Article | LibreCat-ID: 10694
U. Kebschull, M. Platzner, and J. Teich, “Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial),” IET Computers Digital Techniques, vol. 4, no. 3, pp. 157–158, 2010.
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2010 | Conference Paper | LibreCat-ID: 10699
T. Knieper, P. Kaufmann, K. Glette, M. Platzner, and J. Torresen, “Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2010, vol. 6274, pp. 250–261.
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2010 | Conference Paper | LibreCat-ID: 10776
M. Khatir, H. Ghasemzadeh Mohammadi, and A. Ejlali, “Sub-threshold charge recovery circuits,” in Computer Design (ICCD), 2010 IEEE International Conference on, 2010, pp. 138–144.
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2010 | Conference Paper | LibreCat-ID: 2226
T. Beisel, M. Niekamp, and C. Plessl, “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2010, pp. 65–72.
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2010 | Mastersthesis | LibreCat-ID: 10710
R. Meiche, FPGA/CPU Multicore-Plattform für ReconOS/eCos. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10614
A. Agne, Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University, 2010.
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2010 | Bachelorsthesis | LibreCat-ID: 10657
T. Graf, Parallelization of the UCT Algorithm on HPC-Clusters. Paderborn University, 2010.
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2010 | Conference Paper | LibreCat-ID: 10683
P. Kaufmann, K. Englehart, and M. Platzner, “Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms,” in International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2010, pp. 6357–6360.
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2009 | Conference Paper | LibreCat-ID: 13638
M. Happe, E. Lübbers, and M. Platzner, “An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning,” in Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), 2009.
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2009 | Conference Paper | LibreCat-ID: 10639
A. Boschmann, P. Kaufmann, M. Platzner, and M. Winkler, “Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets,” in Proc. Technically Assisted Rehabilitation (TAR), 2009.
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2009 | Conference Paper | LibreCat-ID: 2261
T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.
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