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427 Publications
2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar S. Incremental Learning with Support Vector Machine on Embedded Platforms.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta J. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recongurable System-on-Chip.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier T. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn; 2019.
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2019 | Conference Paper | LibreCat-ID: 31067
Guettatfi Z, Platzner M, Kermia O, Khouas A. An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. In: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE; 2019. doi:10.1109/ipdpsw.2019.00027
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2019 | Conference Paper | LibreCat-ID: 9913 | 
Ahmed QA, Wiersema T, Platzner M. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In: Hochberger C, Nelson B, Koch A, Woods R, Diniz P, eds. Applied Reconfigurable Computing. Vol 11444. Lecture Notes in Computer Science. Springer International Publishing; 2019:127-136. doi:10.1007/978-3-030-17227-5_10
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2019 | Mastersthesis | LibreCat-ID: 15874 |
Lienen C. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn
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2019 | Journal Article | LibreCat-ID: 12871 |
Platzner M, Plessl C. FPGAs im Rechenzentrum. Informatik Spektrum. Published online 2019. doi:10.1007/s00287-019-01187-w
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2019 | Mastersthesis | LibreCat-ID: 52478
Mehta JD. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfigurable System-on-Chip.; 2019.
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch A, Wiens A, Platzner M. Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS). Vol 10793. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2018:73-84. doi:10.1007/978-3-319-77610-1_6
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer J-P. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn; 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce M. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn; 2018.
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier T, Platzner M, Andrews D. An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications. Vol 10824. Lecture Notes in Computer Science. Springer International Publishing; 2018:153-165. doi:10.1007/978-3-319-78890-6_13
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2018 | Preprint | LibreCat-ID: 3586
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
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2018 | Dissertation | LibreCat-ID: 3720
Ho N. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn; 2018. doi:10.17619/UNIPB/1-376
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2018 | Preprint | LibreCat-ID: 1165
Witschen LM, Wiersema T, Platzner M. Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch A, Platzner M. A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). IEEE; 2018. doi:10.1109/asap.2018.8445098
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2018 | Conference Paper | LibreCat-ID: 10598
Awais M, Ghasemzadeh Mohammadi H, Platzner M. An MCTS-based Framework for Synthesis of Approximate Circuits. In: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). ; 2018:219-224. doi:10.1109/VLSI-SoC.2018.8645026
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing L. Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data. Ruhr-University Bochum; 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch FP. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn; 2018.
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2018 | Journal Article | LibreCat-ID: 12965
Ghribi I, Abdallah RB, Khalgui M, Li Z, Alnowibet K, Platzner M. R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access. 2018:14078-14092. doi:10.1109/access.2018.2799852
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2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier T. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr C. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn; 2017.
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2017 | Journal Article | LibreCat-ID: 9919
Shen C, Kaufmann P, Braun M. Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES). 2017;94:287-299. doi:10.1016/j.ijepes.2017.07.007
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2017 | Conference Paper | LibreCat-ID: 65
Lösch A, Platzner M. reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP). ; 2017. doi:10.1109/ASAP.2017.7995272
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2017 | Journal Article | LibreCat-ID: 68
Isenberg T, Platzner M, Wehrheim H, Wiersema T. Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems. 2017;(4):61:1--61:23. doi:10.1145/3054743
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2017 | Journal Article | LibreCat-ID: 10600
H.W. Leong P, Amano H, Anderson J, et al. The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems. 2017. doi:10.1145/2996468
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2017 | Journal Article | LibreCat-ID: 10601
F. DeMara R, Platzner M, Ottavi M. Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing. 2017. doi:10.1109/TETC.2016.2641599
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2017 | Journal Article | LibreCat-ID: 10611
Anwer J, Platzner M. Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems. 2017:160-172. doi:10.1016/j.micpro.2017.06.002
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2017 | Bachelorsthesis | LibreCat-ID: 10613
Kaltschmidt C. An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University; 2017.
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2017 | Conference Paper | LibreCat-ID: 10630
Boschmann A, Thombansen G, Witschen LM, Wiens A, Platzner M. A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In: Design, Automation and Test in Europe (DATE). ; 2017. doi:10.23919/DATE.2017.7927137
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2017 | Mastersthesis | LibreCat-ID: 10666
Riaz U. Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University; 2017.
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2017 | Conference Paper | LibreCat-ID: 10672
Ho N, Ashraf II, Kaufmann P, Platzner M. Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In: Proc. Design, Automation and Test in Europe Conf. (DATE). ; 2017. doi:10.23919/DATE.2017.7927096
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2017 | Conference Paper | LibreCat-ID: 10676
Ho N, Kaufmann P, Platzner M. Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In: 2017 International Conference on Field Programmable Technology (ICFPT). ; 2017:215-218. doi:10.1109/FPT.2017.8280144
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2017 | Journal Article | LibreCat-ID: 10692
Shen C, Kaufmann P, Braun M. Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES). 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
Dietrich A. Reconfigurable Cryptographic Services. Paderborn University; 2017.
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2017 | Journal Article | LibreCat-ID: 10740
Shen C, Kaufmann P, Braun M. Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering. 2017:19pp. doi:10.1049/joe.2017.0032
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2017 | Book | LibreCat-ID: 10759
Squillero G, Burelli P, M. Mora A, et al. Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer; 2017.
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2017 | Conference Paper | LibreCat-ID: 10760
Kaufmann P, Kalkreuth R. Parametrizing Cartesian Genetic Programming: An Empirical Study. In: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing; 2017. doi:10.1007/978-3-319-67190-1_26
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2017 | Conference Paper | LibreCat-ID: 10761
Kaufmann P, Ho N, Platzner M. Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In: Adaptive Hardware and Systems (AHS). IEEE; 2017. doi:10.1109/AHS.2017.8046380
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2017 | Conference Paper | LibreCat-ID: 10762
Kaufmann P, Kalkreuth R. An Empirical Study on the Parametrization of Cartesian Genetic Programming. In: Genetic and Evolutionary Computation (GECCO), Compendium. ACM; 2017. doi:10.1145/3067695.3075980
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2017 | Conference Paper | LibreCat-ID: 10780
Guettatfi Z, Hübner P, Platzner M, Rinner B. Computational self-awareness as design approach for visual sensor nodes. In: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC). ; 2017:1-8. doi:10.1109/ReCoSoC.2017.8016147
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2017 | Conference Paper | LibreCat-ID: 14893
Ghribi I, Abdallah RB, Khalgui M, Platzner M. I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In: Communications in Computer and Information Science. Cham: Springer ; 2017. doi:10.1007/978-3-319-62569-0_8
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2016 | Journal Article | LibreCat-ID: 222
Wiersema T, Bockhorn A, Platzner M. An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip. Computers & Electrical Engineering. 2016:112--122. doi:10.1016/j.compeleceng.2016.04.005
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2016 | Conference Paper | LibreCat-ID: 5812
Boschmann A, Agne A, Witschen L, Thombansen G, Kraus F, Platzner M. FPGA-based acceleration of high density myoelectric signal processing. In: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2016. doi:10.1109/reconfig.2015.7393312
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2016 | Mastersthesis | LibreCat-ID: 10612
Cedric Mertens J. Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion. Paderborn University; 2016.
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2016 | Mastersthesis | LibreCat-ID: 10616
Nassery AS. Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University; 2016.
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2016 | Mastersthesis | LibreCat-ID: 10617
Amin O. Acceleration of EMTP for Distribution Networks on Data Flow Machines Using the Latency Insertion Method. Paderborn University; 2016.
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