@inproceedings{Wu_Hussain_Abughannam_Müller_Scheytt_Ecker_2018, place={Italy/Taormina}, title={Analog fault simulation automation at schematic level with random sampling techniques}, DOI={
10.1109/DTIS.2018.8368549}, booktitle={2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)) }, publisher={IEEE}, author={Wu, Liang and Hussain, Mohammad Khizer and Abughannam, Saed and Müller, Wolfgang and Scheytt, Christoph and Ecker, Wolfgang}, year={2018} }