Tobias Kenter

Paderborn Center for Parallel Computing (PC2)
Hochleistungsrechnen
kenter@uni-paderborn.de
ID
3145

50 Publications

Mark all

[50]
2024 | Preprint | LibreCat-ID: 53364
M. Meyer, T. Kenter, L. Petrica, K. O’Brien, M. Blott, and C. Plessl, “Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL,” arXiv:2403.18374. 2024.
LibreCat | arXiv
 
[49]
2024 | Journal Article | LibreCat-ID: 53474
M. Lass, T. Kenter, C. Plessl, and M. Brehm, “Characterizing Microheterogeneity in Liquid Mixtures via Local Density Fluctuations,” Entropy, vol. 26, no. 4, Art. no. 322, 2024, doi: 10.3390/e26040322.
LibreCat | DOI
 
[48]
2024 | Conference Paper | LibreCat-ID: 53503
K. Olgu, T. Kenter, J. Nunez-Yanez, and S. Mcintosh-Smith, “Optimisation and Evaluation of Breadth First Search with oneAPI/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures,” 2024, doi: 10.1145/3648115.3648134.
LibreCat | DOI
 
[47]
2024 | Journal Article | LibreCat-ID: 53663 | OA
C. Bauer et al., “Noctua 2 Supercomputer,” Journal of large-scale research facilities, vol. 9, 2024, doi: 10.17815/jlsrf-8-187 .
LibreCat | Files available | DOI
 
[46]
2024 | Conference Paper | LibreCat-ID: 56605
J.-O. Opdenhövel, C. Alt, C. Plessl, and T. Kenter, “StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs,” 2024, doi: 10.1109/fpl64840.2024.00023.
LibreCat | DOI
 
[45]
2024 | Conference Paper | LibreCat-ID: 56607
A. R. Tareen, M. Meyer, C. Plessl, and T. Kenter, “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory,” in 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2024, vol. 35, doi: 10.1109/fccm60383.2024.00014.
LibreCat | DOI
 
[44]
2024 | Conference Paper | LibreCat-ID: 54312
M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL,” 2024, doi: 10.1145/3659914.3659925.
LibreCat | DOI
 
[43]
2024 | Journal Article | LibreCat-ID: 56604 | OA
L. Van Hirtum et al., “A Computation of the Ninth Dedekind Number Using FPGA Supercomputing,” ACM Transactions on Reconfigurable Technology and Systems, vol. 17, no. 3, pp. 1–28, 2024, doi: 10.1145/3674147.
LibreCat | DOI | Download (ext.)
 
[42]
2023 | Book Chapter | LibreCat-ID: 46191
C. Alt et al., “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline,” in Lecture Notes in Computer Science, Cham: Springer Nature Switzerland, 2023.
LibreCat | DOI
 
[41]
2023 | Preprint | LibreCat-ID: 43439
L. Van Hirtum et al., “A computation of D(9) using FPGA Supercomputing,” arXiv:2304.03039. 2023.
LibreCat | arXiv
 
[40]
2023 | Conference Paper | LibreCat-ID: 46188
J. Faj, T. Kenter, S. Faghih-Naini, C. Plessl, and V. Aizinger, “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes,” 2023, doi: 10.1145/3592979.3593407.
LibreCat | Files available | DOI | Download (ext.)
 
[39]
2023 | Conference Paper | LibreCat-ID: 46189
C. Prouveur, M. Haefele, T. Kenter, and N. Voss, “FPGA Acceleration for HPC Supercapacitor Simulations,” 2023, doi: 10.1145/3592979.3593419.
LibreCat | Files available | DOI | Download (ext.)
 
[38]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat | Files available | DOI
 
[37]
2023 | Conference Paper | LibreCat-ID: 46190 | OA
J.-O. Opdenhövel, C. Plessl, and T. Kenter, “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation,” 2023, doi: 10.1145/3597031.3597050.
LibreCat | DOI | Download (ext.)
 
[36]
2023 | Journal Article | LibreCat-ID: 38041 | OA
M. Meyer, T. Kenter, and C. Plessl, “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks,” ACM Transactions on Reconfigurable Technology and Systems, 2023, doi: 10.1145/3576200.
LibreCat | DOI | Download (ext.)
 
[35]
2023 | Conference Paper | LibreCat-ID: 43228
X. Wu, T. Kenter, R. Schade, T. Kühne, and C. Plessl, “Computing and Compressing Electron Repulsion Integrals on FPGAs,” in 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–173, doi: 10.1109/FCCM57271.2023.00026.
LibreCat | DOI | Download (ext.) | arXiv
 
[34]
2023 | Journal Article | LibreCat-ID: 45361 | OA
R. Schade, T. Kenter, H. Elgabarty, M. Lass, T. Kühne, and C. Plessl, “Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics,” The International Journal of High Performance Computing Applications, Art. no. 109434202311776, 2023, doi: 10.1177/10943420231177631.
LibreCat | DOI | Download (ext.)
 
[33]
2022 | Conference Paper | LibreCat-ID: 46193 | OA
M. Karp et al., “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges,” 2022, doi: 10.1145/3492805.3492808.
LibreCat | DOI | Download (ext.)
 
[32]
2022 | Journal Article | LibreCat-ID: 33684 | OA
R. Schade et al., “Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms,” Parallel Computing, vol. 111, Art. no. 102920, 2022, doi: 10.1016/j.parco.2022.102920.
LibreCat | DOI | Download (ext.)
 
[31]
2022 | Journal Article | LibreCat-ID: 27364
M. Meyer, T. Kenter, and C. Plessl, “In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL,” Journal of Parallel and Distributed Computing, 2022, doi: 10.1016/j.jpdc.2021.10.007.
LibreCat | DOI
 
[30]
2021 | Journal Article | LibreCat-ID: 28099 | OA
J. Menzel, C. Plessl, and T. Kenter, “The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations,” ACM Transactions on Reconfigurable Technology and Systems, vol. 15, no. 1, pp. 1–30, 2021, doi: 10.1145/3491235.
LibreCat | DOI | Download (ext.)
 
[29]
2021 | Conference Paper | LibreCat-ID: 29937
M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[28]
2021 | Conference Paper | LibreCat-ID: 46194
T. Kenter, A. Shambhu, S. Faghih-Naini, and V. Aizinger, “Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA,” 2021, doi: 10.1145/3468267.3470617.
LibreCat | Files available | DOI | Download (ext.)
 
[27]
2021 | Conference Paper | LibreCat-ID: 46195
M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[26]
2021 | Book Chapter | LibreCat-ID: 21587
S. Alhaddad et al., “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids,” in Euro-Par 2020: Parallel Processing Workshops, Cham, 2021.
LibreCat | Files available | DOI
 
[25]
2021 | Book Chapter | LibreCat-ID: 29936
A. Ramaswami, T. Kenter, T. Kühne, and C. Plessl, “Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing,” in Applied Reconfigurable Computing. Architectures, Tools, and Applications, Cham: Springer International Publishing, 2021.
LibreCat | DOI
 
[24]
2021 | Journal Article | LibreCat-ID: 24788 | OA
S. Alhaddad et al., “The HighPerMeshes framework for numerical algorithms on unstructured grids,” Concurrency and Computation: Practice and Experience, p. e6616, 2021, doi: 10.1002/cpe.6616.
LibreCat | Files available | DOI
 
[23]
2020 | Conference Paper | LibreCat-ID: 21632
M. Meyer, T. Kenter, and C. Plessl, “Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite,” 2020, doi: 10.1109/h2rc51942.2020.00007.
LibreCat | Files available | DOI | Download (ext.)
 
[22]
2019 | Journal Article | LibreCat-ID: 7689
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL,” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, pp. 14:1–14:26, 2019.
LibreCat | Files available | DOI
 
[21]
2019 | Conference Paper | LibreCat-ID: 15478
P. Gorlani, T. Kenter, and C. Plessl, “OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2019.
LibreCat | Files available | DOI
 
[20]
2018 | Conference Paper | LibreCat-ID: 1588
T. Kenter et al., “OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes,” presented at the Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2018, doi: 10.1109/FCCM.2018.00037.
LibreCat | Files available | DOI
 
[19]
2018 | Conference Paper | LibreCat-ID: 1204
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,” 2018, doi: 10.1145/3178487.3178534.
LibreCat | Files available | DOI
 
[18]
2017 | Conference Paper | LibreCat-ID: 1592
T. Kenter, J. Förstner, and C. Plessl, “Flexible FPGA design for FDTD using OpenCL,” 2017, doi: 10.23919/FPL.2017.8056844.
LibreCat | Files available | DOI
 
[17]
2016 | Dissertation | LibreCat-ID: 161
T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn, 2016.
LibreCat | Files available
 
[16]
2016 | Conference Paper | LibreCat-ID: 24
T. Kenter and C. Plessl, “Microdisk Cavity FDTD Simulation on FPGA using OpenCL,” 2016.
LibreCat | Files available
 
[15]
2016 | Journal Article | LibreCat-ID: 165
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,” Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi: 10.1016/j.compeleceng.2016.04.021.
LibreCat | Files available | DOI
 
[14]
2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
LibreCat | Files available
 
[13]
2016 | Conference Paper | LibreCat-ID: 171
T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
LibreCat | Files available
 
[12]
2015 | Journal Article | LibreCat-ID: 296
T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,” International Journal of Reconfigurable Computing (IJRC), vol. 2015, Art. no. 859425, 2015, doi: 10.1155/2015/859425.
LibreCat | Files available | DOI
 
[11]
2014 | Conference Paper | LibreCat-ID: 388
T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.
LibreCat | Files available | DOI
 
[10]
2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
LibreCat | Files available | DOI
 
[9]
2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
LibreCat | Files available | DOI
 
[8]
2014 | Conference Paper | LibreCat-ID: 406
T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.
LibreCat | Files available | DOI
 
[7]
2013 | Conference Paper | LibreCat-ID: 528
H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.
LibreCat | Files available | DOI
 
[6]
2012 | Conference Paper | LibreCat-ID: 591
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.
LibreCat | Files available | DOI
 
[5]
2012 | Conference Paper | LibreCat-ID: 567
P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.
LibreCat | Files available | DOI
 
[4]
2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
LibreCat
 
[3]
2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
LibreCat | DOI
 
[2]
2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
LibreCat
 
[1]
2008 | Conference Paper | LibreCat-ID: 2365
M. Platzner et al., “The GOmputer: Accelerating GO with FPGAs,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat
 
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50 Publications

Mark all

[50]
2024 | Preprint | LibreCat-ID: 53364
M. Meyer, T. Kenter, L. Petrica, K. O’Brien, M. Blott, and C. Plessl, “Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL,” arXiv:2403.18374. 2024.
LibreCat | arXiv
 
[49]
2024 | Journal Article | LibreCat-ID: 53474
M. Lass, T. Kenter, C. Plessl, and M. Brehm, “Characterizing Microheterogeneity in Liquid Mixtures via Local Density Fluctuations,” Entropy, vol. 26, no. 4, Art. no. 322, 2024, doi: 10.3390/e26040322.
LibreCat | DOI
 
[48]
2024 | Conference Paper | LibreCat-ID: 53503
K. Olgu, T. Kenter, J. Nunez-Yanez, and S. Mcintosh-Smith, “Optimisation and Evaluation of Breadth First Search with oneAPI/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures,” 2024, doi: 10.1145/3648115.3648134.
LibreCat | DOI
 
[47]
2024 | Journal Article | LibreCat-ID: 53663 | OA
C. Bauer et al., “Noctua 2 Supercomputer,” Journal of large-scale research facilities, vol. 9, 2024, doi: 10.17815/jlsrf-8-187 .
LibreCat | Files available | DOI
 
[46]
2024 | Conference Paper | LibreCat-ID: 56605
J.-O. Opdenhövel, C. Alt, C. Plessl, and T. Kenter, “StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs,” 2024, doi: 10.1109/fpl64840.2024.00023.
LibreCat | DOI
 
[45]
2024 | Conference Paper | LibreCat-ID: 56607
A. R. Tareen, M. Meyer, C. Plessl, and T. Kenter, “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory,” in 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2024, vol. 35, doi: 10.1109/fccm60383.2024.00014.
LibreCat | DOI
 
[44]
2024 | Conference Paper | LibreCat-ID: 54312
M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL,” 2024, doi: 10.1145/3659914.3659925.
LibreCat | DOI
 
[43]
2024 | Journal Article | LibreCat-ID: 56604 | OA
L. Van Hirtum et al., “A Computation of the Ninth Dedekind Number Using FPGA Supercomputing,” ACM Transactions on Reconfigurable Technology and Systems, vol. 17, no. 3, pp. 1–28, 2024, doi: 10.1145/3674147.
LibreCat | DOI | Download (ext.)
 
[42]
2023 | Book Chapter | LibreCat-ID: 46191
C. Alt et al., “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline,” in Lecture Notes in Computer Science, Cham: Springer Nature Switzerland, 2023.
LibreCat | DOI
 
[41]
2023 | Preprint | LibreCat-ID: 43439
L. Van Hirtum et al., “A computation of D(9) using FPGA Supercomputing,” arXiv:2304.03039. 2023.
LibreCat | arXiv
 
[40]
2023 | Conference Paper | LibreCat-ID: 46188
J. Faj, T. Kenter, S. Faghih-Naini, C. Plessl, and V. Aizinger, “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes,” 2023, doi: 10.1145/3592979.3593407.
LibreCat | Files available | DOI | Download (ext.)
 
[39]
2023 | Conference Paper | LibreCat-ID: 46189
C. Prouveur, M. Haefele, T. Kenter, and N. Voss, “FPGA Acceleration for HPC Supercapacitor Simulations,” 2023, doi: 10.1145/3592979.3593419.
LibreCat | Files available | DOI | Download (ext.)
 
[38]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat | Files available | DOI
 
[37]
2023 | Conference Paper | LibreCat-ID: 46190 | OA
J.-O. Opdenhövel, C. Plessl, and T. Kenter, “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation,” 2023, doi: 10.1145/3597031.3597050.
LibreCat | DOI | Download (ext.)
 
[36]
2023 | Journal Article | LibreCat-ID: 38041 | OA
M. Meyer, T. Kenter, and C. Plessl, “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks,” ACM Transactions on Reconfigurable Technology and Systems, 2023, doi: 10.1145/3576200.
LibreCat | DOI | Download (ext.)
 
[35]
2023 | Conference Paper | LibreCat-ID: 43228
X. Wu, T. Kenter, R. Schade, T. Kühne, and C. Plessl, “Computing and Compressing Electron Repulsion Integrals on FPGAs,” in 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–173, doi: 10.1109/FCCM57271.2023.00026.
LibreCat | DOI | Download (ext.) | arXiv
 
[34]
2023 | Journal Article | LibreCat-ID: 45361 | OA
R. Schade, T. Kenter, H. Elgabarty, M. Lass, T. Kühne, and C. Plessl, “Breaking the exascale barrier for the electronic structure problem in ab-initio molecular dynamics,” The International Journal of High Performance Computing Applications, Art. no. 109434202311776, 2023, doi: 10.1177/10943420231177631.
LibreCat | DOI | Download (ext.)
 
[33]
2022 | Conference Paper | LibreCat-ID: 46193 | OA
M. Karp et al., “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges,” 2022, doi: 10.1145/3492805.3492808.
LibreCat | DOI | Download (ext.)
 
[32]
2022 | Journal Article | LibreCat-ID: 33684 | OA
R. Schade et al., “Towards electronic structure-based ab-initio molecular dynamics simulations with hundreds of millions of atoms,” Parallel Computing, vol. 111, Art. no. 102920, 2022, doi: 10.1016/j.parco.2022.102920.
LibreCat | DOI | Download (ext.)
 
[31]
2022 | Journal Article | LibreCat-ID: 27364
M. Meyer, T. Kenter, and C. Plessl, “In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL,” Journal of Parallel and Distributed Computing, 2022, doi: 10.1016/j.jpdc.2021.10.007.
LibreCat | DOI
 
[30]
2021 | Journal Article | LibreCat-ID: 28099 | OA
J. Menzel, C. Plessl, and T. Kenter, “The Strong Scaling Advantage of FPGAs in HPC for N-body Simulations,” ACM Transactions on Reconfigurable Technology and Systems, vol. 15, no. 1, pp. 1–30, 2021, doi: 10.1145/3491235.
LibreCat | DOI | Download (ext.)
 
[29]
2021 | Conference Paper | LibreCat-ID: 29937
M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[28]
2021 | Conference Paper | LibreCat-ID: 46194
T. Kenter, A. Shambhu, S. Faghih-Naini, and V. Aizinger, “Algorithm-hardware co-design of a discontinuous Galerkin shallow-water model for a dataflow architecture on FPGA,” 2021, doi: 10.1145/3468267.3470617.
LibreCat | Files available | DOI | Download (ext.)
 
[27]
2021 | Conference Paper | LibreCat-ID: 46195
M. Karp et al., “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection,” 2021, doi: 10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[26]
2021 | Book Chapter | LibreCat-ID: 21587
S. Alhaddad et al., “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids,” in Euro-Par 2020: Parallel Processing Workshops, Cham, 2021.
LibreCat | Files available | DOI
 
[25]
2021 | Book Chapter | LibreCat-ID: 29936
A. Ramaswami, T. Kenter, T. Kühne, and C. Plessl, “Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing,” in Applied Reconfigurable Computing. Architectures, Tools, and Applications, Cham: Springer International Publishing, 2021.
LibreCat | DOI
 
[24]
2021 | Journal Article | LibreCat-ID: 24788 | OA
S. Alhaddad et al., “The HighPerMeshes framework for numerical algorithms on unstructured grids,” Concurrency and Computation: Practice and Experience, p. e6616, 2021, doi: 10.1002/cpe.6616.
LibreCat | Files available | DOI
 
[23]
2020 | Conference Paper | LibreCat-ID: 21632
M. Meyer, T. Kenter, and C. Plessl, “Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite,” 2020, doi: 10.1109/h2rc51942.2020.00007.
LibreCat | Files available | DOI | Download (ext.)
 
[22]
2019 | Journal Article | LibreCat-ID: 7689
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL,” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, pp. 14:1–14:26, 2019.
LibreCat | Files available | DOI
 
[21]
2019 | Conference Paper | LibreCat-ID: 15478
P. Gorlani, T. Kenter, and C. Plessl, “OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2019.
LibreCat | Files available | DOI
 
[20]
2018 | Conference Paper | LibreCat-ID: 1588
T. Kenter et al., “OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes,” presented at the Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2018, doi: 10.1109/FCCM.2018.00037.
LibreCat | Files available | DOI
 
[19]
2018 | Conference Paper | LibreCat-ID: 1204
H. Riebler, G. F. Vaz, T. Kenter, and C. Plessl, “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices,” 2018, doi: 10.1145/3178487.3178534.
LibreCat | Files available | DOI
 
[18]
2017 | Conference Paper | LibreCat-ID: 1592
T. Kenter, J. Förstner, and C. Plessl, “Flexible FPGA design for FDTD using OpenCL,” 2017, doi: 10.23919/FPL.2017.8056844.
LibreCat | Files available | DOI
 
[17]
2016 | Dissertation | LibreCat-ID: 161
T. Kenter, Reconfigurable Accelerators in the World of General-Purpose Computing. Universität Paderborn, 2016.
LibreCat | Files available
 
[16]
2016 | Conference Paper | LibreCat-ID: 24
T. Kenter and C. Plessl, “Microdisk Cavity FDTD Simulation on FPGA using OpenCL,” 2016.
LibreCat | Files available
 
[15]
2016 | Journal Article | LibreCat-ID: 165
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,” Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi: 10.1016/j.compeleceng.2016.04.021.
LibreCat | Files available | DOI
 
[14]
2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
LibreCat | Files available
 
[13]
2016 | Conference Paper | LibreCat-ID: 171
T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
LibreCat | Files available
 
[12]
2015 | Journal Article | LibreCat-ID: 296
T. Kenter, H. Schmitz, and C. Plessl, “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study,” International Journal of Reconfigurable Computing (IJRC), vol. 2015, Art. no. 859425, 2015, doi: 10.1155/2015/859425.
LibreCat | Files available | DOI
 
[11]
2014 | Conference Paper | LibreCat-ID: 388
T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.
LibreCat | Files available | DOI
 
[10]
2014 | Conference Paper | LibreCat-ID: 377
H. Riebler, T. Kenter, C. Plessl, and C. Sorge, “Reconstructing AES Key Schedules from Decayed Memory with FPGAs,” in Proceedings of Field-Programmable Custom Computing Machines (FCCM), 2014, pp. 222–229, doi: 10.1109/FCCM.2014.67.
LibreCat | Files available | DOI
 
[9]
2014 | Conference Paper | LibreCat-ID: 439
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032509.
LibreCat | Files available | DOI
 
[8]
2014 | Conference Paper | LibreCat-ID: 406
T. Kenter, H. Schmitz, and C. Plessl, “Kernel-Centric Acceleration of High Accuracy Stereo-Matching,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–8, doi: 10.1109/ReConFig.2014.7032535.
LibreCat | Files available | DOI
 
[7]
2013 | Conference Paper | LibreCat-ID: 528
H. Riebler, T. Kenter, C. Sorge, and C. Plessl, “FPGA-accelerated Key Search for Cold-Boot Attacks against AES,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2013, pp. 386–389, doi: 10.1109/FPT.2013.6718394.
LibreCat | Files available | DOI
 
[6]
2012 | Conference Paper | LibreCat-ID: 591
T. Kenter, C. Plessl, and H. Schmitz, “Pragma based parallelization - Trading hardware efficiency for ease of use?,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2012, pp. 1–8, doi: 10.1109/ReConFig.2012.6416773.
LibreCat | Files available | DOI
 
[5]
2012 | Conference Paper | LibreCat-ID: 567
P. Barrio, C. Carreras, R. Sierra, T. Kenter, and C. Plessl, “Turning control flow graphs into function calls: Code generation for heterogeneous architectures,” in Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), 2012, pp. 559–565, doi: 10.1109/HPCSim.2012.6266973.
LibreCat | Files available | DOI
 
[4]
2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
LibreCat
 
[3]
2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
LibreCat | DOI
 
[2]
2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
LibreCat
 
[1]
2008 | Conference Paper | LibreCat-ID: 2365
M. Platzner et al., “The GOmputer: Accelerating GO with FPGAs,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
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