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165 Publications
2001 | Journal Article | LibreCat-ID: 13068
Hellebrand, Sybille, et al. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 17, no. 3/4, 2001, pp. 341–49.
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2000 | Misc | LibreCat-ID: 13094
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Hardwarepraktikum Im Diplomstudiengang Informatik. 2000.
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2000 | Misc | LibreCat-ID: 13095
Hellebrand, Sybille, et al. A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. 2000.
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2000 | Conference Paper | LibreCat-ID: 13005
Hellebrand, Sybille, et al. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” IEEE International Test Conference (ITC’00), IEEE, 2000, pp. 778–84, doi:10.1109/test.2000.894274.
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| DOI
1999 | Book | LibreCat-ID: 13065
Hellebrand, Sybille. Selbsttestbare Steuerwerke - Strukturen Und Syntheseverfahren. Verlag Dr. Kovac, Hamburg, 1999.
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1999 | Misc | LibreCat-ID: 13093
Hellebrand, Sybille, et al. Exploiting Symmetries to Speed Up Transparent BIST. 1999.
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1999 | Conference Paper | LibreCat-ID: 13006
Hellebrand, Sybille, et al. “Error Detecting Refreshment for Embedded DRAMs.” 17th IEEE VLSI Test Symposium (VTS’99), IEEE, 1999, pp. 384–90, doi:10.1109/vtest.1999.766693.
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| DOI
1999 | Conference Paper | LibreCat-ID: 13066
N. Yarmolik, Vyacheslav, et al. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.” Third European Dependable Computing Conference (EDCC-3), 1999.
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1999 | Conference Paper | LibreCat-ID: 13067
Hellebrand, Sybille, et al. “Symmetric Transparent BIST for RAMs.” Design Automation and Test in Europe (DATE’99), 1999, pp. 702–07.
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1998 | Report | LibreCat-ID: 13029
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Test Und Synthese Schneller Eingebetteter Systeme. 1998.
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1998 | Misc | LibreCat-ID: 13091
N. Yarmolik, Vyacheslav, et al. Efficient Consistency Checking for Embedded Memories. 1998.
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1998 | Misc | LibreCat-ID: 13092
N. Yarmolik, Vyacheslav, et al. Efficient Consistency Checking for Embedded Memories. 1998.
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1998 | Book Chapter | LibreCat-ID: 13060
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” Mixed-Mode BIST Using Embedded Processors, Kluwer Academic Publishers, 1998.
LibreCat
1998 | Journal Article | LibreCat-ID: 13061
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA, vol. 12, no. 1/2, 1998, pp. 127–38.
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1998 | Journal Article | LibreCat-ID: 13064
Hellebrand, Sybille, et al. “Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications.” IEEE Design and Test, vol. 15, no. 4, IEEE, 1998, pp. 36–41.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig, Andre, et al. “Fast Self-Recovering Controllers.” 16th IEEE VLSI Test Symposium (VTS’98), IEEE, 1998, pp. 296–302, doi:10.1109/vtest.1998.670883.
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| DOI
1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand, Sybille, et al. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.” Design Automation and Test in Europe (DATE’98), 1998, pp. 173–79, doi:10.1109/date.1998.655853.
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| DOI
1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik, Vyacheslav, et al. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 1998, pp. 27–33.
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1997 | Misc | LibreCat-ID: 13089
Tsai, Kun-Han, et al. STARBIST: Scan Autocorrelated Random Pattern Generation. 1997.
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1997 | Misc | LibreCat-ID: 13090
Hertwig, Andre, et al. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 1997.
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