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165 Publications
1998 | Misc | LibreCat-ID: 13091
N. Yarmolik, Vyacheslav, et al. Efficient Consistency Checking for Embedded Memories. 1998.
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1998 | Misc | LibreCat-ID: 13092
N. Yarmolik, Vyacheslav, et al. Efficient Consistency Checking for Embedded Memories. 1998.
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1998 | Book Chapter | LibreCat-ID: 13060
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” Mixed-Mode BIST Using Embedded Processors, Kluwer Academic Publishers, 1998.
LibreCat
1998 | Journal Article | LibreCat-ID: 13061
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA, vol. 12, no. 1/2, 1998, pp. 127–38.
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1998 | Journal Article | LibreCat-ID: 13064
Hellebrand, Sybille, et al. “Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications.” IEEE Design and Test, vol. 15, no. 4, IEEE, 1998, pp. 36–41.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig, Andre, et al. “Fast Self-Recovering Controllers.” 16th IEEE VLSI Test Symposium (VTS’98), IEEE, 1998, pp. 296–302, doi:10.1109/vtest.1998.670883.
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| DOI
1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand, Sybille, et al. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.” Design Automation and Test in Europe (DATE’98), 1998, pp. 173–79, doi:10.1109/date.1998.655853.
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| DOI
1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik, Vyacheslav, et al. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 1998, pp. 27–33.
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1997 | Misc | LibreCat-ID: 13089
Tsai, Kun-Han, et al. STARBIST: Scan Autocorrelated Random Pattern Generation. 1997.
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1997 | Misc | LibreCat-ID: 13090
Hertwig, Andre, et al. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 1997.
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1997 | Conference Paper | LibreCat-ID: 13009
Tsai, Kun-Han, et al. “STARBIST: Scan Autocorrelated Random Pattern Generation.” 34th ACM/IEEE Design Automation Conference (DAC’97), IEEE, 1997, doi:10.1109/dac.1997.597194.
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| DOI
1996 | Misc | LibreCat-ID: 13087
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Using Embedded Processors for BIST. 1996.
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1996 | Misc | LibreCat-ID: 13088
Hellebrand, Sybille, et al. Mixed-Mode BIST Using Embedded Processors. 1996.
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1996 | Conference Paper | LibreCat-ID: 13010
Hellebrand, Sybille, et al. “Mixed-Mode BIST Using Embedded Processors.” IEEE International Test Conference (ITC’96), IEEE, 1996, pp. 195–204, doi:10.1109/test.1996.556962.
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1995 | Report | LibreCat-ID: 13026
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis Procedures for Self-Testable Controllers. 1995.
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1995 | Report | LibreCat-ID: 13027
Hellebrand, Sybille, et al. Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis. 1995.
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1995 | Report | LibreCat-ID: 13028
Hellebrand, Sybille, et al. Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing. 1995.
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1995 | Misc | LibreCat-ID: 13086
Hellebrand, Sybille, et al. Pattern Generation for a Deterministic BIST Scheme. 1995.
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1995 | Journal Article | LibreCat-ID: 13011
Hellebrand, Sybille, et al. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” IEEE Transactions on Computers, vol. 44, no. 2, IEEE, 1995, pp. 223–33, doi:10.1109/12.364534.
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| DOI
1995 | Conference Paper | LibreCat-ID: 13012
Hellebrand, Sybille, et al. “Pattern Generation for a Deterministic BIST Scheme.” ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), IEEE, 1995, pp. 88–94, doi:10.1109/iccad.1995.479997.
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