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122 Publications


2011 | Conference Paper | LibreCat-ID: 2194
Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In: Symp. on Application Accelerators in High Performance Computing (SAAHPC). IEEE Computer Society; 2011:60-63. doi:10.1109/SAAHPC.2011.12
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2011 | Book Chapter | LibreCat-ID: 2202
Plessl C, Platzner M. Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In: Khalgui M, Hanisch H-M, eds. Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global; 2011. doi:10.4018/978-1-60960-086-0
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2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks TP, Andrews D, DeMara R, et al., eds. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010.
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2010 | Conference Paper | LibreCat-ID: 2227
Woehrle M, Plessl C, Thiele L. Rupeas: Ruby Powered Event Analysis DSL. In: Proc. Int. Conf. Networked Sensing Systems (INSS). IEEE; 2010:245-248. doi:10.1109/INSS.2010.5572211
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2010 | Conference Paper | LibreCat-ID: 2216
Grad M, Plessl C. Pruning the Design Space for Just-In-Time Processor Customization. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). Los Alamitos, CA, USA: IEEE Computer Society; 2010:67-72. doi:10.1109/ReConFig.2010.19
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2010 | Conference Paper | LibreCat-ID: 2223
Lübbers E, Platzner M, Plessl C, Keller A, Plattner B. Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:225-231.
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2010 | Conference Paper | LibreCat-ID: 2228
Kenter T, Platzner M, Plessl C, Kauschke M. Performance Estimation for the Exploration of CPU-Accelerator Architectures. In: Hammami O, Larrabee S, eds. Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA). ; 2010.
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2010 | Conference Paper | LibreCat-ID: 2224
Grad M, Plessl C. An Open Source Circuit Library with Benchmarking Facilities. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:144-150.
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2010 | Conference Paper | LibreCat-ID: 2206
Keller A, Plattner B, Lübbers E, Platzner M, Plessl C. Reconfigurable Nodes for Future Networks. In: Proc. IEEE Globecom Workshop on Network of the Future (FutureNet). IEEE; 2010:372-376. doi:10.1109/GLOCOMW.2010.5700341
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2010 | Conference Paper | LibreCat-ID: 2220
Andrews D, Plessl C. Configurable Processor Architectures: History and Trends. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2010:165.
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2010 | Conference Paper | LibreCat-ID: 2226
Beisel T, Niekamp M, Plessl C. Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2010:65-72. doi:10.1109/ASAP.2010.5540798
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2009 | Conference Paper | LibreCat-ID: 2350
Schumacher T, Plessl C, Platzner M. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE Computer Society; 2009:275-278. doi:10.1109/FCCM.2009.25
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2009 | Conference Paper | LibreCat-ID: 2261
Schumacher T, Plessl C, Platzner M. An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2009:338-344.
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2009 | Conference Paper | LibreCat-ID: 2262
Kaufmann P, Plessl C, Platzner M. EvoCaches: Application-specific Adaptation of Cache Mapping. In: Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS). Los Alamitos, CA, USA: IEEE Computer Society; 2009:11-18.
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2009 | Conference Paper | LibreCat-ID: 2263
Grad M, Plessl C. Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). USA: CSREA Press; 2009:319-322.
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2009 | Conference Paper | LibreCat-ID: 2352
Beutel J, Gruber S, Hasler A, et al. PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. In: Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN). Washington, DC, USA: IEEE Computer Society; 2009:265-276.
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2009 | Report | LibreCat-ID: 2353
Woehrle M, Plessl C, Thiele L. Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich; 2009.
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2009 | Conference Paper | LibreCat-ID: 2238
Schumacher T, Süß T, Plessl C, Platzner M. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In: Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig). Los Alamitos, CA, USA: IEEE Computer Society; 2009:119-124. doi:10.1109/ReConFig.2009.32
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2008 | Conference Paper | LibreCat-ID: 2370
Woehrle M, Plessl C, Lim R, Beutel J, Thiele L. EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. In: IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC). Los Alamitos, CA, USA: IEEE Computer Society; 2008:201-208. doi:10.1109/SUTC.2008.24
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2008 | Conference Paper | LibreCat-ID: 2364
Schumacher T, Meiche R, Kaufmann P, Lübbers E, Plessl C, Platzner M. A Hardware Accelerator for k-th Nearest Neighbor Thinning. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2008:245-251.
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2008 | Conference Paper | LibreCat-ID: 2372
Schumacher T, Plessl C, Platzner M. IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In: Many-Core and Reconfigurable Supercomputing Conference (MRSC). ; 2008.
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2007 | Conference Paper | LibreCat-ID: 2392
Woehrle M, Plessl C, Beutel J, Thiele L. Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework. In: Proc. Workshop on Embedded Networked Sensors (EmNets). New York, NY, USA: ACM; 2007:93-97. doi:10.1145/1278972.1278996
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2007 | Conference Paper | LibreCat-ID: 2393
Beutel J, Dyer M, Lim R, et al. Automated Wireless Sensor Network Testing. In: Proc. Int. Conf. Networked Sensing Systems (INSS). Piscataway, NJ, USA: IEEE; 2007:303-303. doi:10.1109/INSS.2007.4297445
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2007 | Report | LibreCat-ID: 2394
Beutel J, Plessl C, Woehrle M. Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. Computer Engineering and Networks Laboratory, ETH Zurich; 2007.
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2006 | Conference Paper | LibreCat-ID: 2401
Plessl C, Platzner M, Thiele L. Optimal Temporal Partitioning based on Slowdown and Retiming. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2006:345-348. doi:10.1109/FPT.2006.270344
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2006 | Dissertation | LibreCat-ID: 2404
Plessl C. Hardware Virtualization on a Coarse-Grained Reconfigurable Processor. Aachen, Germany: Shaker Verlag; 2006. doi:10.2370/9783832255619
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2005 | Journal Article | LibreCat-ID: 2412
Enzler R, Plessl C, Platzner M. System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems. 2005;29(2-3):63-73. doi:10.1016/j.micpro.2004.06.004
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2005 | Conference Paper | LibreCat-ID: 2411
Plessl C, Platzner M. Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society; 2005:213-218. doi:10.1109/ASAP.2005.69
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2004 | Conference Paper | LibreCat-ID: 2415
Plessl C, Platzner M. Virtualization of Hardware – Introduction and Survey. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2004:63-69.
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2003 | Conference Paper | LibreCat-ID: 2418
Plessl C, Platzner M. TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2003:252-259. doi:10.1109/FPT.2003.1275755
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2003 | Journal Article | LibreCat-ID: 2420
Plessl C, Platzner M. Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing. 2003;26(2):109-129. doi:10.1023/a:1024443416592
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2003 | Journal Article | LibreCat-ID: 2419
Plessl C, Enzler R, Walder H, et al. The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing. 2003;7(5):299-308. doi:10.1007/s00779-003-0243-x
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2003 | Conference Paper | LibreCat-ID: 2421
Enzler R, Plessl C, Platzner M. Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). Vol 2778. Lecture Notes in Computer Science (LNCS). Springer; 2003:151-160. doi:10.1007/b12007
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2003 | Conference Paper | LibreCat-ID: 2422
Enzler R, Plessl C, Platzner M. Co-simulation of a Hybrid Multi-Context Architecture. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2003:174-180.
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2002 | Conference Paper | LibreCat-ID: 2424
Dyer M, Plessl C, Platzner M. Partially Reconfigurable Cores for Xilinx Virtex. In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). Vol 2438. Lecture Notes in Computer Science (LNCS). Springer; 2002:292-301. doi:10.1007/3-540-46117-5
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2002 | Conference Paper | LibreCat-ID: 2425
Plessl C, Platzner M. Custom Computing Machines for the Set Covering Problem. In: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE Computer Society; 2002:163-172. doi:10.1109/FPGA.2002.1106671
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2002 | Conference Paper | LibreCat-ID: 2423
Plessl C, Enzler R, Walder H, Beutel J, Platzner M, Thiele L. Reconfigurable Hardware in Wearable Computing Nodes. In: Proc. Int. Symp. on Wearable Computers (ISWC). IEEE Computer Society; 2002:215-222. doi:10.1109/ISWC.2002.1167250
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2001 | Journal Article | LibreCat-ID: 2429
Plessl C, Wilde E. Server-Side-Techniken im Web – ein Überblick. iX. 2001:88-93.
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2001 | Conference Paper | LibreCat-ID: 2432
Enzler R, Platzner M, Plessl C, Thiele L, Tröster G. Reconfigurable Processors for Handhelds and Wearables: Application Analysis. In: Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III. Vol 4525. Proc. SPIE. ; 2001:135-146. doi:10.1117/12.434376
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2001 | Conference Paper | LibreCat-ID: 2428
Plessl C, Platzner M. Instance-Specific Accelerators for Minimum Covering. In: Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press; 2001:85-91.
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2001 | Mastersthesis | LibreCat-ID: 2430
Plessl C. Reconfigurable Accelerators for Minimum Covering. Computer Engineering and Networks Lab, ETH Zurich, Switzerland; 2001.
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2000 | Mastersthesis | LibreCat-ID: 2433
Plessl C, Maurer S. Hardware/Software Codesign in Speech Compression Applications. Computer Engineering and Networks Lab, ETH Zurich, Switzerland; 2000.
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