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456 Publications
2025 | Preprint | LibreCat-ID: 61152
@article{Umuroglu_Berganski_Jentzsch_Danilowicz_Kryjak_Bezaitis_Sjalander_Colbert_Preusser_Petri-Koenig_et al., title={SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural Network Accelerators}, author={Umuroglu, Yaman and Berganski, Christoph and Jentzsch, Felix and Danilowicz, Michal and Kryjak, Tomasz and Bezaitis, Charalampos and Sjalander, Magnus and Colbert, Ian and Preusser, Thomas and Petri-Koenig, Jakoba and et al.} }
LibreCat
2025 | Journal Article | LibreCat-ID: 62020
@article{Awais_Mohammadi_Platzner_2025, title={Design Space Exploration for Approximate Circuits via Checkpointing and DNN-Based Estimators}, volume={33}, DOI={10.1109/tvlsi.2025.3559377}, number={9}, journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Awais, Muhammad and Mohammadi, Hassan Ghasemzadeh and Platzner, Marco}, year={2025}, pages={2395–2405} }
LibreCat
| DOI
2025 | Conference Paper | LibreCat-ID: 62018
@inproceedings{Jalil_Awais_Ahmed_Mohammadi_Jungeblut_Platzner_2025, title={Deep&Wide: Achieving Area Efficiency in Scalable Approximate Accelerators}, DOI={10.1109/dsn-w65791.2025.00048}, booktitle={2025 55th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W)}, publisher={IEEE}, author={Jalil, Farjana and Awais, Muhammad and Ahmed, Qazi Arbab and Mohammadi, Hassan Ghasemzadeh and Jungeblut, Thorsten and Platzner, Marco}, year={2025} }
LibreCat
| DOI
2025 | Conference Paper | LibreCat-ID: 62019
@inproceedings{Hadipour_Jafari_Awais_Platzner_2025, title={A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation}, DOI={10.1109/ddecs63720.2025.11006769}, booktitle={2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)}, publisher={IEEE}, author={Hadipour, Amir Hossein and Jafari, Atousa and Awais, Muhammad and Platzner, Marco}, year={2025} }
LibreCat
| DOI
2025 | Mastersthesis | LibreCat-ID: 62268
@book{Bengaluru Amarnath_2025, title={Design and Integration of Intra-Process Communication for ROS 2 into ReconROS}, publisher={Paderborn University}, author={Bengaluru Amarnath, Prajwal}, year={2025} }
LibreCat
2024 | Journal Article | LibreCat-ID: 52686
@article{Ahmed_Wiersema_Platzner_2024, title={Post-configuration Activation of Hardware Trojans in FPGAs}, DOI={10.1007/s41635-024-00147-5}, journal={Journal of Hardware and Systems Security}, publisher={Springer Science and Business Media LLC}, author={Ahmed, Qazi Arbab and Wiersema, Tobias and Platzner, Marco}, year={2024} }
LibreCat
| DOI
2024 | Mastersthesis | LibreCat-ID: 54245
@book{Henke_2024, title={Exploring Custom FPGA Accelerators for DNN-based RF Fingerprinting}, author={Henke, Luca-Sebastian}, year={2024} }
LibreCat
2024 | Conference Paper | LibreCat-ID: 54468
@inproceedings{Awais_Ghasemzadeh Mohammadi_Platzner_2024, title={DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing}, booktitle={To apear in IEEE ISVLSI 2024}, author={Awais, Muhammad and Ghasemzadeh Mohammadi, Hassan and Platzner, Marco}, year={2024} }
LibreCat
2024 | Conference Paper | LibreCat-ID: 56481
@inproceedings{Berganski_Jentzsch_Platzner_Kuhmichel_Giefers_2024, title={FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers}, author={Berganski, Christoph and Jentzsch, Felix and Platzner, Marco and Kuhmichel, Max and Giefers, Heiner}, year={2024} }
LibreCat
2024 | Bachelorsthesis | LibreCat-ID: 58132
@book{Hartinger_2024, title={Controlling I/O Devices from Hardware-Mapped ReconROS Nodes}, publisher={Paderborn University}, author={Hartinger, Maximilian}, year={2024} }
LibreCat