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422 Publications
2015 | Conference Paper | LibreCat-ID: 10693
Kaufmann, P., & Shen, C. (2015). Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing. In Genetic and Evolutionary Computation (GECCO) (pp. 409–416). ACM.
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2015 | Conference Paper | LibreCat-ID: 10711
Meisner, S., & Platzner, M. (2015). Comparison of thread signatures for error detection in hybrid multi-cores. In Field Programmable Technology (FPT), 2015 International Conference on (pp. 212–215). https://doi.org/10.1109/FPT.2015.7393153
LibreCat
| DOI
2015 | Bachelorsthesis | LibreCat-ID: 10714
Meißner, R. (2015). Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs. Universität Paderborn.
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2015 | Mastersthesis | LibreCat-ID: 10726
Posewsky, T. (2015). Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University.
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2015 | Book | LibreCat-ID: 10757
M. Mora, A., Squillero, G., Agapitos, A., Burelli, P., S. Bush, W., Cagnoni, S., … Zhang (editors), M. (2015). Applications of Evolutionary Computation - 18th European Conference, EvoApplications (Vol. 9028). Copenhagen, Denmark: Springer.
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2015 | Conference Paper | LibreCat-ID: 10765
H.W. Leong, P., Amano, H., Anderson, J., Bertels, K., M.P. Cardoso, J., Diessel, O., … Wang, Y. (2015). Significant papers from the first 25 years of the FPL conference. In Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL) (pp. 1–3). Imperial College. https://doi.org/10.1109/FPL.2015.7293747
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| DOI
2015 | Conference Paper | LibreCat-ID: 10767
Ghribi, I., Ben Abdallah, R., Khalgui, M., & Platzner, M. (2015). New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software. In Proceedings of the 29th European Simulation and Modelling Conference (ESM).
LibreCat
2015 | Journal Article | LibreCat-ID: 10770
Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., & De Micheli, G. (2015). From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires. IEEE Transactions on Nanotechnology, 14(6), 1117–1126. https://doi.org/10.1109/TNANO.2015.2482359
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| DOI
2015 | Conference Paper | LibreCat-ID: 10771
Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., Zhang, J., De Micheli, G., Sanchez, E., & Reorda, M. S. (2015). On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors. In 2015 IEEE Computer Society Annual Symposium on VLSI (pp. 491–496). IEEE. https://doi.org/10.1109/ISVLSI.2015.13
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| DOI
2015 | Conference Paper | LibreCat-ID: 10772
Ghasemzadeh Mohammadi, H., Gaillardon, P.-E., & De Micheli, G. (2015). Fault modeling in controllable polarity silicon nanowire circuits. In Proceedings of the 2015 Design, Automation & Test in Europe Conference \& Exhibition (pp. 453–458). EDA Consortium. https://doi.org/10.7873/DATE.2015.0428
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| DOI
2015 | Conference Paper | LibreCat-ID: 10779
Guettatfi, Z., Kermia, O., & Khouas, A. (2015). Over effective hard real-time hardware tasks scheduling and allocation. In 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College. https://doi.org/10.1109/FPL.2015.7293994
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| DOI
2015 | Conference Paper | LibreCat-ID: 13153
Graf, T., & Platzner, M. (2015). Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning. In Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers (pp. 1–11). Springer International Publishing. https://doi.org/10.1007/978-3-319-27992-3_1
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| DOI
2014 | Journal Article | LibreCat-ID: 328
Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., & Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71. https://doi.org/10.1109/MM.2013.110
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| Files available
| DOI
2014 | Book Chapter | LibreCat-ID: 335
Platzner, M., & Plessl, C. (2014). Verschiebungen an der Grenze zwischen Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, & T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144). Paderborn: Wilhelm Fink.
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| Files available
2014 | Conference Paper | LibreCat-ID: 347
Meisner, S., & Platzner, M. (2014). Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. In D. Goehringer, M. Santambrogio, J. P. Cardoso, & K. Bertels (Eds.), Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC) (pp. 283–290). Springer. https://doi.org/10.1007/978-3-319-05960-0_30
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| Files available
| DOI
2014 | Journal Article | LibreCat-ID: 363
Agne, A., Hangmann, H., Happe, M., Platzner, M., & Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919. https://doi.org/10.1016/j.micpro.2013.12.001
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| Files available
| DOI
2014 | Journal Article | LibreCat-ID: 365
Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2). https://doi.org/10.1145/2617596
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 377
Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. In Proceedings of Field-Programmable Custom Computing Machines (FCCM) (pp. 222–229). IEEE. https://doi.org/10.1109/FCCM.2014.67
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 388
Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC) (Vol. 8405, pp. 144–155). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-05960-0_13
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., … Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. In Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA) (pp. 142–149). IEEE. https://doi.org/10.1109/ISPA.2014.27
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| DOI
2014 | Journal Article | LibreCat-ID: 1779
Giefers, H., Plessl, C., & Förstner, J. (2014). Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News, 41(5), 65–70. https://doi.org/10.1145/2641361.2641372
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| DOI
2014 | Conference Paper | LibreCat-ID: 1780
C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino, M., … Bolchini, C. (2014). SAVE: Towards efficient resource management in heterogeneous system architectures. In Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). Springer. https://doi.org/10.1007/978-3-319-05960-0_38
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| DOI
2014 | Conference Paper | LibreCat-ID: 1782
Graf, T., Schaefers, L., & Platzner, M. (2014). On Semeai Detection in Monte-Carlo Go. In Proc. Conf. on Computers and Games (CG) (pp. 14–25). Switzerland: Springer. https://doi.org/10.1007/978-3-319-09165-5_2
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| DOI
2014 | Conference Paper | LibreCat-ID: 399
Wiersema, T., Drzevitzky, S., & Platzner, M. (2014). Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring. In Proceedings of the International Conference on Field-Programmable Technology (FPT) (pp. 167–174). https://doi.org/10.1109/FPT.2014.7082771
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 406
Kenter, T., Schmitz, H., & Plessl, C. (2014). Kernel-Centric Acceleration of High Accuracy Stereo-Matching. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2014.7032535
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 408
Jakobs, M.-C., Platzner, M., Wiersema, T., & Wehrheim, H. (2014). Integrating Software and Hardware Verification. In E. Albert & E. Sekerinski (Eds.), Proceedings of the 11th International Conference on Integrated Formal Methods (iFM) (pp. 307–322). https://doi.org/10.1007/978-3-319-10181-1_19
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 433
Wiersema, T., Bockhorn, A., & Platzner, M. (2014). Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–6). https://doi.org/10.1109/ReConFig.2014.7032514
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| Files available
| DOI
2014 | Conference Paper | LibreCat-ID: 439
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2014.7032509
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| Files available
| DOI
2014 | Journal Article | LibreCat-ID: 10602
Schaefers, L., & Platzner, M. (2014). A Novel Technique and its Application to Computer Go. IEEE Transactions on Computational Intelligence and AI in Games, 6(3), 361–374. https://doi.org/10.1109/TCIAIG.2014.2346997
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| DOI
2014 | Journal Article | LibreCat-ID: 10603
Giefers, H., & Platzner, M. (2014). An FPGA-based Reconfigurable Mesh Many-Core. IEEE Transactions on Computers, 63(12), 2919–2932. https://doi.org/10.1109/TC.2013.174
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| DOI
2014 | Conference Paper | LibreCat-ID: 10621
Anwer, J., Platzner, M., & Meisner, S. (2014). FPGA Redundancy Configurations: An Automated Design Space Exploration. In Reconfigurable Architectures Workshop (RAW). https://doi.org/10.1109/IPDPSW.2014.37
LibreCat
| DOI
2014 | Bachelorsthesis | LibreCat-ID: 10627
Bockhorn, A. (2014). Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board. Paderborn University.
LibreCat
2014 | Conference Paper | LibreCat-ID: 10632
Boschmann, A., & Platzner, M. (2014). A computer vision-based approach to high density EMG pattern recognition using structural similarity. In Proc. MyoElectric Controls Symposium (MEC).
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2014 | Conference Paper | LibreCat-ID: 10633
Boschmann, A., & Platzner, M. (2014). Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. In Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC).
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2014 | Mastersthesis | LibreCat-ID: 10640
Brand, M. (2014). A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University.
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2014 | Mastersthesis | LibreCat-ID: 10645
Damschen, M. (2014). Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University.
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2014 | Conference Paper | LibreCat-ID: 10654
Glette, K., & Kaufmann, P. (2014). Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System. In IEEE Congress on Evolutionary Computation (CEC).
LibreCat
2014 | Bachelorsthesis | LibreCat-ID: 10665
Hagedorn, C. (2014). Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten. Paderborn University.
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2014 | Conference Paper | LibreCat-ID: 10674
Ho, N., Kaufmann, P., & Platzner, M. (2014). A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. In 24th Intl. Conf. on Field Programmable Logic and Applications (FPL) (pp. 1–4). https://doi.org/10.1109/FPL.2014.6927437
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| DOI
2014 | Conference Paper | LibreCat-ID: 10677
Ho, N., Kaufmann, P., & Platzner, M. (2014). Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES) (pp. 31–37). https://doi.org/10.1109/ICES.2014.7008719
LibreCat
| DOI
2014 | Bachelorsthesis | LibreCat-ID: 10679
König, F. (2014). EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese. Paderborn University.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10701
Koch, B. (2014). Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10715
Mittendorf, R. (2014). Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University.
LibreCat
2014 | Bachelorsthesis | LibreCat-ID: 10732
Rüthing, C. (2014). The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores. Paderborn University.
LibreCat
2014 | Dissertation | LibreCat-ID: 10733
Schäfers, L. (2014). Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go. Berlin: Logos Verlag Berlin GmbH.
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2014 | Conference Paper | LibreCat-ID: 10738
Shen, C., Kaufmann, P., & Braun, M. (2014). Optimizing the Generator Start-up Sequence After a Power System Blackout. In IEEE Power and Energy Society General Meeting (IEEE GM).
LibreCat
2014 | Conference Paper | LibreCat-ID: 10739
Shen, C., Kaufmann, P., & Braun, M. (2014). A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm. In Power Systems Computation Conference (PSCC). IEEE.
LibreCat
2014 | Mastersthesis | LibreCat-ID: 10744
Surmund, S. (2014). Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University.
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2014 | Book | LibreCat-ID: 10756
I. Esparcia-Alc{\’a}zar, A., Eiben, A. E., Agapitos, A., Sim{\~o}es, A., G.B. Tettamanzi, A., Della Cioppa, A., … S. Bush (editors), W. (2014). Applications of Evolutionary Computation - 17th European Conference, EvoApplications (Vol. 8602). Granada, Spain: Springer.
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2014 | Conference Paper | LibreCat-ID: 10764
Anwer, J., & Platzner, M. (2014). Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs. In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (pp. 177–184). IEEE. https://doi.org/10.1109/DFT.2014.6962108
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