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412 Publications
2013 | Conference Paper | LibreCat-ID: 10620
Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime
J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6.
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| DOI
J. Anwer, S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On, 2013, pp. 1–6.
2013 | Bachelorsthesis | LibreCat-ID: 10626
Beschleunigung von Tiefenberechnung aus Stereobildern durch FPGA-basierte Datenflussrechner
C. Bick, Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner, Paderborn University, 2013.
LibreCat
C. Bick, Beschleunigung von Tiefenberechnung Aus Stereobildern Durch FPGA-Basierte Datenflussrechner, Paderborn University, 2013.
2013 | Conference Paper | LibreCat-ID: 10634
Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes
A. Boschmann, B. Nofen, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
LibreCat
A. Boschmann, B. Nofen, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
2013 | Conference Paper | LibreCat-ID: 10635
Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array
A. Boschmann, M. Platzner, in: Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
LibreCat
A. Boschmann, M. Platzner, in: Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
2013 | Conference Paper | LibreCat-ID: 10655
Investigating Evolvable Hardware Classification for the BioSleeve Electromyographic Interface
K. Glette, P. Kaufmann, C. Assad, M. Wolf, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2013, pp. 1–1.
LibreCat
K. Glette, P. Kaufmann, C. Assad, M. Wolf, in: IEEE Intl. Conf. on Evolvable Systems (ICES), Springer, 2013, pp. 1–1.
2013 | Book | LibreCat-ID: 10681
Adapting Hardware Systems by Means of Multi-Objective Evolution
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag, Berlin, 2013.
LibreCat
P. Kaufmann, Adapting Hardware Systems by Means of Multi-Objective Evolution, Logos Verlag, Berlin, 2013.
2013 | Journal Article | LibreCat-ID: 10684
Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers
P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, B. Sick, IEEE Transactions on Evolutionary Computation 17 (2013) 46–63.
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P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, B. Sick, IEEE Transactions on Evolutionary Computation 17 (2013) 46–63.
2013 | Bachelorsthesis | LibreCat-ID: 10700
Behavior Models for Electric Vehicles
M. Knoop, Behavior Models for Electric Vehicles, IWES Kassel, 2013.
LibreCat
M. Knoop, Behavior Models for Electric Vehicles, IWES Kassel, 2013.
2013 | Bachelorsthesis | LibreCat-ID: 10720
Verbesserung der Erkennungsrate eines Systems zur Klassifikation von EMG-Signalen durch den Einsatz eines hybriden Lagesensors
B. Nofen, Verbesserung Der Erkennungsrate Eines Systems Zur Klassifikation von EMG-Signalen Durch Den Einsatz Eines Hybriden Lagesensors, Paderborn University, 2013.
LibreCat
B. Nofen, Verbesserung Der Erkennungsrate Eines Systems Zur Klassifikation von EMG-Signalen Durch Den Einsatz Eines Hybriden Lagesensors, Paderborn University, 2013.
2013 | Bachelorsthesis | LibreCat-ID: 10727
Überquerung der Styx - Betriebsparametervariation und Fehlerverhalten eines Platform FPGAs
D. Pudelko, Überquerung Der Styx - Betriebsparametervariation Und Fehlerverhalten Eines Platform FPGAs, Paderborn University, 2013.
LibreCat
D. Pudelko, Überquerung Der Styx - Betriebsparametervariation Und Fehlerverhalten Eines Platform FPGAs, Paderborn University, 2013.
2013 | Mastersthesis | LibreCat-ID: 10730
Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
LibreCat
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
2013 | Bachelorsthesis | LibreCat-ID: 10741
MiBenchHybrid : Erweiterung eines Benchmarks um Hardwarebeschleunigung
A. Sprenger, MiBenchHybrid : Erweiterung Eines Benchmarks Um Hardwarebeschleunigung, Paderborn University, 2013.
LibreCat
A. Sprenger, MiBenchHybrid : Erweiterung Eines Benchmarks Um Hardwarebeschleunigung, Paderborn University, 2013.
2013 | Bachelorsthesis | LibreCat-ID: 10743
Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen
P. Steppeler, Beschleunigung von Einzelbild-Erkennungsverfahren Auf Datenfluss Basierenden HPC Systemen, Paderborn University, 2013.
LibreCat
P. Steppeler, Beschleunigung von Einzelbild-Erkennungsverfahren Auf Datenfluss Basierenden HPC Systemen, Paderborn University, 2013.
2013 | Conference Paper | LibreCat-ID: 10745
Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation
C. Toebermann, D. Geibel, M. Hau, R. Brandl, P. Kaufmann, C. Ma, M. Braun, T. Degner, in: Real-Time Conference, OPAL RT Paris, 2013.
LibreCat
C. Toebermann, D. Geibel, M. Hau, R. Brandl, P. Kaufmann, C. Ma, M. Braun, T. Degner, in: Real-Time Conference, OPAL RT Paris, 2013.
2013 | Conference Paper | LibreCat-ID: 10774
A fast TCAD-based methodology for Variation analysis of emerging nano-devices
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, G. De Micheli, in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83–88.
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| DOI
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, M. Yazdani, G. De Micheli, in: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), IEEE, 2013, pp. 83–88.
2013 | Conference Paper | LibreCat-ID: 10775
Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study
P.-E. Gaillardon, H. Ghasemzadeh Mohammadi, G. De Micheli, in: 2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1–6.
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| DOI
P.-E. Gaillardon, H. Ghasemzadeh Mohammadi, G. De Micheli, in: 2013 14th Latin American Test Workshop-LATW, IEEE, 2013, pp. 1–6.
2013 | Conference Paper | LibreCat-ID: 13645
On Semeai Detection in Monte-Carlo Go.
T. Graf, L. Schäfers, M. Platzner, in: Proceedings of the International Conference on Computers and Games (CG), Springer, 2013.
LibreCat
T. Graf, L. Schäfers, M. Platzner, in: Proceedings of the International Conference on Computers and Games (CG), Springer, 2013.
2012 | Conference Paper | LibreCat-ID: 2097
FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm
S. Kasap, S. Redif, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–140.
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| DOI
S. Kasap, S. Redif, in: Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2012, pp. 135–140.
2012 | Conference Paper | LibreCat-ID: 2100
FPGA implementation of a second-order convolutive blind signal separation algorithm
S. Kasap, S. Redif, in: Int. Architecture and Engineering Symp. (ARCHENG), 2012.
LibreCat
S. Kasap, S. Redif, in: Int. Architecture and Engineering Symp. (ARCHENG), 2012.
2012 | Conference Paper | LibreCat-ID: 2103
Comparison of Bayesian Move Prediction Systems for Computer Go
M. Wistuba, L. Schaefers, M. Platzner, in: Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99.
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| DOI
M. Wistuba, L. Schaefers, M. Platzner, in: Proc. IEEE Conf. on Computational Intelligence and Games (CIG), IEEE, 2012, pp. 91–99.
2012 | Conference Paper | LibreCat-ID: 2106
Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?
B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.
LibreCat
| Files available
| DOI
B. Meyer, J. Schumacher, C. Plessl, J. Förstner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–196.
2012 | Journal Article | LibreCat-ID: 2108
IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
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| DOI
T. Schumacher, C. Plessl, M. Platzner, Microprocessors and Microsystems 36 (2012) 110–126.
2012 | Journal Article | LibreCat-ID: 2172
STIR: Software for Tomographic Image Reconstruction Release 2
K. Thielemans, C. Tsoumpas, S. Mustafovic, T. Beisel, P. Aguiar, N. Dikaios, M. W Jacobson, Physics in Medicine and Biology 57 (2012) 867–883.
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K. Thielemans, C. Tsoumpas, S. Mustafovic, T. Beisel, P. Aguiar, N. Dikaios, M. W Jacobson, Physics in Medicine and Biology 57 (2012) 867–883.
2012 | Journal Article | LibreCat-ID: 2173
Parallel algorithm for computation of second-order sequential best rotations
S. Redif, S. Kasap, Int. Journal of Electronics 100 (2012) 1646–1651.
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| DOI
S. Redif, S. Kasap, Int. Journal of Electronics 100 (2012) 1646–1651.
2012 | Journal Article | LibreCat-ID: 2174
Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer
S. Kasap, K. Benkrid, Journal of Computers 7 (2012) 1312–1328.
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S. Kasap, K. Benkrid, Journal of Computers 7 (2012) 1312–1328.
2012 | Journal Article | LibreCat-ID: 2177
On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
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| DOI
M. Grad, C. Plessl, Int. Journal of Reconfigurable Computing (IJRC) (2012).
2012 | Conference Paper | LibreCat-ID: 2180
Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
2012 | Dissertation | LibreCat-ID: 586 | 
Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security
S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
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S. Drzevitzky, Proof-Carrying Hardware: A Novel Approach to Reconfigurable Hardware Security, Universität Paderborn, 2012.
2012 | Misc | LibreCat-ID: 587
Programming models for reconfigurable heterogeneous multi-cores
C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Programming Models for Reconfigurable Heterogeneous Multi-Cores, Awareness Magazine, 2012.
LibreCat
| Files available
C. Plessl, M. Platzner, A. Agne, M. Happe, E. Lübbers, Programming Models for Reconfigurable Heterogeneous Multi-Cores, Awareness Magazine, 2012.
2012 | Conference Paper | LibreCat-ID: 591
Pragma based parallelization - Trading hardware efficiency for ease of use?
T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat
| Files available
| DOI
T. Kenter, C. Plessl, H. Schmitz, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
2012 | Conference Paper | LibreCat-ID: 609
Hardware/Software Platform for Self-aware Compute Nodes
M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat
| Files available
M. Happe, A. Agne, C. Plessl, M. Platzner, in: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
2012 | Conference Paper | LibreCat-ID: 612
Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs
C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.
LibreCat
| Files available
| DOI
C. Rüthing, M. Happe, A. Agne, C. Plessl, in: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–562.
2012 | Conference Paper | LibreCat-ID: 615
Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators
M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
LibreCat
| Files available
| DOI
M. Happe, H. Hangmann, A. Agne, C. Plessl, in: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8.
2012 | Conference Paper | LibreCat-ID: 567
Turning control flow graphs into function calls: Code generation for heterogeneous architectures
P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.
LibreCat
| Files available
| DOI
P. Barrio, C. Carreras, R. Sierra, T. Kenter, C. Plessl, in: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–565.
2012 | Conference Paper | LibreCat-ID: 10636
Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array
A. Boschmann, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
LibreCat
A. Boschmann, M. Platzner, in: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
2012 | Mastersthesis | LibreCat-ID: 10650
Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer
D. Dridger, Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer, Paderborn University, 2012.
LibreCat
D. Dridger, Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer, Paderborn University, 2012.
2012 | Dissertation | LibreCat-ID: 10652
Design and Programming of Reconfigurable Mesh based Many-Cores
H. Giefers, Design and Programming of Reconfigurable Mesh Based Many-Cores, Logos Verlag Berlin GmbH, Berlin, 2012.
LibreCat
H. Giefers, Design and Programming of Reconfigurable Mesh Based Many-Cores, Logos Verlag Berlin GmbH, Berlin, 2012.
2012 | Mastersthesis | LibreCat-ID: 10658
Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go
T. Graf, Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go, Paderborn University, 2012.
LibreCat
T. Graf, Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go, Paderborn University, 2012.
2012 | Bachelorsthesis | LibreCat-ID: 10667
Generating Adjustable Temperature Gradients on modern FPGAs
H. Hangmann, Generating Adjustable Temperature Gradients on Modern FPGAs, Paderborn University, 2012.
LibreCat
H. Hangmann, Generating Adjustable Temperature Gradients on Modern FPGAs, Paderborn University, 2012.
2012 | Journal Article | LibreCat-ID: 10685
Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture
P. Kaufmann, K. Glette, M. Platzner, J. Torresen, International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3 (2012) 17–31.
LibreCat
| DOI
P. Kaufmann, K. Glette, M. Platzner, J. Torresen, International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3 (2012) 17–31.
2012 | Misc | LibreCat-ID: 10723
Wieder natürlich gehen und greifen
M. Platzner, A. Boschmann, P. Kaufmann, Wieder Natürlich Gehen Und Greifen, 2012.
LibreCat
M. Platzner, A. Boschmann, P. Kaufmann, Wieder Natürlich Gehen Und Greifen, 2012.
2012 | Bachelorsthesis | LibreCat-ID: 10734
Stereo Matching on a HC-1 Hybrid Core Computer
H. Schmitz, Stereo Matching on a HC-1 Hybrid Core Computer, Paderborn University, 2012.
LibreCat
H. Schmitz, Stereo Matching on a HC-1 Hybrid Core Computer, Paderborn University, 2012.
2012 | Bachelorsthesis | LibreCat-ID: 10747
Entwicklung eines Picoblaze Compilers mit dem Gentle Compiler Construction System
C. Topmöller, Entwicklung Eines Picoblaze Compilers Mit Dem Gentle Compiler Construction System, Paderborn University, 2012.
LibreCat
C. Topmöller, Entwicklung Eines Picoblaze Compilers Mit Dem Gentle Compiler Construction System, Paderborn University, 2012.
2012 | Mastersthesis | LibreCat-ID: 10754
Analysis of Pattern Based Model Design and Learning in Computer-Go
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go, Paderborn University, 2012.
LibreCat
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go, Paderborn University, 2012.
2012 | Misc | LibreCat-ID: 13462
An outlook for self-awareness in computing systems
P. Lewis, M. Platzner, X. Yao, An Outlook for Self-Awareness in Computing Systems, Awareness Magazine, 2012.
LibreCat
P. Lewis, M. Platzner, X. Yao, An Outlook for Self-Awareness in Computing Systems, Awareness Magazine, 2012.
2011 | Conference Paper | LibreCat-ID: 2191
Estimation and Partitioning for CPU-Accelerator Architectures
T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.
LibreCat
T. Kenter, C. Plessl, M. Platzner, M. Kauschke, in: Intel European Research and Innovation Conference, 2011.
2011 | Conference Paper | LibreCat-ID: 2193
Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.
LibreCat
| DOI
T. Beisel, T. Wiersema, C. Plessl, A. Brinkmann, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–226.
2011 | Conference Paper | LibreCat-ID: 2194
Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend
B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.
LibreCat
| DOI
B. Meyer, C. Plessl, J. Förstner, in: Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63.
2011 | Conference Paper | LibreCat-ID: 2198
Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.
LibreCat
| DOI
M. Grad, C. Plessl, in: Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–285.
2011 | Conference Paper | LibreCat-ID: 2200
Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.
LibreCat
| DOI
T. Kenter, M. Platzner, C. Plessl, M. Kauschke, in: Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, New York, NY, USA, 2011, pp. 177–180.