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165 Publications
1998 | Misc | LibreCat-ID: 13091
N. Yarmolik V, Hellebrand S, Wunderlich H-J. Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA; 1998.
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1998 | Misc | LibreCat-ID: 13092
N. Yarmolik V, Hellebrand S, Wunderlich H-J. Efficient Consistency Checking for Embedded Memories. 10th GI/ITG/GMM/IEEE Workshop; 1998.
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1998 | Book Chapter | LibreCat-ID: 13060
Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors. In: Mixed-Mode BIST Using Embedded Processors. 5. Kluwer Academic Publishers; 1998.
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1998 | Journal Article | LibreCat-ID: 13061
Hellebrand S, Wunderlich H-J, Hertwig A. Mixed-Mode BIST Using Embedded Processors. Journal of Electronic Testing Theory and Applications - JETTA. 1998;12(1/2):127-138.
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1998 | Journal Article | LibreCat-ID: 13064
Hellebrand S, Hertwig A, Wunderlich H-J. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. IEEE Design and Test. 1998;15(4):36-41.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig A, Hellebrand S, Wunderlich H-J. Fast Self-Recovering Controllers. In: 16th IEEE VLSI Test Symposium (VTS’98). IEEE; 1998:296-302. doi:10.1109/vtest.1998.670883
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| DOI
1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand S, Wunderlich H-J, N. Yarmolik V. Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. In: Design Automation and Test in Europe (DATE’98). ; 1998:173-179. doi:10.1109/date.1998.655853
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| DOI
1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik V, V. Klimets Y, Hellebrand S, Wunderlich H-J. New Transparent RAM BIST Based on Self-Adjusting Output Data Compression. In: Design & Diagnostics of Electronic Circuits & Systems (DDECS’98). ; 1998:27-33.
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1997 | Misc | LibreCat-ID: 13089
Tsai K-H, Hellebrand S, Rajski J, Marek-Sadowska M. STARBIST: Scan Autocorrelated Random Pattern Generation. 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA; 1997.
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1997 | Misc | LibreCat-ID: 13090
Hertwig A, Hellebrand S, Wunderlich H-J. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 3rd IEEE International On-Line Testing Workshop, Crete, Greece; 1997.
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