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165 Publications
2024 | Conference Paper | LibreCat-ID: 52744
Time and Space Optimized Storage-based BIST under Multiple Voltages and Variations
H. Jafarzadeh, F. Klemme, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: European Test Symposium, The Hague, Netherlands, May 20-24, 2024, IEEE, n.d., p. 6.
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H. Jafarzadeh, F. Klemme, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: European Test Symposium, The Hague, Netherlands, May 20-24, 2024, IEEE, n.d., p. 6.
2024 | Conference Paper | LibreCat-ID: 52742
Vmin Testing under Variations: Defect vs. Fault Coverage
H. Jafarzadeh, F. Klemme, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: IEEE Latin American Test Symposium (LATS), Maceió, Brazil, April 9-12, 2024, IEEE, n.d., p. 6.
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H. Jafarzadeh, F. Klemme, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: IEEE Latin American Test Symposium (LATS), Maceió, Brazil, April 9-12, 2024, IEEE, n.d., p. 6.
2024 | Conference Paper | LibreCat-ID: 52743
Functional Safety and Reliability of Interconnects throughout the Silicon Life Cycle
S. Hellebrand, S. Sadeghi-Kohan, H.-J. Wunderlich, in: International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, n.d., p. 1.
LibreCat
S. Hellebrand, S. Sadeghi-Kohan, H.-J. Wunderlich, in: International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, n.d., p. 1.
2024 | Conference Paper | LibreCat-ID: 52745
Robust Test of Small Delay Faults under PVT-Variations
H.-J. Wunderlich, H. Jafarzadeh, S. Hellebrand, in: International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, n.d., p. 1.
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H.-J. Wunderlich, H. Jafarzadeh, S. Hellebrand, in: International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, n.d., p. 1.
2024 | Misc | LibreCat-ID: 50284
Modeling Crosstalk-induced Interconnect Delay with Polynomial Regression
A. Stiballe, J.D. Reimer, S. Sadeghi-Kohan, S. Hellebrand, Modeling Crosstalk-Induced Interconnect Delay with Polynomial Regression, 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’24), Feb. 2024, Darmstadt, Germany, 2024.
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A. Stiballe, J.D. Reimer, S. Sadeghi-Kohan, S. Hellebrand, Modeling Crosstalk-Induced Interconnect Delay with Polynomial Regression, 37. ITG / GMM / GI -Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’24), Feb. 2024, Darmstadt, Germany, 2024.
2023 | Misc | LibreCat-ID: 35204
On Cryptography Effects on Interconnect Reliability
A. Ghazal, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, On Cryptography Effects on Interconnect Reliability, 35. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’23), Feb. 2023, Erfurt, Germany, 2023.
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A. Ghazal, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, On Cryptography Effects on Interconnect Reliability, 35. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’23), Feb. 2023, Erfurt, Germany, 2023.
2023 | Dissertation | LibreCat-ID: 46482 | 
Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen
A. Sprenger, Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen, Universität Paderborn, Paderborn, 2023.
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A. Sprenger, Testinstrumente und Testdatenanalyse zur Verarbeitung von Unsicherheiten in Logikblöcken hochintegrierter Schaltungen, Universität Paderborn, Paderborn, 2023.
2023 | Conference Paper | LibreCat-ID: 46739
Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication
S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, in: 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), IEEE, 2023.
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S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, in: 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), IEEE, 2023.
2023 | Conference Paper | LibreCat-ID: 46738
Optimizing the Streaming of Sensor Data with Approximate Communication
S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, H.-J. Wunderlich, in: IEEE Asian Test Symposium (ATS’23), October 2023, Beijing, China, 2023.
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S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, H.-J. Wunderlich, in: IEEE Asian Test Symposium (ATS’23), October 2023, Beijing, China, 2023.
2023 | Journal Article | LibreCat-ID: 46264
Workload-Aware Periodic Interconnect BIST
S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, IEEE Design &Test (2023) 1–1.
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S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, IEEE Design &Test (2023) 1–1.
2023 | Conference Paper | LibreCat-ID: 45830
Robust Pattern Generation for Small Delay Faults under Process Variations
H. Jafarzadeh, F. Klemme, J.D. Reimer, Z.P. Najafi Haghi, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023, IEEE, Anaheim, CA, USA, 2023.
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H. Jafarzadeh, F. Klemme, J.D. Reimer, Z.P. Najafi Haghi, H. Amrouch, S. Hellebrand, H.-J. Wunderlich, in: IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023, IEEE, Anaheim, CA, USA, 2023.
2022 | Journal Article | LibreCat-ID: 29351
Stress-Aware Periodic Test of Interconnects
S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, Journal of Electronic Testing (2022).
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S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, Journal of Electronic Testing (2022).
2022 | Misc | LibreCat-ID: 29890
EM-Aware Interconnect BIST
S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, EM-Aware Interconnect BIST, European Workshop on Silicon Lifecycle Management, March 18, 2022, Online, 2022.
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S. Sadeghi-Kohan, S. Hellebrand, H.-J. Wunderlich, EM-Aware Interconnect BIST, European Workshop on Silicon Lifecycle Management, March 18, 2022, Online, 2022.
2020 | Conference Paper | LibreCat-ID: 19422
Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study
A. Sprenger, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, in: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, Virtual Conference - Originally Frascati (Rome), Italy, 2020.
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A. Sprenger, S. Sadeghi-Kohan, J.D. Reimer, S. Hellebrand, in: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020, Virtual Conference - Originally Frascati (Rome), Italy, 2020.
2020 | Misc | LibreCat-ID: 15419
Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects
S. Sadeghi-Kohan, S. Hellebrand, Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects, 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, Ludwigsburg, 2020.
LibreCat
S. Sadeghi-Kohan, S. Hellebrand, Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects, 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, Ludwigsburg, 2020.
2020 | Conference Paper | LibreCat-ID: 29200
Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects
S. Sadeghi-Kohan, S. Hellebrand, in: 38th IEEE VLSI Test Symposium (VTS), IEEE, Virtual Conference - Originally San Diego, CA, USA, 2020.
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S. Sadeghi-Kohan, S. Hellebrand, in: 38th IEEE VLSI Test Symposium (VTS), IEEE, Virtual Conference - Originally San Diego, CA, USA, 2020.
2020 | Conference Paper | LibreCat-ID: 19421
Logic Fault Diagnosis of Hidden Delay Defects
S. Holst, M. Kampmann, A. Sprenger, J.D. Reimer, S. Hellebrand, H.-J. Wunderlich, X. Weng, in: IEEE International Test Conference (ITC’20), November 2020, Virtual Conference - Originally Washington, DC, USA, 2020.
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S. Holst, M. Kampmann, A. Sprenger, J.D. Reimer, S. Hellebrand, H.-J. Wunderlich, X. Weng, in: IEEE International Test Conference (ITC’20), November 2020, Virtual Conference - Originally Washington, DC, USA, 2020.
2019 | Misc | LibreCat-ID: 8112
A Hybrid Space Compactor for Varying X-Rates
M.U. Maaz, A. Sprenger, S. Hellebrand, A Hybrid Space Compactor for Varying X-Rates, 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), Prien am Chiemsee, 2019.
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M.U. Maaz, A. Sprenger, S. Hellebrand, A Hybrid Space Compactor for Varying X-Rates, 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), Prien am Chiemsee, 2019.
2019 | Journal Article | LibreCat-ID: 8667
Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test
A. Sprenger, S. Hellebrand, Journal of Circuits, Systems and Computers 28 (2019) 1–23.
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A. Sprenger, S. Hellebrand, Journal of Circuits, Systems and Computers 28 (2019) 1–23.
2019 | Journal Article | LibreCat-ID: 13048
Built-in Test for Hidden Delay Faults
M. Kampmann, M. A. Kochte, C. Liu, E. Schneider, S. Hellebrand, H.-J. Wunderlich, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 38 (2019) 1956–1968.
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M. Kampmann, M. A. Kochte, C. Liu, E. Schneider, S. Hellebrand, H.-J. Wunderlich, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 38 (2019) 1956–1968.