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165 Publications
2010 | Conference Paper | LibreCat-ID: 13051
M. Hunger and S. Hellebrand, “Ausbeute und Fehlertoleranz bei dreifach modularer Redundanz,” in 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf,” 2010, pp. 81–88.
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2010 | Misc | LibreCat-ID: 13073
S. Hellebrand, Nano-Electronic Systems. Editorial, it 4/2010, pp. 179-180, 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 12983
F. Hopsch et al., “Variation-Aware Fault Modeling,” in 19th IEEE Asian Test Symposium (ATS’10), 2010, pp. 87–93, doi: 10.1109/ats.2010.24.
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2010 | Conference Paper | LibreCat-ID: 12985
T. Indlekofer, M. Schnittger, and S. Hellebrand, “Efficient Test Response Compaction for Robust BIST Using Parity Sequences,” in 28th IEEE International Conference on Computer Design (ICCD’10), 2010, pp. 480–485, doi: 10.1109/iccd.2010.5647648.
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2010 | Conference Paper | LibreCat-ID: 12986
M. Hunger and S. Hellebrand, “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems,” in 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), 2010, pp. 101–108, doi: 10.1109/dft.2010.19.
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2010 | Conference Paper | LibreCat-ID: 12988
V. Froese, R. Ibers, and S. Hellebrand, “Reusing NoC-Infrastructure for Test Data Compression,” in 28th IEEE VLSI Test Symposium (VTS’10), 2010, pp. 227–231, doi: 10.1109/vts.2010.5469570.
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2010 | Conference Paper | LibreCat-ID: 13049
B. Becker, S. Hellebrand, I. Polian, B. Straube, W. Vermeiren, and H.-J. Wunderlich, “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits,” 2010.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13050
T. Indlekofer, M. Schnittger, and S. Hellebrand, “Robuster Selbsttest mit extremer Kompaktierung,” in 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf,” 2010, pp. 17–24.
LibreCat
2009 | Conference Paper | LibreCat-ID: 12991
M. Hunger, S. Hellebrand, A. Czutro, I. Polian, and B. Becker, “ATPG-Based Grading of Strong Fault-Secureness,” 2009, doi: 10.1109/iolts.2009.5196027.
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2009 | Conference Paper | LibreCat-ID: 12990
S. Hellebrand and M. Hunger, “Are Robust Circuits Really Robust?,” in 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), 2009, p. 77, doi: 10.1109/dft.2009.28.
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2009 | Conference Paper | LibreCat-ID: 13030
M. Hunger, S. Hellebrand, A. Czutro, I. Polian, and B. Becker, “Robustheitsanalyse stark fehlersicherer Schaltungen mit SAT-basierter Testmustererzeugung,” 2009.
LibreCat
2008 | Misc | LibreCat-ID: 13033
T. Coym, S. Hellebrand, S. Ludwig, B. Straube, H.-J. Wunderlich, and C. G. Zoellin, Ein verfeinertes elektrisches Modell für Teilchentreffer und dessen Auswirkung auf die Bewertung der Schaltungsempfindlichkeit. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (Poster), Wien, Österreich, 2008.
LibreCat
2008 | Misc | LibreCat-ID: 13035
U. Amgalan, C. Hachmann, S. Hellebrand, and H.-J. Wunderlich, Testen mit Rücksetzpunkten - ein Ansatz zur Verbesserung der Ausbeute bei robusten Schaltungen. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Wien, Österreich, 2008.
LibreCat
2008 | Conference Paper | LibreCat-ID: 12992
P. Oehler, A. Bosio, G. di Natale, and S. Hellebrand, “A Modular Memory BIST for Optimized Memory Repair,” 2008, doi: 10.1109/iolts.2008.30.
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2008 | Conference Paper | LibreCat-ID: 12994
U. Amgalan, C. Hachmann, S. Hellebrand, and H.-J. Wunderlich, “Signature Rollback - A Technique for Testing Robust Circuits,” in 26th IEEE VLSI Test Symposium (VTS’08), 2008, pp. 125–130, doi: 10.1109/vts.2008.34.
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2008 | Conference Paper | LibreCat-ID: 12993
M. Hunger and S. Hellebrand, “Verification and Analysis of Self-Checking Properties through ATPG,” 2008, doi: 10.1109/iolts.2008.32.
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2008 | Conference Paper | LibreCat-ID: 13031
M. Hunger and S. Hellebrand, “Analyse selbstprüfender Schaltungen – Nachweis von Fehlersicherheit und Selbsttestbarkeit mit ATPG,” 2008.
LibreCat
2008 | Conference Paper | LibreCat-ID: 13032
P. Oehler, A. Bosio, G. Di Natale, and S. Hellebrand, “Modularer Selbsttest und optimierte Reparaturanalyse,” 2008.
LibreCat
2007 | Misc | LibreCat-ID: 13038
S. Hellebrand, Reliable Nanoscale Systems - Challenges and Strategies for On- and Offline Testing. 5th IEEE East-West Design \& Test Symposium, Yerevan, Armenia (Invited Talk), 2007.
LibreCat
2007 | Misc | LibreCat-ID: 13039
M. Ali, M. Welzl, S. Hessler, and S. Hellebrand, An End-to-End Reliability Protocol to Address Transient Faults in Network on Chips. DATE 2007 Friday Workshop on Diagnostic Services in Network-on-Chips, Nice, France, (Poster), 2007.
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