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226 Publications


2019 | Conference Paper | LibreCat-ID: 9913
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
LibreCat | Files available | DOI
 

2019 | Journal Article | LibreCat-ID: 3585
CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Microelectronics Reliability 99 (2019) 277–290.
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2019 | Journal Article | LibreCat-ID: 12871
FPGAs im Rechenzentrum
M. Platzner, C. Plessl, Informatik Spektrum (2019).
LibreCat | Files available | DOI
 

2019 | Conference Paper | LibreCat-ID: 10577
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
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2019 | Journal Article | LibreCat-ID: 11950
Zynq-based acceleration of robust high density myoelectric signal processing
A. Boschmann, A. Agne, G. Thombansen, L.M. Witschen, F. Kraus, M. Platzner, Journal of Parallel and Distributed Computing 123 (2019) 77–89.
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2019 | Journal Article | LibreCat-ID: 12967
An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
T. Hansmeier, M. Platzner, M.J.H. Pantho, D. Andrews, Journal of Signal Processing Systems (2019).
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2018 | Dissertation | LibreCat-ID: 3720
FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization
N. Ho, FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization, Paderborn University, 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Static Scheduling Algorithms for Heterogeneous Compute Nodes
J.-P. Schnuer, Static Scheduling Algorithms for Heterogeneous Compute Nodes, 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Enforcing IP Core Connection Properties with Verifiable Security Monitors
F.P. Jentzsch, Enforcing IP Core Connection Properties with Verifiable Security Monitors, Universität Paderborn, 2018.
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2018 | Preprint | LibreCat-ID: 3586
CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Third Workshop on Approximate Computing (AxC 2018) (n.d.).
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2018 | Journal Article | LibreCat-ID: 12965
R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints
I. Ghribi, R.B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, M. Platzner, IEEE Access (2018) 14078–14092.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Evaluation of OpenCL-based Compilation for FPGAs
M. Croce, Evaluation of OpenCL-Based Compilation for FPGAs, 2018.
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2018 | Conference Paper | LibreCat-ID: 3373
An FPGA/HMC-Based Accelerator for Resolution Proof Checking
T. Hansmeier, M. Platzner, D. Andrews, in: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2018, pp. 153–165.
LibreCat | Files available | DOI
 

2018 | Mastersthesis | LibreCat-ID: 10782
Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data
L. Clausing, Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data, Ruhr-University Bochum, 2018.
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2018 | Conference Paper | LibreCat-ID: 3362
Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
A. Lösch, A. Wiens, M. Platzner, in: Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Springer International Publishing, Cham, 2018, pp. 73–84.
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2018 | Conference Paper | LibreCat-ID: 10598
An MCTS-based Framework for Synthesis of Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
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2018 | Conference Paper | LibreCat-ID: 5547
A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018.
LibreCat | Files available | DOI
 

2018 | Preprint | LibreCat-ID: 1165
Making the Case for Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, 4th Workshop On Approximate Computing (WAPCO 2018) (2018).
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2017 | Bachelorsthesis | LibreCat-ID: 3580
An FPGA Accelerator for Checking Resolution Proofs
T. Hansmeier, An FPGA Accelerator for Checking Resolution Proofs, Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 74
OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 10666
Acceleration of Industrial Analytics Functions on a Platform FPGA
U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA, Paderborn University, 2017.
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2017 | Conference Paper | LibreCat-ID: 10630
A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller
A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.
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2017 | Journal Article | LibreCat-ID: 10611
Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus
J. Anwer, M. Platzner, Microprocessors and Microsystems (2017) 160–172.
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2017 | Journal Article | LibreCat-ID: 68
Proof-Carrying Hardware via Inductive Invariants
T. Isenberg, M. Platzner, H. Wehrheim, T. Wiersema, ACM Transactions on Design Automation of Electronic Systems (2017) 61:1--61:23.
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2017 | Journal Article | LibreCat-ID: 10600
The First 25 Years of the FPL Conference – Significant Papers
P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, ACM Transactions on Reconfigurable Technology and Systems (2017).
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2017 | Bachelorsthesis | LibreCat-ID: 10613
An AR-based Training and Assessment System for Myoelectrical Prosthetic Control
C. Kaltschmidt, An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control, Paderborn University, 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
A Framework for the Synthesis of Approximate Circuits
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
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2017 | Journal Article | LibreCat-ID: 10601
Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial)
R. F. DeMara, M. Platzner, M. Ottavi, IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing (2017).
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2017 | Conference Paper | LibreCat-ID: 65
reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements
A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
Reconfigurable Cryptographic Services
A. Dietrich, Reconfigurable Cryptographic Services, Paderborn University, 2017.
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2016 | Conference Paper | LibreCat-ID: 13152
Monte-Carlo Simulation Balancing Revisited
T. Graf, M. Platzner, in: IEEE Computational Intelligence and Games 2016, 2016.
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2016 | Book Chapter | LibreCat-ID: 156
Self-aware Compute Nodes
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, in: Self-Aware Computing Systems, Springer International Publishing, Cham, 2016, pp. 145–165.
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2016 | Conference Paper | LibreCat-ID: 168
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
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2016 | Conference Paper | LibreCat-ID: 132
Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware
T. Wiersema, M. Platzner, in: Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
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2016 | Bachelorsthesis | LibreCat-ID: 10755
Konzeption und Implementierung einer digitalen Ansteuerung für den Betrieb einer elektrischen Sendereinheit für induktive Energieübertragung
M. Schmidt, Konzeption Und Implementierung Einer Digitalen Ansteuerung Für Den Betrieb Einer Elektrischen Sendereinheit Für Induktive Energieübertragung, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10616
Implementation of Bilinear Pairings on Reconfigurable Hardware
A.S. Nassery, Implementation of Bilinear Pairings on Reconfigurable Hardware, Paderborn University, 2016.
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2016 | Bachelorsthesis | LibreCat-ID: 10781
Custom Memory Controller for ReconOS
S. Hermansen, Custom Memory Controller for ReconOS, Paderborn University, 2016.
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2016 | Journal Article | LibreCat-ID: 10661
Adaptive playouts for online learning of policies during Monte Carlo Tree Search
T. Graf, M. Platzner, Journal Theoretical Computer Science 644 (2016) 53–62.
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2016 | Book Chapter | LibreCat-ID: 29
ReconOS
A. Agne, M. Platzner, C. Plessl, M. Happe, E. Lübbers, in: D. Koch, F. Hannig, D. Ziener (Eds.), FPGAs for Software Programmers, Springer International Publishing, Cham, 2016, pp. 227–244.
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2016 | Book (Editor) | LibreCat-ID: 12972
Self-aware Computing Systems: An Engineering Approach
P.R. Lewis, M. Platzner, B. Rinner, J. Tørresen, X. Yao, eds., Self-Aware Computing Systems: An Engineering Approach, Springer, Cham, 2016.
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2016 | Conference Paper | LibreCat-ID: 5812
FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
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2016 | Journal Article | LibreCat-ID: 222
An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip
T. Wiersema, A. Bockhorn, M. Platzner, Computers & Electrical Engineering (2016) 112--122.
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2016 | Mastersthesis | LibreCat-ID: 10617
Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method
O. Amin, Acceleration of EMTP for Distribution Networks on Data Flow Machines Using the Latency Insertion Method, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10706
Operating System Support for Reconfigurable Cache
V. Makeswaran, Operating System Support for Reconfigurable Cache, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10612
Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion
J. Cedric Mertens, Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion, Paderborn University, 2016.
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2016 | Conference Paper | LibreCat-ID: 11949
FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L.M. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10707
Private/Shared Data Classification and Implementation for a Multi-Softcore Platform
I. Ibne Ashraf, Private/Shared Data Classification and Implementation for a Multi-Softcore Platform, Paderborn University, 2016.
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2016 | Bachelorsthesis | LibreCat-ID: 10695
Beschleunigte Simulation elektrischer Stromnetze mit GPUs
J. Horstmann, Beschleunigte Simulation Elektrischer Stromnetze Mit GPUs, Paderborn University, 2016.
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2016 | Conference Paper | LibreCat-ID: 13151
Using Deep Convolutional Neural Networks in Monte Carlo Tree Search
T. Graf, M. Platzner, in: Computer and Games 2016, 2016.
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2015 | Bachelorsthesis | LibreCat-ID: 3364
Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten
C. Knorr, Evaluation von Bildverarbeitungsalgorithmen in heterogenen Rechenknoten, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10615
Self-Optimizing Organic Cache
A.F. Ahmed, Self-Optimizing Organic Cache, Paderborn University, 2015.
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2015 | Conference Paper | LibreCat-ID: 269
On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach
T. Wiersema, S. Wu, M. Platzner, in: Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
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2015 | Journal Article | LibreCat-ID: 1768
Aktuelles Schlagwort: Approximate Computing
C. Plessl, M. Platzner, P.J. Schreier, Informatik Spektrum (2015) 396–399.
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2015 | Conference Paper | LibreCat-ID: 238
Transparent offloading of computational hotspots from binary code to Xeon Phi
M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083.
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2015 | Conference Paper | LibreCat-ID: 303
Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores
M. Damschen, C. Plessl, in: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
LibreCat | Files available | arXiv
 

2015 | Conference Paper | LibreCat-ID: 13153
Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning
T. Graf, M. Platzner, in: Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, Springer International Publishing, 2015, pp. 1–11.
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2015 | Dissertation | LibreCat-ID: 10624
Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing
T. Beisel, Management and Scheduling of Accelerators for Heterogeneous High-Performance Computing, Logos Verlag Berlin GmbH, Berlin, 2015.
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2015 | Journal Article | LibreCat-ID: 296
Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study
T. Kenter, H. Schmitz, C. Plessl, International Journal of Reconfigurable Computing (IJRC) 2015 (2015).
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2015 | Mastersthesis | LibreCat-ID: 10726
Acceleration of Artificial Neural Networks on a Zynq Platform
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform, Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10668
Evolution of Heat Flow Prediction Models for FPGA Devices
H. Hangmann, Evolution of Heat Flow Prediction Models for FPGA Devices, Paderborn University, 2015.
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2015 | Bachelorsthesis | LibreCat-ID: 10714
Konzept und Implementation einer Benutzeroberfläche zur Generierung virtueller FPGAs
R. Meißner, Konzept Und Implementation Einer Benutzeroberfläche Zur Generierung Virtueller FPGAs, Paderborn University, 2015.
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2015 | Journal Article | LibreCat-ID: 1772
Self-Aware and Self-Expressive Systems – Guest Editor's Introduction
J. Torresen, C. Plessl, X. Yao, IEEE Computer 48 (2015) 18–20.
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2015 | Mastersthesis | LibreCat-ID: 10671
Computer Vision basierte Klassifikation von HD EMG Signalen
C. Haupt, Computer Vision Basierte Klassifikation von HD EMG Signalen, Paderborn University, 2015.
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2015 | Conference Paper | LibreCat-ID: 1773
Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm
J. Schumacher, J. T. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann-Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. P. Schreuder, W. Vandelli, J. Vermeulen, J. Zhang, in: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015.
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2014 | Conference Paper | LibreCat-ID: 408
Integrating Software and Hardware Verification
M.-C. Jakobs, M. Platzner, T. Wiersema, H. Wehrheim, in: E. Albert, E. Sekerinski (Eds.), Proceedings of the 11th International Conference on Integrated Formal Methods (IFM), 2014, pp. 307–322.
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2014 | Bachelorsthesis | LibreCat-ID: 10665
Entwicklung einer codegrößenoptimierten Softwarebibliothek für 8-Bit Mikrocontroller in netzunabhängigen Notleuchten
C. Hagedorn, Entwicklung Einer Codegrößenoptimierten Softwarebibliothek Für 8-Bit Mikrocontroller in Netzunabhängigen Notleuchten, Paderborn University, 2014.
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2014 | Bachelorsthesis | LibreCat-ID: 10627
Echtzeit Klassifikation von sEMG Signalen mit einem low-cost DSP Evaluation Board
A. Bockhorn, Echtzeit Klassifikation von SEMG Signalen Mit Einem Low-Cost DSP Evaluation Board, Paderborn University, 2014.
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2014 | Conference Paper | LibreCat-ID: 439
Deferring Accelerator Offloading Decisions to Application Runtime
G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
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2014 | Conference Paper | LibreCat-ID: 388
Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer
T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.
LibreCat | Files available | DOI
 

2014 | Journal Article | LibreCat-ID: 1779
Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers
H. Giefers, C. Plessl, J. Förstner, ACM SIGARCH Computer Architecture News 41 (2014) 65–70.
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2014 | Journal Article | LibreCat-ID: 10603
An FPGA-based Reconfigurable Mesh Many-Core
H. Giefers, M. Platzner, IEEE Transactions on Computers 63 (2014) 2919–2932.
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2014 | Journal Article | LibreCat-ID: 365
Self-awareness as a Model for Designing and Operating Heterogeneous Multicores
A. Agne, M. Happe, A. Lösch, C. Plessl, M. Platzner, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2014).
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2014 | Conference Paper | LibreCat-ID: 1782
On Semeai Detection in Monte-Carlo Go
T. Graf, L. Schaefers, M. Platzner, in: Proc. Conf. on Computers and Games (CG), Springer, Switzerland, 2014, pp. 14–25.
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2014 | Conference Paper | LibreCat-ID: 377
Reconstructing AES Key Schedules from Decayed Memory with FPGAs
H. Riebler, T. Kenter, C. Plessl, C. Sorge, in: Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–229.
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2014 | Book Chapter | LibreCat-ID: 335
Verschiebungen an der Grenze zwischen Hardware und Software
M. Platzner, C. Plessl, in: J. Künsemöller, N.O. Eke, L. Foit, T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen, Wilhelm Fink, Paderborn, 2014, pp. 123–144.
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2014 | Journal Article | LibreCat-ID: 328
ReconOS - An Operating System Approach for Reconfigurable Computing
A. Agne, M. Happe, A. Keller, E. Lübbers, B. Plattner, M. Platzner, C. Plessl, IEEE Micro 34 (2014) 60–71.
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2014 | Conference Paper | LibreCat-ID: 347
Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection
S. Meisner, M. Platzner, in: D. Goehringer, M. Santambrogio, J.P. Cardoso, K. Bertels (Eds.), Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, 2014, pp. 283–290.
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2014 | Mastersthesis | LibreCat-ID: 10744
Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10701
Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
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2014 | Bachelorsthesis | LibreCat-ID: 10679
EMG-basierte simultane und proportionale Online-Steuerung einer virtuellen Prothese
F. König, EMG-Basierte Simultane Und Proportionale Online-Steuerung Einer Virtuellen Prothese, Paderborn University, 2014.
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2014 | Bachelorsthesis | LibreCat-ID: 10732
The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores
C. Rüthing, The Xilinx Zynq Architecture as a Platform for Reconfigurable Heterogeneous Multi-Cores, Paderborn University, 2014.
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2014 | Conference Paper | LibreCat-ID: 13154
Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go
T. Graf, M. Platzner, in: 2014 IEEE Conference on Computational Intelligence and Games, 2014, pp. 1–8.
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2014 | Dissertation | LibreCat-ID: 10733
Parallel Monte-Carlo Tree Search for HPC Systems and its Application to Computer Go
L. Schäfers, Parallel Monte-Carlo Tree Search for HPC Systems and Its Application to Computer Go, Logos Verlag Berlin GmbH, Berlin, 2014.
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2014 | Conference Paper | LibreCat-ID: 406
Kernel-Centric Acceleration of High Accuracy Stereo-Matching
T. Kenter, H. Schmitz, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.
LibreCat | Files available | DOI
 

2014 | Journal Article | LibreCat-ID: 363
Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators
A. Agne, H. Hangmann, M. Happe, M. Platzner, C. Plessl, Microprocessors and Microsystems 38 (2014) 911–919.
LibreCat | Files available | DOI
 

2014 | Conference Paper | LibreCat-ID: 433
Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA
T. Wiersema, A. Bockhorn, M. Platzner, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.
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2014 | Conference Paper | LibreCat-ID: 399
Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring
T. Wiersema, S. Drzevitzky, M. Platzner, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp. 167–174.
LibreCat | Files available | DOI
 

2014 | Mastersthesis | LibreCat-ID: 10715
Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs
R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs, Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10645
Easy-to-use-on-the-fly binary program acceleration on many-cores
M. Damschen, Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores, Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10640
A Generalized Loop Accelerator Implemented as a Coarse-Grained Array
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array, Paderborn University, 2014.
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2014 | Conference Paper | LibreCat-ID: 1780
SAVE: Towards efficient resource management in heterogeneous system architectures
G. C. Durelli, M. Copolla, K. Djafarian, G. Koranaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014.
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2014 | Conference Paper | LibreCat-ID: 1778
Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach
G. C. Durelli, M. Pogliani, A. Miele, C. Plessl, H. Riebler, G.F. Vaz, M. D. Santambrogio, C. Bolchini, in: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–149.
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2014 | Journal Article | LibreCat-ID: 10602
A Novel Technique and its Application to Computer Go
L. Schaefers, M. Platzner, IEEE Transactions on Computational Intelligence and AI in Games 6 (2014) 361–374.
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2013 | Conference Paper | LibreCat-ID: 1786
FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm
S. Kasap, S. Redif, in: Proc. IEEE Signal Processing and Communications Conf. (SUI), IEEE, 2013.
LibreCat | DOI
 

2013 | Mastersthesis | LibreCat-ID: 10730
Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
LibreCat
 

2013 | Conference Paper | LibreCat-ID: 528
FPGA-accelerated Key Search for Cold-Boot Attacks against AES
H. Riebler, T. Kenter, C. Sorge, C. Plessl, in: Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–389.
LibreCat | Files available | DOI
 

2013 | Journal Article | LibreCat-ID: 10684
Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers
P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, B. Sick, IEEE Transactions on Evolutionary Computation 17 (2013) 46–63.
LibreCat | DOI
 

2013 | Conference Paper | LibreCat-ID: 1787
Parallel Macro Pipelining on the Intel SCC Many-Core Computer
T. Suess, A. Schoenrock, S. Meisner, C. Plessl, in: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, Washington, DC, USA, 2013, pp. 64–73.
LibreCat | DOI
 

2013 | Conference Paper | LibreCat-ID: 505
On-The-Fly Computing: A Novel Paradigm for Individualized IT Services
M. Happe, P. Kling, C. Plessl, M. Platzner, F. Meyer auf der Heide, in: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013.
LibreCat | Files available | DOI
 

2013 | Bachelorsthesis | LibreCat-ID: 10743
Beschleunigung von Einzelbild-Erkennungsverfahren auf Datenfluss basierenden HPC Systemen
P. Steppeler, Beschleunigung von Einzelbild-Erkennungsverfahren Auf Datenfluss Basierenden HPC Systemen, Paderborn University, 2013.
LibreCat
 

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