8 Publications

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[8]
2020 | Conference Paper | LibreCat-ID: 24021
Above 60 GHz Bandwidth 10 GS/s Sampling Rate Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology
L. Wu, M. Weizel, C. Scheytt, in: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, Sevilla, Spain, 2020.
LibreCat | Files available | DOI
 
[7]
2019 | Conference Paper | LibreCat-ID: 24049
70 GHz Large-signal Bandwidth Sampler Using Current-mode Integrate-and-Hold Circuit in 130 nm SiGe BiCMOS Technology
L. Wu, M. Weizel, C. Scheytt, in: Asia-Pacific Microwave Conference (APMC), 2019.
LibreCat | Files available | DOI
 
[6]
2019 | Conference Paper | LibreCat-ID: 24052
A 70 GHz Small-signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology
L. Wu, M. Weizel, C. Scheytt, in: 26th IEEE International Conference on Electronics Circuits and Systems (ICECS), Genova, Italy, 2019.
LibreCat | Files available | DOI
 
[5]
2018 | Misc | LibreCat-ID: 24198
Integrier‐ und Halte‐Schaltung (Patent)
C. Scheytt, L. Wu, Integrier‐ Und Halte‐Schaltung (Patent), 2018.
LibreCat
 
[4]
2018 | Conference Paper | LibreCat-ID: 24196
Analog fault simulation automation at schematic level with random sampling techniques
L. Wu, M.K. Hussain, S. Abughannam, W. Müller, C. Scheytt, W. Ecker, in: 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)) , IEEE, Italy/Taormina, 2018.
LibreCat | Files available | DOI
 
[3]
2017 | Conference Paper | LibreCat-ID: 24223
SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study
L. Wu, S. Abughannam, W. Müller, C. Scheytt, W. Ecker, in: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES), Lausanne, Switzerland, 2017, p. 68.
LibreCat | Files available
 
[2]
2016 | Conference Paper | LibreCat-ID: 24263
Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study
S. Abughannam, L. Wu, W. Müller, C. Scheytt, in: Analog 2016 - VDE, 2016.
LibreCat
 
[1]
2015 | Conference Paper | LibreCat-ID: 24289
On the Correlation of HW Faults and SW Errors
W. Müller, L. Wu, C. Scheytt, M. Becker, S. Schoenberg, in: D. Mueller-Gritschneder, W. Müller, S. Mitra (Eds.), Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014), Amsterdam, Netherland, 2015.
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8 Publications

Mark all

[8]
2020 | Conference Paper | LibreCat-ID: 24021
Above 60 GHz Bandwidth 10 GS/s Sampling Rate Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology
L. Wu, M. Weizel, C. Scheytt, in: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, Sevilla, Spain, 2020.
LibreCat | Files available | DOI
 
[7]
2019 | Conference Paper | LibreCat-ID: 24049
70 GHz Large-signal Bandwidth Sampler Using Current-mode Integrate-and-Hold Circuit in 130 nm SiGe BiCMOS Technology
L. Wu, M. Weizel, C. Scheytt, in: Asia-Pacific Microwave Conference (APMC), 2019.
LibreCat | Files available | DOI
 
[6]
2019 | Conference Paper | LibreCat-ID: 24052
A 70 GHz Small-signal Bandwidth 40 GS/s Track-and-Hold Amplifier in 130 nm SiGe BiCMOS Technology
L. Wu, M. Weizel, C. Scheytt, in: 26th IEEE International Conference on Electronics Circuits and Systems (ICECS), Genova, Italy, 2019.
LibreCat | Files available | DOI
 
[5]
2018 | Misc | LibreCat-ID: 24198
Integrier‐ und Halte‐Schaltung (Patent)
C. Scheytt, L. Wu, Integrier‐ Und Halte‐Schaltung (Patent), 2018.
LibreCat
 
[4]
2018 | Conference Paper | LibreCat-ID: 24196
Analog fault simulation automation at schematic level with random sampling techniques
L. Wu, M.K. Hussain, S. Abughannam, W. Müller, C. Scheytt, W. Ecker, in: 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)) , IEEE, Italy/Taormina, 2018.
LibreCat | Files available | DOI
 
[3]
2017 | Conference Paper | LibreCat-ID: 24223
SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study
L. Wu, S. Abughannam, W. Müller, C. Scheytt, W. Ecker, in: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES), Lausanne, Switzerland, 2017, p. 68.
LibreCat | Files available
 
[2]
2016 | Conference Paper | LibreCat-ID: 24263
Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study
S. Abughannam, L. Wu, W. Müller, C. Scheytt, in: Analog 2016 - VDE, 2016.
LibreCat
 
[1]
2015 | Conference Paper | LibreCat-ID: 24289
On the Correlation of HW Faults and SW Errors
W. Müller, L. Wu, C. Scheytt, M. Becker, S. Schoenberg, in: D. Mueller-Gritschneder, W. Müller, S. Mitra (Eds.), Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014), Amsterdam, Netherland, 2015.
LibreCat
 

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