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84 Publications


2004 | Conference Paper | LibreCat-ID: 13001
Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections.” In IEEE International Test Conference (ITC’04), 926–35. Charlotte, NC, USA: IEEE, 2004. https://doi.org/10.1109/test.2004.1387357.
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2003 | Conference Paper | LibreCat-ID: 13002
Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “A Hybrid Coding Strategy for Optimized Test Data Compression.” In IEEE International Test Conference (ITC’03), 451–59. Charlotte, NC, USA: IEEE, 2003. https://doi.org/10.1109/test.2003.1270870.
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2001 | Conference Paper | LibreCat-ID: 13004
Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.” In IEEE International Test Conference (ITC’01), 894–902. Baltimore, MD, USA: IEEE, 2001. https://doi.org/10.1109/test.2001.966712.
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2000 | Conference Paper | LibreCat-ID: 13005
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” In IEEE International Test Conference (ITC’00), 778–84. Atlantic City, NJ, USA: IEEE, 2000. https://doi.org/10.1109/test.2000.894274.
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1999 | Conference Paper | LibreCat-ID: 13006
Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Error Detecting Refreshment for Embedded DRAMs.” In 17th IEEE VLSI Test Symposium (VTS’99), 384–90. Dana Point, CA, USA: IEEE, 1999. https://doi.org/10.1109/vtest.1999.766693.
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1999 | Conference Paper | LibreCat-ID: 13066
N. Yarmolik, Vyacheslav, Iuri V. Bykov, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.” In Third European Dependable Computing Conference (EDCC-3). Prague, Czech Republic, 1999.
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1999 | Conference Paper | LibreCat-ID: 13067
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Symmetric Transparent BIST for RAMs.” In Design Automation and Test in Europe (DATE’99), 702–7. Munich, Germany, 1999.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Fast Self-Recovering Controllers.” In 16th IEEE VLSI Test Symposium (VTS’98), 296–302. Monterey, CA, USA: IEEE, 1998. https://doi.org/10.1109/vtest.1998.670883.
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1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.” In Design Automation and Test in Europe (DATE’98), 173–79. Paris, France, 1998. https://doi.org/10.1109/date.1998.655853.
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1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik, Vyacheslav, Yuri V. Klimets, Sybille Hellebrand, and Hans-Joachim Wunderlich. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” In Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 27–33. Szczyrk, Poland, 1998.
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1997 | Conference Paper | LibreCat-ID: 13009
Tsai, Kun-Han, Sybille Hellebrand, Malgorzata Marek-Sadowska, and Janusz Rajski. “STARBIST: Scan Autocorrelated Random Pattern Generation.” In 34th ACM/IEEE Design Automation Conference (DAC’97). Anaheim, CA, USA: IEEE, 1997. https://doi.org/10.1109/dac.1997.597194.
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1996 | Conference Paper | LibreCat-ID: 13010
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996. https://doi.org/10.1109/test.1996.556962.
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1995 | Conference Paper | LibreCat-ID: 13012
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. “Pattern Generation for a Deterministic BIST Scheme.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), 88–94. San Jose, CA, USA: IEEE, 1995. https://doi.org/10.1109/iccad.1995.479997.
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1994 | Conference Paper | LibreCat-ID: 13014
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures.” In ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 110–16. San Jose, CA, USA: IEEE, 1994. https://doi.org/10.1109/iccad.1994.629752.
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1994 | Conference Paper | LibreCat-ID: 13059
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthese Schneller Selbsttestbarer Steuerwerke.” In Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, 3–11. Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994.
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1994 | Conference Paper | LibreCat-ID: 13013
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthesis of Self-Testable Controllers.” In European Design and Test Conference (EDAC/ETC/EUROASIC), 580–85. Paris, France, 1994. https://doi.org/10.1109/edtc.1994.326815.
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1993 | Conference Paper | LibreCat-ID: 13015
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. “An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’93). IEEE, 1993. https://doi.org/10.1109/iccad.1993.580117.
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1992 | Conference Paper | LibreCat-ID: 13016
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. “Generation of Vector Patterns through Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” In IEEE International Test Conference (ITC’92), 120–29. Baltimore, MD, USA: IEEE, 1992. https://doi.org/10.1109/test.1992.527812.
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1990 | Conference Paper | LibreCat-ID: 13018
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Tools and Devices Supporting the Pseudo-Exhaustive Test.” In European Design Automation Conference (EDAC’90), 13–17. Glasgow, UK: IEEE, 1990. https://doi.org/10.1109/edac.1990.136612.
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1990 | Conference Paper | LibreCat-ID: 13019
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Oliver F. Haberl. “Generating Pseudo-Exhaustive Vectors for External Testing.” In IEEE International Test Conference (ITC’90), 670–79. Washington, DC, USA: IEEE, 1990. https://doi.org/10.1109/test.1990.114082.
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