Please note that LibreCat no longer supports Internet Explorer versions 8 or 9 (or earlier).
We recommend upgrading to the latest Internet Explorer, Google Chrome, or Firefox.
84 Publications
- 1
- 2
- 3
- 4 (current)
- 5
2004 | Conference Paper | LibreCat-ID: 13001
A. Wuertenberger, C. S. Tautermann, and S. Hellebrand, “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections,” in IEEE International Test Conference (ITC’04), 2004, pp. 926–935, doi: 10.1109/test.2004.1387357.
LibreCat
| DOI
2003 | Conference Paper | LibreCat-ID: 13002
A. Wuertenberger, C. S. Tautermann, and S. Hellebrand, “A Hybrid Coding Strategy for Optimized Test Data Compression,” in IEEE International Test Conference (ITC’03), 2003, pp. 451–459, doi: 10.1109/test.2003.1270870.
LibreCat
| DOI
2001 | Conference Paper | LibreCat-ID: 13004
H.-G. Liang, S. Hellebrand, and H.-J. Wunderlich, “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST,” in IEEE International Test Conference (ITC’01), 2001, pp. 894–902, doi: 10.1109/test.2001.966712.
LibreCat
| DOI
2000 | Conference Paper | LibreCat-ID: 13005
S. Hellebrand, H.-G. Liang, and H.-J. Wunderlich, “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters,” in IEEE International Test Conference (ITC’00), 2000, pp. 778–784, doi: 10.1109/test.2000.894274.
LibreCat
| DOI
1999 | Conference Paper | LibreCat-ID: 13006
S. Hellebrand, H.-J. Wunderlich, A. A. Ivaniuk, Y. V. Klimets, and V. N. Yarmolik, “Error Detecting Refreshment for Embedded DRAMs,” in 17th IEEE VLSI Test Symposium (VTS’99), 1999, pp. 384–390, doi: 10.1109/vtest.1999.766693.
LibreCat
| DOI
1999 | Conference Paper | LibreCat-ID: 13066
V. N. Yarmolik, I. V. Bykov, S. Hellebrand, and H.-J. Wunderlich, “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms,” 1999.
LibreCat
1999 | Conference Paper | LibreCat-ID: 13067
S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Symmetric Transparent BIST for RAMs,” in Design Automation and Test in Europe (DATE’99), 1999, pp. 702–707.
LibreCat
1998 | Conference Paper | LibreCat-ID: 13007
A. Hertwig, S. Hellebrand, and H.-J. Wunderlich, “Fast Self-Recovering Controllers,” in 16th IEEE VLSI Test Symposium (VTS’98), 1998, pp. 296–302, doi: 10.1109/vtest.1998.670883.
LibreCat
| DOI
1998 | Conference Paper | LibreCat-ID: 13008
S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs,” in Design Automation and Test in Europe (DATE’98), 1998, pp. 173–179, doi: 10.1109/date.1998.655853.
LibreCat
| DOI
1998 | Conference Paper | LibreCat-ID: 13063
V. N. Yarmolik, Y. V. Klimets, S. Hellebrand, and H.-J. Wunderlich, “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression,” in Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 1998, pp. 27–33.
LibreCat
1997 | Conference Paper | LibreCat-ID: 13009
K.-H. Tsai, S. Hellebrand, M. Marek-Sadowska, and J. Rajski, “STARBIST: Scan Autocorrelated Random Pattern Generation,” 1997, doi: 10.1109/dac.1997.597194.
LibreCat
| DOI
1996 | Conference Paper | LibreCat-ID: 13010
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” in IEEE International Test Conference (ITC’96), 1996, pp. 195–204, doi: 10.1109/test.1996.556962.
LibreCat
| DOI
1995 | Conference Paper | LibreCat-ID: 13012
S. Hellebrand, B. Reeb, S. Tarnick, and H.-J. Wunderlich, “Pattern Generation for a Deterministic BIST Scheme,” in ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), 1995, pp. 88–94, doi: 10.1109/iccad.1995.479997.
LibreCat
| DOI
1994 | Conference Paper | LibreCat-ID: 13014
S. Hellebrand and H.-J. Wunderlich, “An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures,” in ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 1994, pp. 110–116, doi: 10.1109/iccad.1994.629752.
LibreCat
| DOI
1994 | Conference Paper | LibreCat-ID: 13059
S. Hellebrand and H.-J. Wunderlich, “Synthese schneller selbsttestbarer Steuerwerke,” in Tagungsband der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme, 1994, pp. 3–11.
LibreCat
1994 | Conference Paper | LibreCat-ID: 13013
S. Hellebrand and H.-J. Wunderlich, “Synthesis of Self-Testable Controllers,” in European Design and Test Conference (EDAC/ETC/EUROASIC), 1994, pp. 580–585, doi: 10.1109/edtc.1994.326815.
LibreCat
| DOI
1993 | Conference Paper | LibreCat-ID: 13015
S. Venkataraman, J. Rajski, S. Hellebrand, and S. Tarnick, “An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers,” 1993, doi: 10.1109/iccad.1993.580117.
LibreCat
| DOI
1992 | Conference Paper | LibreCat-ID: 13016
S. Hellebrand, S. Tarnick, J. Rajski, and B. Courtois, “Generation of Vector Patterns through Reseeding of Multiple-Polynomial Linear Feedback Shift Registers,” in IEEE International Test Conference (ITC’92), 1992, pp. 120–129, doi: 10.1109/test.1992.527812.
LibreCat
| DOI
1990 | Conference Paper | LibreCat-ID: 13018
S. Hellebrand and H.-J. Wunderlich, “Tools and Devices Supporting the Pseudo-Exhaustive Test,” in European Design Automation Conference (EDAC’90), 1990, pp. 13–17, doi: 10.1109/edac.1990.136612.
LibreCat
| DOI
1990 | Conference Paper | LibreCat-ID: 13019
S. Hellebrand, H.-J. Wunderlich, and O. F. Haberl, “Generating Pseudo-Exhaustive Vectors for External Testing,” in IEEE International Test Conference (ITC’90), 1990, pp. 670–679, doi: 10.1109/test.1990.114082.
LibreCat
| DOI
- 1
- 2
- 3
- 4 (current)
- 5