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151 Publications
2007 | Conference Paper | LibreCat-ID: 12995
S. Hellebrand, C. G. Zoellin, H.-J. Wunderlich, S. Ludwig, T. Coym, and B. Straube, “A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction,” in 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), 2007, pp. 50–58, doi: 10.1109/dft.2007.43.
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| DOI
2007 | Conference Paper | LibreCat-ID: 12996
P. Oehler, S. Hellebrand, and H.-J. Wunderlich, “Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair,” in 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07), 2007, pp. 185–190, doi: 10.1109/ddecs.2007.4295278.
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2007 | Conference Paper | LibreCat-ID: 12997
P. Oehler, S. Hellebrand, and H.-J. Wunderlich, “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy,” in 12th IEEE European Test Symposium (ETS’07), 2007, pp. 91–96, doi: 10.1109/ets.2007.10.
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2007 | Conference Paper | LibreCat-ID: 13037
S. Hellebrand, C. G. Zoellin, H.-J. Wunderlich, S. Ludwig, T. Coym, and B. Straube, “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance,” 2007.
LibreCat
2007 | Journal Article | LibreCat-ID: 13036
S. Hellebrand, C. G. Zoellin, H.-J. Wunderlich, S. Ludwig, T. Coym, and B. Straube, “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance,” Informacije MIDEM, Ljubljana (Invited Paper), vol. 37, no. 4 (124), pp. 212–219, 2007.
LibreCat
2007 | Journal Article | LibreCat-ID: 13044
M. Ali, S. Hessler, M. Welzl, and S. Hellebrand, “An Efficient Fault Tolerant Mechanism to Deal with Permanent and Transient Failures in a Network on Chip,” International Journal on High Performance Systems Architecture, vol. 1, no. 2, pp. 113–123, 2007.
LibreCat
2007 | Conference Paper | LibreCat-ID: 13040
M. Ali, M. Welzl, S. Hessler, and S. Hellebrand, “A Fault Tolerant Mechanism for Handling Permanent and Transient Failures in a Network on Chip,” in 4th International Conference on Information Technology: New Generations (ITNG’07), 2007, pp. 1027–1032.
LibreCat
2007 | Conference Paper | LibreCat-ID: 13041
B. Becker, I. Polian, S. Hellebrand, B. Straube, and H.-J. Wunderlich, “Test und Zuverlässigkeit nanoelektronischer Systeme,” 2007.
LibreCat
2006 | Journal Article | LibreCat-ID: 13045
B. Becker, I. Polian, S. Hellebrand, B. Straube, and H.-J. Wunderlich, “DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme,” it - Information Technology, vol. 48, no. 5, pp. 305–311, 2006.
LibreCat
2005 | Misc | LibreCat-ID: 13101
M. Ali, M. Welzl, and S. Hellebrand, Dynamic Routing: A Prerequisite for Reliable NoCs. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.
LibreCat
2005 | Misc | LibreCat-ID: 13102
P. Oehler and S. Hellebrand, Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.
LibreCat
2005 | Conference Paper | LibreCat-ID: 12999
M. Ali, M. Welzl, M. Zwicknagl, and S. Hellebrand, “Considerations for Fault-Tolerant Networks on Chips,” 2005, doi: 10.1109/icm.2005.1590063.
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2005 | Conference Paper | LibreCat-ID: 13000
P. Oehler and S. Hellebrand, “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities,” in 10th IEEE European Test Symposium (ETS’05), 2005, pp. 148–153, doi: 10.1109/ets.2005.28.
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2005 | Conference Paper | LibreCat-ID: 12998
M. Ali, M. Welzl, and S. Hellebrand, “A Dynamic Routing Mechanism for Network on Chip,” in 23rd IEEE NORCHIP Conference, 2005, pp. 70–73, doi: 10.1109/norchp.2005.1596991.
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2004 | Misc | LibreCat-ID: 13099
R. Breu, T. Fahringer, D. Fensel, S. Hellebrand, A. Middeldorp, and O. Scherzer, Im Westen viel Neues - Informatik an der Universität Innsbruck. OCG Journal, pp. 28-29, 2004.
LibreCat
2004 | Misc | LibreCat-ID: 13100
S. Hellebrand, A. Wuertenberger, and C. S. Tautermann, Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. 9th IEEE European Test Symposium, Ajaccio, Corsica, France, 2004.
LibreCat
2004 | Conference Paper | LibreCat-ID: 13001
A. Wuertenberger, C. S. Tautermann, and S. Hellebrand, “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections,” in IEEE International Test Conference (ITC’04), 2004, pp. 926–935, doi: 10.1109/test.2004.1387357.
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2003 | Misc | LibreCat-ID: 13098
R. Breu, S. Hellebrand, and M. Welzl, Experiences from Teaching Software Development in a Java Environment. Handouts ACS/IEEE Workshop on Practice and Experience with Java in Education, Tunis, Tunisia, 2003.
LibreCat
2003 | Conference Paper | LibreCat-ID: 13002
A. Wuertenberger, C. S. Tautermann, and S. Hellebrand, “A Hybrid Coding Strategy for Optimized Test Data Compression,” in IEEE International Test Conference (ITC’03), 2003, pp. 451–459, doi: 10.1109/test.2003.1270870.
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| DOI
2002 | Misc | LibreCat-ID: 13097
S. Hellebrand and A. Wuertenberger, Alternating Run-Length Coding: A Technique for Improved Test Data Compression. IEEE International Workshop on Test Resource Partitioning, Baltimore, MD, USA, 2002.
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