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165 Publications
2023 | Conference Paper | LibreCat-ID: 45830
Jafarzadeh, Hanieh, Florian Klemme, Jan Dennis Reimer, Zahra Paria Najafi Haghi, Hussam Amrouch, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Robust Pattern Generation for Small Delay Faults under Process Variations.” In IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023. Anaheim, CA, USA: IEEE, 2023.
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2022 | Journal Article | LibreCat-ID: 29351
Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Stress-Aware Periodic Test of Interconnects.” Journal of Electronic Testing, 2022. https://doi.org/10.1007/s10836-021-05979-5.
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2022 | Misc | LibreCat-ID: 29890
Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. EM-Aware Interconnect BIST. Online: European Workshop on Silicon Lifecycle Management, March 18, 2022, 2022.
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2020 | Conference Paper | LibreCat-ID: 19422
Sprenger, Alexander, Somayeh Sadeghi-Kohan, Jan Dennis Reimer, and Sybille Hellebrand. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy, 2020.
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2020 | Misc | LibreCat-ID: 15419
Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. Ludwigsburg: 32. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’20), 16. - 18. Februar 2020, 2020.
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2020 | Conference Paper | LibreCat-ID: 29200
Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects.” In 38th IEEE VLSI Test Symposium (VTS). Virtual Conference - Originally San Diego, CA, USA: IEEE, 2020. https://doi.org/10.1109/vts48691.2020.9107591.
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2020 | Conference Paper | LibreCat-ID: 19421
Holst, Stefan, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, and Xiaoqing Weng. “Logic Fault Diagnosis of Hidden Delay Defects.” In IEEE International Test Conference (ITC’20), November 2020. Virtual Conference - Originally Washington, DC, USA, 2020.
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2019 | Misc | LibreCat-ID: 8112
Maaz, Mohammad Urf, Alexander Sprenger, and Sybille Hellebrand. A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
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2019 | Journal Article | LibreCat-ID: 8667
Sprenger, Alexander, and Sybille Hellebrand. “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test.” Journal of Circuits, Systems and Computers 28, no. 1 (2019): 1–23. https://doi.org/10.1142/s0218126619400012.
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2019 | Journal Article | LibreCat-ID: 13048
Kampmann, Matthias, Michael A. Kochte, Chang Liu, Eric Schneider, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Built-in Test for Hidden Delay Faults.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 38, no. 10 (2019): 1956–68.
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2019 | Conference Paper | LibreCat-ID: 12918
Maaz, Mohammad Urf, Alexander Sprenger, and Sybille Hellebrand. “A Hybrid Space Compactor for Adaptive X-Handling.” In 50th IEEE International Test Conference (ITC), 1–8. Washington, DC, USA: IEEE, 2019.
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2018 | Misc | LibreCat-ID: 4576
Sprenger, Alexander, and Sybille Hellebrand. Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
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2018 | Journal Article | LibreCat-ID: 12974
Hellebrand, Sybille, Joerg Henkel, Anand Raghunathan, and Hans-Joachim Wunderlich. “Guest Editors’ Introduction - Special Issue on Approximate Computing.” IEEE Embedded Systems Letters 10, no. 1 (2018): 1–1. https://doi.org/10.1109/les.2018.2789942.
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2018 | Journal Article | LibreCat-ID: 13057
Kampmann, Matthias, and Sybille Hellebrand. “Design For Small Delay Test - A Simulation Study.” Microelectronics Reliability 80 (2018): 124–33.
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2018 | Misc | LibreCat-ID: 13072
Kampmann, Matthias, and Sybille Hellebrand. Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 19th Workshop on RTL and High Level Testing (WRTLT’18), Hefei, Anhui, China, 2018.
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2018 | Conference Paper | LibreCat-ID: 29460
Rezaeizadeh Rookerd, Ramin, Somayeh Sadeghi-Kohan, and Zainalabedin Navabi. “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture.” In Proceedings of the 2018 on Great Lakes Symposium on VLSI. ACM, 2018. https://doi.org/10.1145/3194554.3194599.
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2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” In 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Budapest, Hungary: IEEE, 2018. https://doi.org/10.1109/ddecs.2018.00020.
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2018 | Conference Paper | LibreCat-ID: 10575
Liu, Chang, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention.” In 27th IEEE Asian Test Symposium (ATS’18), 2018. https://doi.org/10.1109/ats.2018.00028.
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2018 | Conference Paper | LibreCat-ID: 29459
Sadeghi-Kohan, Somayeh, Arash Vafaei, and Zainalabedin Navabi. “Near-Optimal Node Selection Procedure for Aging Monitor Placement.” In 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS). IEEE, 2018. https://doi.org/10.1109/iolts.2018.8474120.
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2017 | Conference Paper | LibreCat-ID: 12973
Deshmukh, Jyotirmoy, Wolfgang Kunz, Hans-Joachim Wunderlich, and Sybille Hellebrand. “Special Session on Early Life Failures.” In 35th IEEE VLSI Test Symposium (VTS’17). Caesars Palace, Las Vegas, Nevada, USA: IEEE, 2017. https://doi.org/10.1109/vts.2017.7928933.
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