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136 Publications


2013 | Misc | LibreCat-ID: 13075
Cook A, Rodriguez Gomez L, Hellebrand S, Indlekofer T, Wunderlich H-J. Adaptive Test and Diagnosis of Intermittent Faults. 14th Latin American Test Workshop, Cordoba, Argentina; 2013.
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2013 | Conference Paper | LibreCat-ID: 12979
Hellebrand S. Analyzing and Quantifying Fault Tolerance Properties. In: {14th IEEE Latin American Test Workshop - (LATW’13)}. Cordoba, Argentina: {IEEE}; 2013. doi:10.1109/latw.2013.6562662
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2012 | Conference Paper | LibreCat-ID: 12980
Cook A, Hellebrand S, E. Imhof M, Mumtaz A, Wunderlich H-J. Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test. In: {13th IEEE Latin American Test Workshop (LATW’12)}. Quito, Ecuador: {IEEE}; 2012:1-4. doi:10.1109/latw.2012.6261229
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2012 | Conference Paper | LibreCat-ID: 12981
Cook A, Hellebrand S, Wunderlich H-J. Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test. In: {17th IEEE European Test Symposium (ETS’12)}. Annecy, France: {IEEE}; 2012:1-6. doi:10.1109/ets.2012.6233025
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2012 | Misc | LibreCat-ID: 13074
Cook A, Hellebrand S, Wunderlich H-J. Eingebaute Selbstdiagnose Mit Zufälligen Und Deterministischen Mustern. 24. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’12), Cottbus, Germany; 2012.
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2011 | Conference Paper | LibreCat-ID: 12984
Polian I, Becker B, Hellebrand S, Wunderlich H-J, Maxwell P. Towards Variation-Aware Test Methods. In: {16th IEEE European Test Symposium Trondheim (ETS’11),(Embedded Tutorial)}. Trondheim, Norway: {IEEE}; 2011. doi:10.1109/ets.2011.51
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2011 | Journal Article | LibreCat-ID: 13052
Hopsch F, Becker B, Hellebrand S, et al. Variation-Aware Fault Modeling. {SCIENCE CHINA Information Sciences, Science China Press, co-published with Springer}. 2011;54(4):1813-1826.
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2011 | Conference Paper | LibreCat-ID: 13053
Cook A, Hellebrand S, Indlekofer T, Wunderlich H-J. Robuster Selbsttest mit Diagnose. In: {5. GMM/GI/ITG Fachtagung “Zuverlässigkeit Und Entwurf”}. Hamburg, Germany; 2011:48-53.
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2011 | Conference Paper | LibreCat-ID: 12982
Cook A, Hellebrand S, Indlekofer T, Wunderlich H-J. Diagnostic Test of Robust Circuits. In: {20th IEEE Asian Test Symposium (ATS’11)}. New Delhi, India: {IEEE}; 2011:285-290. doi:10.1109/ats.2011.55
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch F, Becker B, Hellebrand S, et al. Variation-Aware Fault Modeling. In: {19th IEEE Asian Test Symposium (ATS’10)}. Shanghai, China: {IEEE}; 2010:87-93. doi:10.1109/ats.2010.24
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2010 | Conference Paper | LibreCat-ID: 12988
Froese V, Ibers R, Hellebrand S. Reusing NoC-Infrastructure for Test Data Compression. In: {28th IEEE VLSI Test Symposium (VTS’10)}. Santa Cruz, CA, USA: {IEEE}; 2010:227-231. doi:10.1109/vts.2010.5469570
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2010 | Conference Paper | LibreCat-ID: 13049
Becker B, Hellebrand S, Polian I, Straube B, Vermeiren W, Wunderlich H-J. Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits. In: {4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper)}. Chicago, IL, USA; 2010.
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2010 | Conference Paper | LibreCat-ID: 13051
Hunger M, Hellebrand S. Ausbeute und Fehlertoleranz bei dreifach modularer Redundanz. In: 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Wildbad Kreuth, Germany; 2010:81-88.
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer T, Schnittger M, Hellebrand S. Efficient Test Response Compaction for Robust BIST Using Parity Sequences. In: {28th IEEE International Conference on Computer Design (ICCD’10)}. Amsterdam, The Netherlands: {IEEE}; 2010:480-485. doi:10.1109/iccd.2010.5647648
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger M, Hellebrand S. The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems. In: {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}. Kyoto, Japan: {IEEE}; 2010:101-108. doi:10.1109/dft.2010.19
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2010 | Misc | LibreCat-ID: 10670
Fröse V, Ibers R, Hellebrand S. Testdatenkompression Mit Hilfe Der Netzwerkinfrastruktur. 22. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’10), Paderborn, Germany; 2010.
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2010 | Misc | LibreCat-ID: 13073
Hellebrand S. Nano-Electronic Systems. Editorial, it 4/2010, pp. 179-180; 2010.
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2010 | Conference Paper | LibreCat-ID: 12987
Becker B, Hellebrand S, Polian I, Straube B, Vermeiren W, Wunderlich H-J. Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits. In: {40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10)}. Chicago, IL, USA: {IEEE}; 2010. doi:10.1109/dsnw.2010.5542612
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer T, Schnittger M, Hellebrand S. Robuster Selbsttest mit extremer Kompaktierung. In: {4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf”}. Wildbad Kreuth, Germany; 2010:17-24.
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand S, Hunger M. Are Robust Circuits Really Robust? In: {24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk)}. Chicago, IL, USA: {IEEE}; 2009:77. doi:10.1109/dft.2009.28
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