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136 Publications


2013 | Misc | LibreCat-ID: 13075
Cook, Alejandro, et al. Adaptive Test and Diagnosis of Intermittent Faults. 2013.
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2013 | Conference Paper | LibreCat-ID: 12979
Hellebrand, Sybille. “Analyzing and Quantifying Fault Tolerance Properties.” {14th IEEE Latin American Test Workshop - (LATW’13)}, {IEEE}, 2013, doi:10.1109/latw.2013.6562662.
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2012 | Conference Paper | LibreCat-ID: 12980
Cook, Alejandro, et al. “Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test.” {13th IEEE Latin American Test Workshop (LATW’12)}, {IEEE}, 2012, pp. 1–4, doi:10.1109/latw.2012.6261229.
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2012 | Conference Paper | LibreCat-ID: 12981
Cook, Alejandro, et al. “Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test.” {17th IEEE European Test Symposium (ETS’12)}, {IEEE}, 2012, pp. 1–6, doi:10.1109/ets.2012.6233025.
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2012 | Misc | LibreCat-ID: 13074
Cook, Alejandro, et al. Eingebaute Selbstdiagnose Mit Zufälligen Und Deterministischen Mustern. 2012.
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2011 | Conference Paper | LibreCat-ID: 12984
Polian, Ilia, et al. “Towards Variation-Aware Test Methods.” {16th IEEE European Test Symposium Trondheim (ETS’11),(Embedded Tutorial)}, {IEEE}, 2011, doi:10.1109/ets.2011.51.
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2011 | Journal Article | LibreCat-ID: 13052
Hopsch, Fabian, et al. “Variation-Aware Fault Modeling.” {SCIENCE CHINA Information Sciences, Science China Press, Co-Published with Springer}, vol. 54, no. 4, 2011, pp. 1813–26.
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2011 | Conference Paper | LibreCat-ID: 13053
Cook, Alejandro, et al. “Robuster Selbsttest Mit Diagnose.” {5. GMM/GI/ITG Fachtagung “Zuverlässigkeit Und Entwurf”}, 2011, pp. 48–53.
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2011 | Conference Paper | LibreCat-ID: 12982
Cook, Alejandro, et al. “Diagnostic Test of Robust Circuits.” {20th IEEE Asian Test Symposium (ATS’11)}, {IEEE}, 2011, pp. 285–90, doi:10.1109/ats.2011.55.
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch, Fabian, et al. “Variation-Aware Fault Modeling.” {19th IEEE Asian Test Symposium (ATS’10)}, {IEEE}, 2010, pp. 87–93, doi:10.1109/ats.2010.24.
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2010 | Conference Paper | LibreCat-ID: 12988
Froese, Viktor, et al. “Reusing NoC-Infrastructure for Test Data Compression.” {28th IEEE VLSI Test Symposium (VTS’10)}, {IEEE}, 2010, pp. 227–31, doi:10.1109/vts.2010.5469570.
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2010 | Conference Paper | LibreCat-ID: 13049
Becker, Bernd, et al. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” {4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper)}, 2010.
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2010 | Conference Paper | LibreCat-ID: 13051
Hunger, Marc, and Sybille Hellebrand. “Ausbeute Und Fehlertoleranz Bei Dreifach Modularer Redundanz.” 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 2010, pp. 81–88.
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer, Thomas, et al. “Efficient Test Response Compaction for Robust BIST Using Parity Sequences.” {28th IEEE International Conference on Computer Design (ICCD’10)}, {IEEE}, 2010, pp. 480–85, doi:10.1109/iccd.2010.5647648.
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}, {IEEE}, 2010, pp. 101–08, doi:10.1109/dft.2010.19.
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2010 | Misc | LibreCat-ID: 10670
Fröse, Viktor, et al. Testdatenkompression Mit Hilfe Der Netzwerkinfrastruktur. 2010.
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2010 | Misc | LibreCat-ID: 13073
Hellebrand, Sybille. Nano-Electronic Systems. 2010.
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2010 | Conference Paper | LibreCat-ID: 12987
Becker, Bernd, et al. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” {40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10)}, {IEEE}, 2010, doi:10.1109/dsnw.2010.5542612.
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer, Thomas, et al. “Robuster Selbsttest Mit Extremer Kompaktierung.” {4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf”}, 2010, pp. 17–24.
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand, Sybille, and Marc Hunger. “Are Robust Circuits Really Robust?” {24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk)}, {IEEE}, 2009, p. 77, doi:10.1109/dft.2009.28.
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