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165 Publications


2019 | Conference Paper | LibreCat-ID: 12918
Maaz, M. U., Sprenger, A., & Hellebrand, S. (2019). A Hybrid Space Compactor for Adaptive X-Handling. 50th IEEE International Test Conference (ITC), 1–8.
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2018 | Misc | LibreCat-ID: 4576
Sprenger, A., & Hellebrand, S. (2018). Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18).
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2018 | Journal Article | LibreCat-ID: 12974
Hellebrand, S., Henkel, J., Raghunathan, A., & Wunderlich, H.-J. (2018). Guest Editors’ Introduction - Special Issue on Approximate Computing. IEEE Embedded Systems Letters, 10(1), 1–1. https://doi.org/10.1109/les.2018.2789942
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2018 | Journal Article | LibreCat-ID: 13057
Kampmann, M., & Hellebrand, S. (2018). Design For Small Delay Test - A Simulation Study. Microelectronics Reliability, 80, 124–133.
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2018 | Misc | LibreCat-ID: 13072
Kampmann, M., & Hellebrand, S. (2018). Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 19th Workshop on RTL and High Level Testing (WRTLT’18), Hefei, Anhui, China.
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2018 | Conference Paper | LibreCat-ID: 29460
Rezaeizadeh Rookerd, R., Sadeghi-Kohan, S., & Navabi, Z. (2018). Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture. Proceedings of the 2018 on Great Lakes Symposium on VLSI. https://doi.org/10.1145/3194554.3194599
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2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, A., & Hellebrand, S. (2018). Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). https://doi.org/10.1109/ddecs.2018.00020
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2018 | Conference Paper | LibreCat-ID: 10575
Liu, C., Schneider, E., Kampmann, M., Hellebrand, S., & Wunderlich, H.-J. (2018). Extending Aging Monitors for Early Life and Wear-Out Failure Prevention. 27th IEEE Asian Test Symposium (ATS’18). https://doi.org/10.1109/ats.2018.00028
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2018 | Conference Paper | LibreCat-ID: 29459
Sadeghi-Kohan, S., Vafaei, A., & Navabi, Z. (2018). Near-Optimal Node Selection Procedure for Aging Monitor Placement. 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS). https://doi.org/10.1109/iolts.2018.8474120
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2017 | Conference Paper | LibreCat-ID: 12973
Deshmukh, J., Kunz, W., Wunderlich, H.-J., & Hellebrand, S. (2017). Special Session on Early Life Failures. In 35th IEEE VLSI Test Symposium (VTS’17). Caesars Palace, Las Vegas, Nevada, USA: IEEE. https://doi.org/10.1109/vts.2017.7928933
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2017 | Misc | LibreCat-ID: 13078
Kampmann, M., & Hellebrand, S. (2017). X-tolerante Prüfzellengruppierung für den Test mit erhöhter Betriebsfrequenz.
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2017 | Conference Paper | LibreCat-ID: 10576
Kampmann, M., & Hellebrand, S. (2017). Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test. 20th IEEE International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS’17). https://doi.org/10.1109/ddecs.2017.7934564
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2017 | Journal Article | LibreCat-ID: 29462
Sadeghi-Kohan, S., Kamal, M., & Navabi, Z. (2017). Self-Adjusting Monitor for Measuring Aging Rate and Advancement. IEEE Transactions on Emerging Topics in Computing, 8(3), 627–641. https://doi.org/10.1109/tetc.2017.2771441
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2017 | Conference Paper | LibreCat-ID: 29463
Jenihhin, M., Kamkin, A., Navabi, Z., & Sadeghi-Kohan, S. (2017). Universal mitigation of NBTI-induced aging by design randomization. 2016 IEEE East-West Design & Test Symposium (EWDTS). https://doi.org/10.1109/ewdts.2016.7807635
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2016 | Conference Paper | LibreCat-ID: 12975
Kampmann, M., & Hellebrand, S. (2016). X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test. In 25th IEEE Asian Test Symposium (ATS’16) (pp. 1–6). Hiroshima, Japan: IEEE. https://doi.org/10.1109/ats.2016.20
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2015 | Conference Paper | LibreCat-ID: 12976
Kampmann, M., A. Kochte, M., Schneider, E., Indlekofer, T., Hellebrand, S., & Wunderlich, H.-J. (2015). Optimized Selection of Frequencies for Faster-Than-at-Speed Test. In 24th IEEE Asian Test Symposium (ATS’15) (pp. 109–114). Mumbai, India: IEEE. https://doi.org/10.1109/ats.2015.26
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2015 | Journal Article | LibreCat-ID: 13056
Huang, Z., Liang, H., & Hellebrand, S. (2015). A High Performance SEU Tolerant Latch. Journal of Electronic Testing - Theory and Applications (JETTA), 31(4), 349–359.
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2015 | Misc | LibreCat-ID: 13077
Hellebrand, S., Indlekofer, T., Kampmann, M., Kochte, M., Liu, C., & Wunderlich, H.-J. (2015). Effiziente Auswahl von Testfrequenzen für den Test kleiner Verzögerungsfehler. 27. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’15), Bad Urach, Germany.
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2015 | Conference Paper | LibreCat-ID: 29465
Sadeghi-Kohan, S., Kamran, A., Forooghifar, F., & Navabi, Z. (2015). Aging in digital circuits and age monitoring: Object-oriented modeling and evaluation. 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). https://doi.org/10.1109/dtis.2015.7127373
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2015 | Conference Paper | LibreCat-ID: 29466
Sadeghi-Kohan, S., Kamal, M., McNeil, J., Prinetto, P., & Navabi, Z. (2015). Online self adjusting progressive age monitoring of timing variations. 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). https://doi.org/10.1109/dtis.2015.7127368
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