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2024 | Journal Article | LibreCat-ID: 52686
Ahmed, Q. A., Wiersema, T., & Platzner, M. (2024). Post-configuration Activation of Hardware Trojans in FPGAs. Journal of Hardware and Systems Security. https://doi.org/10.1007/s41635-024-00147-5
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2024 | Mastersthesis | LibreCat-ID: 54245
Henke, L.-S. (2024). Exploring Custom FPGA Accelerators for DNN-based RF Fingerprinting.
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2024 | Conference Paper | LibreCat-ID: 54468
Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2024). DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing. To Apear in IEEE ISVLSI 2024. IEEE Computer Society Annual Symposium on VLSI, Knoxville, Tennessee, USA.
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2024 | Conference Paper | LibreCat-ID: 56481
Berganski, C., Jentzsch, F., Platzner, M., Kuhmichel, M., & Giefers, H. (2024). FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers. International Conference on Field Programmable Technology, Sydney.
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2024 | Bachelorsthesis | LibreCat-ID: 58132
Hartinger, M. (2024). Controlling I/O Devices from Hardware-Mapped ReconROS Nodes. Paderborn University.
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2023 | Dissertation | LibreCat-ID: 47837
Hansmeier, T. (2023). XCS for Self-awareness in Autonomous Computing Systems.
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2023 | Conference Paper | LibreCat-ID: 53794
Lienen, C., Brede, M., Karger, D., Koch, K., Logan, D., Mazur, J., Nowosad, A. P., Schnelle, A., Waizy, M., & Platzner, M. (2023). AutonomROS: A ReconROS-based Autonomous Driving Unit. 2023 Seventh IEEE International Conference on Robotic Computing (IRC). https://doi.org/10.1109/irc59093.2023.00056
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2023 | Conference Paper | LibreCat-ID: 45913
Clausing, L., Guetattfi, Z., Kaufmann, P., Lienen, C., & Platzner, M. (2023). On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64. Proceedings of the 19th International Symposium on Applied Reconfigurable Computing (ARC). https://doi.org/10.1007/978-3-031-42921-7_17
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2023 | Conference Paper | LibreCat-ID: 46229
Lienen, C., Nowosad, A. P., & Platzner, M. (n.d.). Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. Proceedings of the 2023 9th International Conference on Robotics and Artificial Intelligence (ICRAI). https://doi.org/10.1145/3637843.3637846
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2023 | Conference Paper | LibreCat-ID: 43048
Lienen, C., Middeke, S. H., & Platzner, M. (2023). fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. Proceedings of the 2023 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS). https://doi.org/10.1109/IROS55552.2023.10341921
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2023 | Book Chapter | LibreCat-ID: 45888 |

Wehrheim, H., Platzner, M., Bodden, E., Schubert, P., Pauck, F., & Jakobs, M.-C. (2023). Verifying Software and Reconfigurable Hardware Services. In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp. 125–144). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068583
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2023 | Book Chapter | LibreCat-ID: 45893 |

Hansmeier, T., Kenter, T., Meyer, M., Riebler, H., Platzner, M., & Plessl, C. (2023). Compute Centers I: Heterogeneous Execution Environments. In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp. 165–182). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068642
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2023 | Book Chapter | LibreCat-ID: 45899 |

Boschmann, A., Clausing, L., Jentzsch, F., Ghasemzadeh Mohammadi, H., & Platzner, M. (2023). Flexible Industrial Analytics on Reconfigurable Systems-On-Chip. In C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, & H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412, pp. 225–236). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.5281/zenodo.8068713
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2023 | Mastersthesis | LibreCat-ID: 54127
Anantha Rao, D. B. (2023). Efficient Neural Network Inference for Velocity Estimation in Athletic Relay Races on a Microcontroller. Paderborn University.
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2023 | Conference Paper | LibreCat-ID: 53435
Jentzsch, F. (2023). Hardware-Aware AutoML for Exploration of Custom FPGA Accelerators for RadioML. 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL). https://doi.org/10.1109/fpl60245.2023.00066
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2023 | Bachelorsthesis | LibreCat-ID: 42839
Mehlich, F. (2023). An Evaluation of XCS on the OpenAI Gym. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 53930
Tadakamalla, Y. (2023). A Comparison of Algorithms for the Generation of Layouts based on Reconfigurable Slots on FPGAs. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54295
Middeke, S. H. (2023). Design and Realization of Optimized Intra-FPGA ROS 2 Communication. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54294
Thiele, S. (2023). A Hardware/Software Co-designed ORB-SLAM2 Algorithm for FPGA. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54297
Abooof, A. (2023). Implementation and Evaluation of a ReconROS-based Obstacle Avoidance Architecture for Autonomous Robots. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54296
Rao, A. P. (2023). Multithreaded Software/Hardware Programming with ReconOS/Zephyr on a RISC-V-based System-on-Chip. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 45762
Simon-Mertens, F. (2023). Effizienzanalyse leichtgewichtiger Neuronaler Netze für FPGA-basierte Modulationsklassifikation. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 54243
Oviasogie, M. O. (2023). Demonstrator for Dataflow-based DNN Acceleration for Vision Applications on Platform FPGAs. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 54241
Reuter, L. D. (2023). Development of a Power Analysis Framework for Embedded FPGA Accelerators. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 54246
Hamm, R. (2023). Verarbeitung von Sensordaten auf eingebetteten heterogenen FPGA-Systemen. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 52480
Klassen, A. (2023). Fast Partial Reconfiguration for ReconOS64 on Xilinx MPSoC Devices. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 54298
Tsague Dingo, J. (2023). Ein Simulator für Schedulability-Experimente mit periodischen Tasks auf FPGAs. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54299
Brede, M. (2023). Evaluation of Classifier Migration Between Multiple XCS Populations. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54300
Nowosad, A. (2023). Design and Realization of an Intra-FPGA ROS 2 Communication Infrastructure for the ReconROS Executor. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 54244
AlAidroos, S. (2023). Design and Implementation of a RadioML Demonstrator based on an RFSoC Platform. Paderborn University.
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2023 | Bachelorsthesis | LibreCat-ID: 54242
Evers, G. (2023). Bewertung der Xilinx Runtime Library zur Hardware/Software-Kommunikation. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 46075
Raeisi Nafchi, M. (2023). Reconfigurable Random Forest Implementation on FPGA. Paderborn University.
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2023 | Book | LibreCat-ID: 45863 |

Haake, C.-J., Meyer auf der Heide, F., Platzner, M., Wachsmuth, H., & Wehrheim, H. (2023). On-The-Fly Computing -- Individualized IT-services in dynamic markets (Vol. 412). Heinz Nixdorf Institut, Universität Paderborn. https://doi.org/10.17619/UNIPB/1-1797
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2023 | Conference Paper | LibreCat-ID: 44194 |

Ahmed, Q. A., Awais, M., & Platzner, M. (2023). MAAS: Hiding Trojans in Approximate Circuits. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Francisco, Califorina USA. The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA.
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2023 | Mastersthesis | LibreCat-ID: 45917
Raeisi Nafchi, M. (2023). Reconfigurable Random Forest Implementation on FPGA. Paderborn University.
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2023 | Mastersthesis | LibreCat-ID: 45916
Yadalam Murali Kumar, N. (2023). Data Analytics for Predictive Maintenance of Time Series Data. Paderborn University.
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2022 | Conference Paper | LibreCat-ID: 29945
Witschen, L. M., Wiersema, T., Reuter, L. D., & Platzner, M. (n.d.). Search Space Characterization for Approximate Logic Synthesis . 2022 59th ACM/IEEE Design Automation Conference (DAC). 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.
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2022 | Conference Paper | LibreCat-ID: 29865
Witschen, L. M., Wiersema, T., Artmann, M., & Platzner, M. (n.d.). MUSCAT: MUS-based Circuit Approximation Technique. Design, Automation and Test in Europe (DATE). Design, Automation and Test in Europe (DATE), Online.
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2022 | Conference Paper | LibreCat-ID: 30971
Hansmeier, T., & Platzner, M. (2022). Integrating Safety Guarantees into the Learning Classifier System XCS. Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, 13224, 386–401. https://doi.org/10.1007/978-3-031-02462-7_25
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2022 | Conference Paper | LibreCat-ID: 32855
Clausing, L., & Platzner, M. (2022). ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 120–127. https://doi.org/10.1109/ipdpsw55747.2022.00029
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2022 | Conference Paper | LibreCat-ID: 33253
Hansmeier, T., Brede, M., & Platzner, M. (2022). XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion. GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2071–2079. https://doi.org/10.1145/3520304.3533977
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2022 | Dissertation | LibreCat-ID: 29769 |

Ahmed, Q. A. (2022). Hardware Trojans in Reconfigurable Computing. Paderborn University, Paderborn, Germany. https://doi.org/10.17619/UNIPB/1-1271
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2022 | Preprint | LibreCat-ID: 29541
Lienen, C., & Platzner, M. (2022). ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.
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2022 | Conference Paper | LibreCat-ID: 34007
Lienen, C., & Platzner, M. (n.d.). Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS. 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.
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2022 | Conference Paper | LibreCat-ID: 34005
Lienen, C., & Platzner, M. (n.d.). Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. 2022 25th Euromicro Conference on Digital System Design (DSD). 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Gran Canaria, Spain. https://doi.org/10.1109/DSD57027.2022.00088
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2022 | Dissertation | LibreCat-ID: 34041
Witschen, L. M. (2022). Frameworks and Methodologies for Search-based Approximate Logic Synthesis. https://doi.org/10.17619/UNIPB/1-1649
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2022 | Conference Paper | LibreCat-ID: 32342
Ahmed, Q. A., & Platzner, M. (2022). On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus.
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2022 | Journal Article | LibreCat-ID: 33990
Jentzsch, F., Umuroglu, Y., Pappalardo, A., Blott, M., & Platzner, M. (2022). RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro, 42(6), 125–133. https://doi.org/10.1109/MM.2022.3202091
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2022 | Mastersthesis | LibreCat-ID: 45715
Tcheussi Ngayap, V. I. (2022). FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators.
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2022 | Mastersthesis | LibreCat-ID: 45914
Manjunatha, S. (2022). Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In Predictive Maintenance. Paderborn University .
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2022 | Mastersthesis | LibreCat-ID: 45915
Kaur , P. (2022). Analysis of Time-Series Classification in Conditional Monitoring Systems.
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2021 | Dissertation | LibreCat-ID: 26746 |

Wiersema, T. (2021). Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University.
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2021 | Journal Article | LibreCat-ID: 29150
Lienen, C., & Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Transactions on Reconfigurable Technology and Systems, 1–20. https://doi.org/10.1145/3494571
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2021 | Mastersthesis | LibreCat-ID: 29151
Kashikar, C. (2021). A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University.
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2021 | Conference Paper | LibreCat-ID: 21610
Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2021). LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021 (pp. 27–32). Virtual: ACM. https://doi.org/10.1145/3453688.3461506
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| DOI
2021 | Bachelorsthesis | LibreCat-ID: 22216
Rehnen, J. W. (2021). Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.
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2021 | Conference Paper | LibreCat-ID: 22309
Awais, M., & Platzner, M. (2021). MCTS-Based Synthesis Towards Efficient Approximate Accelerators. Proceedings of IEEE Computer Society Annual Symposium on VLSI, 384–389.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
Brede, M. (2021). Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University.
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2021 | Conference Paper | LibreCat-ID: 21953
Witschen, L. M., Wiersema, T., Raeisi Nafchi, M., Bockhorn, A., & Platzner, M. (n.d.). Timing Optimization for Virtual FPGA Configurations. In F. Hannig, S. Derrien, P. Diniz, & D. Chillet (Eds.), Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Springer Lecture Notes in Computer Science. https://doi.org/10.1007/978-3-030-79025-7_4
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| DOI
2021 | Journal Article | LibreCat-ID: 30906
Boschmann, A., Neuhaus, D., Vogt, S., Kaltschmidt, C., Platzner, M., & Dosen, S. (2021). Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis. Journal of NeuroEngineering and Rehabilitation, 18(1), Article 25. https://doi.org/10.1186/s12984-021-00822-6
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2021 | Journal Article | LibreCat-ID: 30907
Rodriguez, A., Otero, A., Platzner, M., & De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers, 1–1. https://doi.org/10.1109/tc.2021.3107196
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2021 | Conference Paper | LibreCat-ID: 29137
Hansmeier, T. (2021). Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART ’21), Online. https://doi.org/10.1145/3468044.3468055
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| DOI
2021 | Mastersthesis | LibreCat-ID: 29540
Sheikh, M. A. (2021). Design and Implementation of a ReconROS-based Obstacle Avoidance System. Paderborn University.
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2021 | Preprint | LibreCat-ID: 22764 |

Lienen, C., & Platzner, M. (2021). Design of Distributed Reconfigurable Robotics Systems with ReconROS. In arXiv:2107.07208.
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2021 | Conference Paper | LibreCat-ID: 21813
Hansmeier, T., & Platzner, M. (2021). An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1639–1647. https://doi.org/10.1145/3449726.3463159
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| DOI
2021 | Journal Article | LibreCat-ID: 27841
Jakobs, M.-C., Pauck, F., Platzner, M., Wehrheim, H., & Wiersema, T. (2021). Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access. https://doi.org/10.1109/ACCESS.2021.3131213
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| DOI
2021 | Conference Paper | LibreCat-ID: 29138
Ahmed, Q. A. (2021). Hardware Trojans in Reconfigurable Computing. 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC). https://doi.org/10.1109/vlsi-soc53125.2021.9606974
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| DOI
2021 | Conference Paper | LibreCat-ID: 20681 |

Ahmed, Q. A., Wiersema, T., & Platzner, M. (2021). Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France. https://doi.org/10.23919/DATE51398.2021.9474026
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2021 | Conference Paper | LibreCat-ID: 30909
Clausing, L. (2021). ReconOS64: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. https://doi.org/10.1145/3468044.3468056
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| DOI
2021 | Conference Paper | LibreCat-ID: 30908
Ghasemzadeh Mohammadi, H., Jentzsch, F., Kuschel, M., Arshad, R., Rautmare, S., Manjunatha, S., Platzner, M., Boschmann, A., & Schollbach, D. (2021). FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. Machine Learning and Principles and Practice of Knowledge Discovery in Databases. https://doi.org/10.1007/978-3-030-93736-2_27
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2020 | Conference Paper | LibreCat-ID: 3583
Guetttatfi, Z., Kaufmann, P., & Platzner, M. (2020). Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC).
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar, K. (2020). Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke, L.-S. (2020). Evaluation of a ReconOS-ROS Combination based on a Video Processing Application.
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2020 | Conference Paper | LibreCat-ID: 21584
Gatica, C. P., & Platzner, M. (2020). Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-59084-3_9
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| DOI
2020 | Journal Article | LibreCat-ID: 17358
Witschen, L. M., Wiersema, T., & Platzner, M. (2020). Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems, 28(9), 2084–2088. https://doi.org/10.1109/TVLSI.2020.3008061
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| DOI
2020 | Journal Article | LibreCat-ID: 17369
Ho, N., Kaufmann, P., & Platzner, M. (2020). Evolution of Application-Specific Cache Mappings. International Journal of Hybrid Intelligent Systems.
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2020 | Preprint | LibreCat-ID: 20748
Witschen, L. M., Wiersema, T., & Platzner, M. (n.d.). Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).
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| Files available
2020 | Conference Paper | LibreCat-ID: 20750
Lienen, C., Platzner, M., & Rinner, B. (2020). ReconROS: Flexible Hardware Acceleration for ROS2 Applications. In Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT).
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele, S. (2020). Implementing Machine Learning Functions as PYNQ FPGA Overlays.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath, V. (2020). Extension and Evaluation of Python-based High-Level Synthesis Tool Flows.
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2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). An Adaption Mechanism for the Error Threshold of XCSF. GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, 1756–1764. https://doi.org/10.1145/3377929.3398106
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| DOI
2020 | Journal Article | LibreCat-ID: 17092
Anwer, J., Meisner, S., & Platzner, M. (2020). Dynamic Reliability Management for FPGA-Based Systems. International Journal of Reconfigurable Computing, 1–19. https://doi.org/10.1155/2020/2808710
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| DOI
2020 | Journal Article | LibreCat-ID: 15836
Bellman, K., Dutt, N., Esterle, L., Herkersdorf, A., Jantsch, A., Landauer, C., … Tammemäe, K. (2020). Self-aware Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems, Accepted for Publication, 1–24.
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2020 | Conference Paper | LibreCat-ID: 16213
Awais, M., Ghasemzadeh Mohammadi, H., & Platzner, M. (2020). A Hybrid Synthesis Methodology for Approximate Circuits. In Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020 (pp. 421–426). Beijing, China: ACM. https://doi.org/10.1145/3386263.3406952
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2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier, T., Kaufmann, P., & Platzner, M. (2020). Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion (pp. 125–126). New York, NY, United States: Association for Computing Machinery (ACM). https://doi.org/10.1145/3377929.3389968
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| DOI
2020 | Conference Paper | LibreCat-ID: 20838
Lösch, A., & Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). https://doi.org/10.1109/ipdpsw50202.2020.00012
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| DOI
2020 | Conference Paper | LibreCat-ID: 35152
Lösch, A., & Platzner, M. (2020). MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 6–16. https://doi.org/10.1109/IPDPSW50202.2020.00012
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| DOI
2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch, F. P. (2020). Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture.
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2019 | Journal Article | LibreCat-ID: 3585
Witschen, L. M., Wiersema, T., Ghasemzadeh Mohammadi, H., Awais, M., & Platzner, M. (2019). CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Microelectronics Reliability, 99, 277–290. https://doi.org/10.1016/j.microrel.2019.04.003
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| DOI
2019 | Preprint | LibreCat-ID: 16853
Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., & Platzner, M. (n.d.). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
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| Files available
2019 | Conference Paper | LibreCat-ID: 10577
Witschen, L. M., Ghasemzadeh Mohammadi, H., Artmann, M., & Platzner, M. (2019). Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI ’19. New York, NY, USA: ACM. https://doi.org/10.1145/3299874.3317998
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| DOI
2019 | Journal Article | LibreCat-ID: 11950
Boschmann, A., Agne, A., Thombansen, G., Witschen, L. M., Kraus, F., & Platzner, M. (2019). Zynq-based acceleration of robust high density myoelectric signal processing. Journal of Parallel and Distributed Computing, 123, 77–89. https://doi.org/10.1016/j.jpdc.2018.07.004
LibreCat
| DOI
2019 | Journal Article | LibreCat-ID: 12967
Hansmeier, T., Platzner, M., Pantho, M. J. H., & Andrews, D. (2019). An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems, 91(11), 1259–1272. https://doi.org/10.1007/s11265-018-1435-y
LibreCat
| DOI
2019 | Conference Paper | LibreCat-ID: 15422
Ho, N., Kaufmann, P., & Platzner, M. (2019). Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In World Congress on Nature and Biologically Inspired Computing (NaBIC). Springer.
LibreCat
2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar, S. (2019). Incremental learning with Support Vector Machine on embedded platforms.
LibreCat
2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati, M. (2019). A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn.
LibreCat
2019 | Mastersthesis | LibreCat-ID: 14831
Sabu, N. S. (2019). FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University.
LibreCat
2019 | Mastersthesis | LibreCat-ID: 15946
Mehta, J. (2019). Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Recongurable System-on-Chip.
LibreCat
2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier, T. (2019). Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn.
LibreCat
2019 | Conference Paper | LibreCat-ID: 31067
Guettatfi, Z., Platzner, M., Kermia, O., & Khouas, A. (2019). An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). https://doi.org/10.1109/ipdpsw.2019.00027
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