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410 Publications
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2022 | Preprint | LibreCat-ID: 29541
Lienen C, Platzner M. ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications. Published online 2022.
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2022 | Journal Article | LibreCat-ID: 33990
Jentzsch F, Umuroglu Y, Pappalardo A, Blott M, Platzner M. RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro. 2022;42(6):125-133. doi:10.1109/MM.2022.3202091
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2022 | Conference Paper | LibreCat-ID: 34005
Lienen C, Platzner M. Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications.
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2022 | Conference Paper | LibreCat-ID: 34007
Lienen C, Platzner M. Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS.
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2022 | Conference Paper | LibreCat-ID: 29945
Witschen LM, Wiersema T, Reuter LD, Platzner M. Search Space Characterization for Approximate Logic Synthesis . In: 2022 59th ACM/IEEE Design Automation Conference (DAC).
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2022 | Conference Paper | LibreCat-ID: 29865
Witschen LM, Wiersema T, Artmann M, Platzner M. MUSCAT: MUS-based Circuit Approximation Technique. In: Design, Automation and Test in Europe (DATE).
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2022 | Conference Paper | LibreCat-ID: 30971
Hansmeier T, Platzner M. Integrating Safety Guarantees into the Learning Classifier System XCS. In: Applications of Evolutionary Computation, EvoApplications 2022, Proceedings. Vol 13224. Lecture Notes in Computer Science. Springer International Publishing; 2022:386-401. doi:10.1007/978-3-031-02462-7_25
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2022 | Conference Paper | LibreCat-ID: 32342
Ahmed QA, Platzner M. On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI,2022); 2022.
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2022 | Dissertation | LibreCat-ID: 34041
Witschen LM. Frameworks and Methodologies for Search-Based Approximate Logic Synthesis.; 2022.
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2022 | Conference Paper | LibreCat-ID: 32855
Clausing L, Platzner M. ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. In: 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE; 2022:120-127. doi:10.1109/ipdpsw55747.2022.00029
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2022 | Conference Paper | LibreCat-ID: 33253
Hansmeier T, Brede M, Platzner M. XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion. In: GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion. Association for Computing Machinery (ACM); 2022:2071-2079. doi:10.1145/3520304.3533977
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2022 | Dissertation | LibreCat-ID: 29769 | 
Ahmed QA. Hardware Trojans in Reconfigurable Computing. Paderborn University, Paderborn, Germany; 2022. doi:10.17619/UNIPB/1-1271
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2021 | Dissertation | LibreCat-ID: 26746 |
Wiersema T. Guaranteeing Properties of Reconfigurable Hardware Circuits with Proof-Carrying Hardware. Paderborn University; 2021.
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2021 | Conference Paper | LibreCat-ID: 29138
Ahmed QA. Hardware Trojans in Reconfigurable Computing. In: 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC). ; 2021. doi:10.1109/vlsi-soc53125.2021.9606974
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2021 | Journal Article | LibreCat-ID: 29150
Lienen C, Platzner M. Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Transactions on Reconfigurable Technology and Systems. Published online 2021:1-20. doi:10.1145/3494571
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2021 | Mastersthesis | LibreCat-ID: 29151
Kashikar C. A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University; 2021.
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2021 | Journal Article | LibreCat-ID: 27841
Jakobs M-C, Pauck F, Platzner M, Wehrheim H, Wiersema T. Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access. doi:10.1109/ACCESS.2021.3131213
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2021 | Conference Paper | LibreCat-ID: 21610
Awais M, Ghasemzadeh Mohammadi H, Platzner M. LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. In: Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021. ACM; 2021:27-32. doi:https://doi.org/10.1145/3453688.3461506
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2021 | Conference Paper | LibreCat-ID: 20681
Ahmed QA, Wiersema T, Platzner M. Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. In: 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). Alpexpo | Grenoble, France: 2021 Design, Automation and Test in Europe Conference (DATE); 2021. doi:10.23919/DATE51398.2021.9474026
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2021 | Bachelorsthesis | LibreCat-ID: 22216
Rehnen JW. Decomposition of Arithmetic Components for the Approximate Circuit Synthesis with EvoApproxLib.; 2021.
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2021 | Conference Paper | LibreCat-ID: 22309
Awais M, Platzner M. MCTS-Based Synthesis Towards Efficient Approximate Accelerators. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI. IEEE; 2021:384-389.
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2021 | Bachelorsthesis | LibreCat-ID: 22483
Brede M. Implementation and Profiling of XCS in the Context of Embedded Systems. Paderborn: Paderborn University; 2021.
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2021 | Mastersthesis | LibreCat-ID: 29540
Sheikh MA. Design and Implementation of a ReconROS-Based Obstacle Avoidance System. Paderborn University; 2021.
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2021 | Preprint | LibreCat-ID: 22764 |
Lienen C, Platzner M. Design of Distributed Reconfigurable Robotics Systems with ReconROS. arXiv:210707208. Published online 2021.
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2021 | Conference Paper | LibreCat-ID: 21813
Hansmeier T, Platzner M. An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS. In: GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion. Association for Computing Machinery (ACM); 2021:1639–1647. doi:10.1145/3449726.3463159
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2021 | Conference Paper | LibreCat-ID: 21953
Witschen LM, Wiersema T, Raeisi Nafchi M, Bockhorn A, Platzner M. Timing Optimization for Virtual FPGA Configurations. In: Hannig F, Derrien S, Diniz P, Chillet D, eds. Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21). Reconfigurable Computing: Architectures, Tools, and Applications. Springer Lecture Notes in Computer Science. doi:10.1007/978-3-030-79025-7_4
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2021 | Journal Article | LibreCat-ID: 30906
Boschmann A, Neuhaus D, Vogt S, Kaltschmidt C, Platzner M, Dosen S. Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis. Journal of NeuroEngineering and Rehabilitation. 2021;18(1). doi:10.1186/s12984-021-00822-6
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2021 | Journal Article | LibreCat-ID: 30907
Rodriguez A, Otero A, Platzner M, De la Torre E. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers. Published online 2021:1-1. doi:10.1109/tc.2021.3107196
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2021 | Conference Paper | LibreCat-ID: 30909
Clausing L. ReconOS64: High-Performance Embedded Computing for Industrial Analytics on a Reconfigurable System-on-Chip. In: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. ACM; 2021. doi:10.1145/3468044.3468056
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2021 | Conference Paper | LibreCat-ID: 30908
Ghasemzadeh Mohammadi H, Jentzsch F, Kuschel M, et al. FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. In: Machine Learning and Principles and Practice of Knowledge Discovery in Databases. ; 2021.
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2021 | Conference Paper | LibreCat-ID: 29137
Hansmeier T. Self-aware Operation of Heterogeneous Compute Nodes using the Learning Classifier System XCS. In: HEART ’21: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. Association for Computing Machinery (ACM); 2021. doi:10.1145/3468044.3468055
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2020 | Conference Paper | LibreCat-ID: 3583
Guetttatfi Z, Kaufmann P, Platzner M. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). ; 2020.
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar K. Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.; 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 21432
Henke L-S. Evaluation of a ReconOS-ROS Combination Based on a Video Processing Application.; 2020.
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch FP. Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture.; 2020.
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2020 | Conference Paper | LibreCat-ID: 21584
Gatica CP, Platzner M. Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. In: Machine Learning for Cyber Physical Systems (ML4CPS 2017). Berlin, Heidelberg; 2020. doi:10.1007/978-3-662-59084-3_9
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2020 | Journal Article | LibreCat-ID: 17358
Witschen LM, Wiersema T, Platzner M. Proof-carrying Approximate Circuits. IEEE Transactions On Very Large Scale Integration Systems. 2020;28(9):2084-2088. doi:10.1109/TVLSI.2020.3008061
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2020 | Journal Article | LibreCat-ID: 17369
Ho N, Kaufmann P, Platzner M. Evolution of Application-Specific Cache Mappings. International Journal of Hybrid intelligent Systems. 2020.
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2020 | Preprint | LibreCat-ID: 20748
Witschen LM, Wiersema T, Platzner M. Search Space Characterization for AxC Synthesis. Fifth Workshop on Approximate Computing (AxC 2020).
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2020 | Conference Paper | LibreCat-ID: 20750
Lienen C, Platzner M, Rinner B. ReconROS: Flexible Hardware Acceleration for ROS2 Applications. In: Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT). ; 2020.
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2020 | Bachelorsthesis | LibreCat-ID: 20820
Thiele S. Implementing Machine Learning Functions as PYNQ FPGA Overlays.; 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath V. Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows.; 2020.
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2020 | Conference Paper | LibreCat-ID: 20838
Loesch A, Platzner M. MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. In: 2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). ; 2020. doi:10.1109/ipdpsw50202.2020.00012
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2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier T, Kaufmann P, Platzner M. An Adaption Mechanism for the Error Threshold of XCSF. In: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion. Association for Computing Machinery (ACM); 2020:1756-1764. doi:10.1145/3377929.3398106
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2020 | Journal Article | LibreCat-ID: 17092
Anwer J, Meisner S, Platzner M. Dynamic Reliability Management for FPGA-Based Systems. International Journal of Reconfigurable Computing. 2020:1-19. doi:10.1155/2020/2808710
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2020 | Journal Article | LibreCat-ID: 15836
Bellman K, Dutt N, Esterle L, et al. Self-aware Cyber-Physical Systems. ACM Transactions on Cyber-Physical Systems. 2020;Accepted for Publication:1-24.
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2020 | Conference Paper | LibreCat-ID: 16213
Awais M, Ghasemzadeh Mohammadi H, Platzner M. A Hybrid Synthesis Methodology for Approximate Circuits. In: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020. ACM; 2020:421-426. doi:10.1145/3386263.3406952
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2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier T, Kaufmann P, Platzner M. Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM); 2020:125-126. doi:10.1145/3377929.3389968
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2019 | Journal Article | LibreCat-ID: 3585
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Microelectronics Reliability. 2019;99:277-290. doi:10.1016/j.microrel.2019.04.003
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2019 | Conference Paper | LibreCat-ID: 9913
Ahmed QA, Wiersema T, Platzner M. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In: Hochberger C, Nelson B, Koch A, Woods R, Diniz P, eds. Applied Reconfigurable Computing. Vol 11444. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2019:127-136. doi:10.1007/978-3-030-17227-5_10
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2019 | Preprint | LibreCat-ID: 16853
Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
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2019 | Conference Paper | LibreCat-ID: 10577
Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In: Proceedings of the 2019 on Great Lakes Symposium on VLSI - GLSVLSI ’19. New York, NY, USA: ACM; 2019. doi:10.1145/3299874.3317998
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2019 | Journal Article | LibreCat-ID: 11950
Boschmann A, Agne A, Thombansen G, Witschen LM, Kraus F, Platzner M. Zynq-based acceleration of robust high density myoelectric signal processing. Journal of Parallel and Distributed Computing. 2019;123:77-89. doi:10.1016/j.jpdc.2018.07.004
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2019 | Journal Article | LibreCat-ID: 12871 |
Platzner M, Plessl C. FPGAs im Rechenzentrum. Informatik Spektrum. 2019. doi:10.1007/s00287-019-01187-w
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2019 | Journal Article | LibreCat-ID: 12967
Hansmeier T, Platzner M, Pantho MJH, Andrews D. An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. Journal of Signal Processing Systems. 2019;91(11):1259-1272. doi:10.1007/s11265-018-1435-y
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2019 | Conference Paper | LibreCat-ID: 15422
Ho N, Kaufmann P, Platzner M. Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In: World Congress on Nature and Biologically Inspired Computing (NaBIC). Advances in Nature and Biologically Inspired Computing. Springer; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874 |
Lienen C. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn
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2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar S. Incremental Learning with Support Vector Machine on Embedded Platforms.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta J. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recongurable System-on-Chip.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier T. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn; 2019.
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2019 | Conference Paper | LibreCat-ID: 31067
Guettatfi Z, Platzner M, Kermia O, Khouas A. An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. In: 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE; 2019. doi:10.1109/ipdpsw.2019.00027
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch A, Wiens A, Platzner M. Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS). Vol 10793. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2018:73-84. doi:10.1007/978-3-319-77610-1_6
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2018 | Bachelorsthesis | LibreCat-ID: 3365
Schnuer J-P. Static Scheduling Algorithms for Heterogeneous Compute Nodes. Universität Paderborn; 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 3366
Croce M. Evaluation of OpenCL-Based Compilation for FPGAs. Universität Paderborn; 2018.
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier T, Platzner M, Andrews D. An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications. Vol 10824. Lecture Notes in Computer Science. Springer International Publishing; 2018:153-165. doi:10.1007/978-3-319-78890-6_13
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2018 | Preprint | LibreCat-ID: 3586
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
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2018 | Dissertation | LibreCat-ID: 3720
Ho N. FPGA-Based Reconfigurable Cache Mapping Schemes: Design and Optimization. Universität Paderborn; 2018. doi:10.17619/UNIPB/1-376
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2018 | Preprint | LibreCat-ID: 1165
Witschen LM, Wiersema T, Platzner M. Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch A, Platzner M. A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). IEEE; 2018. doi:10.1109/asap.2018.8445098
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2018 | Conference Paper | LibreCat-ID: 10598
Awais M, Ghasemzadeh Mohammadi H, Platzner M. An MCTS-based Framework for Synthesis of Approximate Circuits. In: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). ; 2018:219-224. doi:10.1109/VLSI-SoC.2018.8645026
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing L. Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data. Ruhr-University Bochum; 2018.
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2018 | Bachelorsthesis | LibreCat-ID: 1097
Jentzsch FP. Enforcing IP Core Connection Properties with Verifiable Security Monitors. Universität Paderborn; 2018.
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2018 | Journal Article | LibreCat-ID: 12965
Ghribi I, Abdallah RB, Khalgui M, Li Z, Alnowibet K, Platzner M. R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access. 2018:14078-14092. doi:10.1109/access.2018.2799852
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2017 | Bachelorsthesis | LibreCat-ID: 3580
Hansmeier T. An FPGA Accelerator for Checking Resolution Proofs. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr C. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn; 2017.
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2017 | Journal Article | LibreCat-ID: 9919
Shen C, Kaufmann P, Braun M. Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES). 2017;94:287-299. doi:10.1016/j.ijepes.2017.07.007
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2017 | Conference Paper | LibreCat-ID: 65
Lösch A, Platzner M. reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP). ; 2017. doi:10.1109/ASAP.2017.7995272
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2017 | Journal Article | LibreCat-ID: 68
Isenberg T, Platzner M, Wehrheim H, Wiersema T. Proof-Carrying Hardware via Inductive Invariants. ACM Transactions on Design Automation of Electronic Systems. 2017;(4):61:1--61:23. doi:10.1145/3054743
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2017 | Journal Article | LibreCat-ID: 10600
H.W. Leong P, Amano H, Anderson J, et al. The First 25 Years of the FPL Conference – Significant Papers. ACM Transactions on Reconfigurable Technology and Systems. 2017. doi:10.1145/2996468
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2017 | Journal Article | LibreCat-ID: 10601
F. DeMara R, Platzner M, Ottavi M. Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial). IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing. 2017. doi:10.1109/TETC.2016.2641599
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2017 | Journal Article | LibreCat-ID: 10611
Anwer J, Platzner M. Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocessors and Microsystems. 2017:160-172. doi:10.1016/j.micpro.2017.06.002
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2017 | Bachelorsthesis | LibreCat-ID: 10613
Kaltschmidt C. An AR-Based Training and Assessment System for Myoelectrical Prosthetic Control. Paderborn University; 2017.
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2017 | Conference Paper | LibreCat-ID: 10630
Boschmann A, Thombansen G, Witschen LM, Wiens A, Platzner M. A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In: Design, Automation and Test in Europe (DATE). ; 2017. doi:10.23919/DATE.2017.7927137
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2017 | Mastersthesis | LibreCat-ID: 10666
Riaz U. Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University; 2017.
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2017 | Conference Paper | LibreCat-ID: 10672
Ho N, Ashraf II, Kaufmann P, Platzner M. Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In: Proc. Design, Automation and Test in Europe Conf. (DATE). ; 2017. doi:10.23919/DATE.2017.7927096
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2017 | Conference Paper | LibreCat-ID: 10676
Ho N, Kaufmann P, Platzner M. Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In: 2017 International Conference on Field Programmable Technology (ICFPT). ; 2017:215-218. doi:10.1109/FPT.2017.8280144
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2017 | Journal Article | LibreCat-ID: 10692
Shen C, Kaufmann P, Braun M. Three-Stage Power System Restoration Methodology Considering Renewable Energies. Elsevier International Journal of Electrical Power and Energy Systems (IJEPES). 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
Dietrich A. Reconfigurable Cryptographic Services. Paderborn University; 2017.
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2017 | Journal Article | LibreCat-ID: 10740
Shen C, Kaufmann P, Braun M. Fast Network Restoration by Partitioning of Parallel Black Start Zones. The Journal of Engineering. 2017:19pp. doi:10.1049/joe.2017.0032
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2017 | Book | LibreCat-ID: 10759
Squillero G, Burelli P, M. Mora A, et al. Applications of Evolutionary Computation - 20th European Conference, EvoApplications. Springer; 2017.
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2017 | Conference Paper | LibreCat-ID: 10760
Kaufmann P, Kalkreuth R. Parametrizing Cartesian Genetic Programming: An Empirical Study. In: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing; 2017. doi:10.1007/978-3-319-67190-1_26
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2017 | Conference Paper | LibreCat-ID: 10761
Kaufmann P, Ho N, Platzner M. Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In: Adaptive Hardware and Systems (AHS). IEEE; 2017. doi:10.1109/AHS.2017.8046380
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2017 | Conference Paper | LibreCat-ID: 10762
Kaufmann P, Kalkreuth R. An Empirical Study on the Parametrization of Cartesian Genetic Programming. In: Genetic and Evolutionary Computation (GECCO), Compendium. ACM; 2017. doi:10.1145/3067695.3075980
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2017 | Conference Paper | LibreCat-ID: 10780
Guettatfi Z, Hübner P, Platzner M, Rinner B. Computational self-awareness as design approach for visual sensor nodes. In: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC). ; 2017:1-8. doi:10.1109/ReCoSoC.2017.8016147
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2017 | Conference Paper | LibreCat-ID: 14893
Ghribi I, Abdallah RB, Khalgui M, Platzner M. I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In: Communications in Computer and Information Science. Cham: Springer ; 2017. doi:10.1007/978-3-319-62569-0_8
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2016 | Book Chapter | LibreCat-ID: 29
Agne A, Platzner M, Plessl C, Happe M, Lübbers E. ReconOS. In: Koch D, Hannig F, Ziener D, eds. FPGAs for Software Programmers. Cham: Springer International Publishing; 2016:227-244. doi:10.1007/978-3-319-26408-0_13
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| DOI
2016 | Journal Article | LibreCat-ID: 222
Wiersema T, Bockhorn A, Platzner M. An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip. Computers & Electrical Engineering. 2016:112--122. doi:10.1016/j.compeleceng.2016.04.005
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