100 Publications

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[100]
2019 | Journal Article | LibreCat-ID: 7689
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2019). Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL (to appear). ACM Trans. Archit. Code Optim. (TACO).
LibreCat | Files available
 
[99]
2019 | Journal Article | LibreCat-ID: 12871
Platzner, M., & Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum. https://doi.org/10.1007/s00287-019-01187-w
LibreCat | Files available | DOI
 
[98]
2019 | Preprint | LibreCat-ID: 12878
Rengaraj, V., Lass, M., Plessl, C., & Kühne, T. (2019). Accurate Sampling with Noisy Forces from Approximate Computing. ArXiv:1907.08497.
LibreCat | arXiv
 
[97]
2019 | Journal Article | LibreCat-ID: 21
Richters, D., Lass, M., Walther, A., Plessl, C., & Kühne, T. (2019). A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices. Communications in Computational Physics, 25(2), 564–585. https://doi.org/10.4208/cicp.OA-2018-0053
LibreCat | DOI | arXiv
 
[96]
2018 | Journal Article | LibreCat-ID: 6516
Mertens, J. C., Boschmann, A., Schmidt, M., & Plessl, C. (2018). Sprint diagnostic with GPS and inertial sensor fusion. Sports Engineering, 21(4), 441–451. https://doi.org/10.1007/s12283-018-0291-0
LibreCat | Files available | DOI
 
[95]
2018 | Journal Article | LibreCat-ID: 20
Lass, M., Kühne, T., & Plessl, C. (2018). Using Approximate Computing for the Calculation of Inverse Matrix p-th Roots. Embedded Systems Letters, 10(2), 33–36. https://doi.org/10.1109/LES.2017.2760923
LibreCat | DOI | arXiv
 
[94]
2018 | Conference Paper | LibreCat-ID: 1588
Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A., … Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE. https://doi.org/10.1109/FCCM.2018.00037
LibreCat | Files available | DOI
 
[93]
2018 | Conference Paper | LibreCat-ID: 1204
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. In Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). ACM. https://doi.org/10.1145/3178487.3178534
LibreCat | Files available | DOI
 
[92]
2018 | Conference Paper | LibreCat-ID: 1590
Lass, M., Mohr, S., Wiebeler, H., Kühne, T., & Plessl, C. (2018). A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. In Proc. Platform for Advanced Scientific Computing (PASC) Conference. New York, NY, USA: ACM. https://doi.org/10.1145/3218176.3218231
LibreCat | DOI | arXiv
 
[91]
2017 | Journal Article | LibreCat-ID: 1589
Schumacher, J., Plessl, C., & Vandelli, W. (2017). High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series, 898. https://doi.org/10.1088/1742-6596/898/8/082003
LibreCat | DOI
 
[90]
2017 | Conference Paper | LibreCat-ID: 1592
Kenter, T., Förstner, J., & Plessl, C. (2017). Flexible FPGA design for FDTD using OpenCL. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.23919/FPL.2017.8056844
LibreCat | Files available | DOI
 
[89]
2017 | Journal Article | LibreCat-ID: 18
Riebler, H., Lass, M., Mittendorf, R., Löcke, T., & Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23. https://doi.org/10.1145/3053687
LibreCat | Files available | DOI
 
[88]
2016 | Conference Paper | LibreCat-ID: 24
Kenter, T., & Plessl, C. (2016). Microdisk Cavity FDTD Simulation on FPGA using OpenCL. In Proc. Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC).
LibreCat | Files available
 
[87]
2016 | Conference Paper | LibreCat-ID: 31
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., & Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).
LibreCat | Files available
 
[86]
2016 | Book Chapter | LibreCat-ID: 156
Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-39675-0_8
LibreCat | Files available | DOI
 
[85]
2016 | Conference Paper | LibreCat-ID: 168
Lösch, A., Beisel, T., Kenter, T., Plessl, C., & Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. In Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) (pp. 912–917). EDA Consortium / IEEE.
LibreCat | Files available
 
[84]
2016 | Book Chapter | LibreCat-ID: 29
Agne, A., Platzner, M., Plessl, C., Happe, M., & Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, & D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-26408-0_13
LibreCat | DOI
 
[83]
2016 | Conference Paper | LibreCat-ID: 138
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., … Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI) (pp. 1–5). IEEE. https://doi.org/10.1109/RTSI.2016.7740545
LibreCat | Files available | DOI
 
[82]
2016 | Conference Paper | LibreCat-ID: 171
Kenter, T., Vaz, G. F., Riebler, H., & Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). In Workshop on Reconfigurable Computing (WRC).
LibreCat | Files available
 
[81]
2016 | Conference Paper | LibreCat-ID: 25
Lass, M., Kühne, T., & Plessl, C. (2016). Using Approximate Computing in Scientific Codes. In Workshop on Approximate Computing (AC).
LibreCat
 
[80]
2016 | Journal Article | LibreCat-ID: 165
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111. https://doi.org/10.1016/j.compeleceng.2016.04.021
LibreCat | Files available | DOI
 
[79]
2015 | Journal Article | LibreCat-ID: 1775
Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., … Zhang, J. (2015). FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades. Journal of Physics: Conference Series, 664. https://doi.org/10.1088/1742-6596/664/8/082050
LibreCat | DOI
 
[78]
2015 | Journal Article | LibreCat-ID: 1768
Plessl, C., Platzner, M., & Schreier, P. J. (2015). Aktuelles Schlagwort: Approximate Computing. Informatik Spektrum, (5), 396–399. https://doi.org/10.1007/s00287-015-0911-z
LibreCat | DOI
 
[77]
2015 | Conference Paper | LibreCat-ID: 238
Damschen, M., Riebler, H., Vaz, G. F., & Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. In Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE) (pp. 1078–1083). EDA Consortium / IEEE. https://doi.org/10.7873/DATE.2015.1124
LibreCat | Files available | DOI
 
[76]
2015 | Conference Paper | LibreCat-ID: 303
Damschen, M., & Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. In Proceedings of the 5th International Workshop on Adaptive Self-tuning Computing Systems (ADAPT).
LibreCat | Files available | arXiv
 
[75]
2015 | Journal Article | LibreCat-ID: 296
Kenter, T., Schmitz, H., & Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015. https://doi.org/10.1155/2015/859425
LibreCat | Files available | DOI
 
[74]
2015 | Journal Article | LibreCat-ID: 1772
Torresen, J., Plessl, C., & Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20. https://doi.org/10.1109/MC.2015.205
LibreCat | Files available | DOI
 
[73]
2015 | Conference Paper | LibreCat-ID: 1773
Schumacher, J., T. Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., … Zhang, J. (2015). Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. In Proc. Int. Conf. on Distributed Event-Based Systems (DEBS). ACM. https://doi.org/10.1145/2675743.2771824
LibreCat | DOI
 
[72]
2014 | Conference Paper | LibreCat-ID: 439
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2014.7032509
LibreCat | Files available | DOI
 
[71]
2014 | Conference Paper | LibreCat-ID: 388
Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC) (Vol. 8405, pp. 144–155). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-05960-0_13
LibreCat | Files available | DOI
 
[70]
2014 | Journal Article | LibreCat-ID: 1779
Giefers, H., Plessl, C., & Förstner, J. (2014). Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News, 41(5), 65–70. https://doi.org/10.1145/2641361.2641372
LibreCat | DOI
 
[69]
2014 | Journal Article | LibreCat-ID: 365
Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2). https://doi.org/10.1145/2617596
LibreCat | Files available | DOI
 
[68]
2014 | Conference Paper | LibreCat-ID: 377
Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. In Proceedings of Field-Programmable Custom Computing Machines (FCCM) (pp. 222–229). IEEE. https://doi.org/10.1109/FCCM.2014.67
LibreCat | Files available | DOI
 
[67]
2014 | Book Chapter | LibreCat-ID: 335
Platzner, M., & Plessl, C. (2014). Verschiebungen an der Grenze zwischen Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, & T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144). Paderborn: Wilhelm Fink.
LibreCat | Files available
 
[66]
2014 | Journal Article | LibreCat-ID: 328
Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., & Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71. https://doi.org/10.1109/MM.2013.110
LibreCat | Files available | DOI
 
[65]
2014 | Conference Paper | LibreCat-ID: 406
Kenter, T., Schmitz, H., & Plessl, C. (2014). Kernel-Centric Acceleration of High Accuracy Stereo-Matching. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2014.7032535
LibreCat | Files available | DOI
 
[64]
2014 | Journal Article | LibreCat-ID: 363
Agne, A., Hangmann, H., Happe, M., Platzner, M., & Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919. https://doi.org/10.1016/j.micpro.2013.12.001
LibreCat | Files available | DOI
 
[63]
2014 | Conference Paper | LibreCat-ID: 1780
C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino, M., … Bolchini, C. (2014). SAVE: Towards efficient resource management in heterogeneous system architectures. In Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). Springer. https://doi.org/10.1007/978-3-319-05960-0_38
LibreCat | DOI
 
[62]
2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., … Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. In Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA) (pp. 142–149). IEEE. https://doi.org/10.1109/ISPA.2014.27
LibreCat | DOI
 
[61]
2013 | Conference Paper | LibreCat-ID: 528
Riebler, H., Kenter, T., Sorge, C., & Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. In Proceedings of the International Conference on Field-Programmable Technology (FPT) (pp. 386–389). IEEE. https://doi.org/10.1109/FPT.2013.6718394
LibreCat | Files available | DOI
 
[60]
2013 | Conference Paper | LibreCat-ID: 1787
Suess, T., Schoenrock, A., Meisner, S., & Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW) (pp. 64–73). Washington, DC, USA: IEEE Computer Society. https://doi.org/10.1109/IPDPSW.2013.136
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[59]
2013 | Conference Paper | LibreCat-ID: 505
Happe, M., Kling, P., Plessl, C., Platzner, M., & Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. In Proceedings of the 9th IEEE Workshop on Software Technology for Future embedded and Ubiquitous Systems (SEUS). IEEE. https://doi.org/10.1109/ISORC.2013.6913232
LibreCat | Files available | DOI
 
[58]
2012 | Conference Paper | LibreCat-ID: 612
Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL) (pp. 559–562). IEEE. https://doi.org/10.1109/FPL.2012.6339370
LibreCat | Files available | DOI
 
[57]
2012 | Journal Article | LibreCat-ID: 2108
Schumacher, T., Plessl, C., & Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126. https://doi.org/10.1016/j.micpro.2011.04.002
LibreCat | DOI
 
[56]
2012 | Journal Article | LibreCat-ID: 2177
Grad, M., & Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC). https://doi.org/10.1155/2012/418315
LibreCat | DOI
 
[55]
2012 | Conference Paper | LibreCat-ID: 567
Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS) (pp. 559–565). IEEE. https://doi.org/10.1109/HPCSim.2012.6266973
LibreCat | Files available | DOI
 
[54]
2012 | Conference Paper | LibreCat-ID: 2180
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS).
LibreCat
 
[53]
2012 | Misc | LibreCat-ID: 587
Plessl, C., Platzner, M., Agne, A., Happe, M., & Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.
LibreCat | Files available
 
[52]
2012 | Conference Paper | LibreCat-ID: 615
Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2012.6416745
LibreCat | Files available | DOI
 
[51]
2012 | Conference Paper | LibreCat-ID: 609
Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) (pp. 8–9).
LibreCat | Files available
 
[50]
2012 | Conference Paper | LibreCat-ID: 2106
Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (pp. 189–196). IEEE. https://doi.org/10.1109/FPL.2012.6339370
LibreCat | Files available | DOI
 
[49]
2012 | Conference Paper | LibreCat-ID: 591
Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2012.6416773
LibreCat | Files available | DOI
 
[48]
2011 | Conference Paper | LibreCat-ID: 2191
Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.
LibreCat
 
[47]
2011 | Conference Paper | LibreCat-ID: 656
Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig) (pp. 55–60). IEEE. https://doi.org/10.1109/ReConFig.2011.59
LibreCat | Files available | DOI
 
[46]
2011 | Conference Paper | LibreCat-ID: 2200
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA) (pp. 177–180). New York, NY, USA: ACM. https://doi.org/10.1145/1950413.1950448
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[45]
2011 | Conference Paper | LibreCat-ID: 2193
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 223–226). IEEE Computer Society. https://doi.org/10.1109/ASAP.2011.6043273
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[44]
2011 | Journal Article | LibreCat-ID: 2201
Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC). https://doi.org/10.1155/2011/760954
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[43]
2011 | Conference Paper | LibreCat-ID: 2198
Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In Proc. Reconfigurable Architectures Workshop (RAW) (pp. 278–285). IEEE Computer Society. https://doi.org/10.1109/IPDPS.2011.153
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[42]
2011 | Book Chapter | LibreCat-ID: 2202
Plessl, C., & Platzner, M. (2011). Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In M. Khalgui & H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global. https://doi.org/10.4018/978-1-60960-086-0
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[41]
2011 | Conference Paper | LibreCat-ID: 2194
Meyer, B., Plessl, C., & Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In Symp. on Application Accelerators in High Performance Computing (SAAHPC) (pp. 60–63). IEEE Computer Society. https://doi.org/10.1109/SAAHPC.2011.12
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[40]
2010 | Conference Paper | LibreCat-ID: 2227
Woehrle, M., Plessl, C., & Thiele, L. (2010). Rupeas: Ruby Powered Event Analysis DSL. In Proc. Int. Conf. Networked Sensing Systems (INSS) (pp. 245–248). IEEE. https://doi.org/10.1109/INSS.2010.5572211
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[39]
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks, T. P., Andrews, D., DeMara, R., Lam, H., Lee, J., Plessl, C., & Stitt, G. (Eds.). (2010). Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
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[38]
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers, E., Platzner, M., Plessl, C., Keller, A., & Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 225–231). CSREA Press.
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[37]
2010 | Conference Paper | LibreCat-ID: 2228
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2010). Performance Estimation for the Exploration of CPU-Accelerator Architectures. In O. Hammami & S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA).
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[36]
2010 | Conference Paper | LibreCat-ID: 2216
Grad, M., & Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig) (pp. 67–72). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/ReConFig.2010.19
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[35]
2010 | Conference Paper | LibreCat-ID: 2224
Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 144–150). CSREA Press.
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[34]
2010 | Conference Paper | LibreCat-ID: 2206
Keller, A., Plattner, B., Lübbers, E., Platzner, M., & Plessl, C. (2010). Reconfigurable Nodes for Future Networks. In Proc. IEEE Globecom Workshop on Network of the Future (FutureNet) (pp. 372–376). IEEE. https://doi.org/10.1109/GLOCOMW.2010.5700341
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[33]
2010 | Conference Paper | LibreCat-ID: 2220
Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures: History and Trends. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (p. 165). CSREA Press.
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[32]
2010 | Conference Paper | LibreCat-ID: 2226
Beisel, T., Niekamp, M., & Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 65–72). IEEE Computer Society. https://doi.org/10.1109/ASAP.2010.5540798
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[31]
2009 | Conference Paper | LibreCat-ID: 2261
Schumacher, T., Plessl, C., & Platzner, M. (2009). An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (pp. 338–344). IEEE.
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[30]
2009 | Conference Paper | LibreCat-ID: 2350
Schumacher, T., Plessl, C., & Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM) (pp. 275–278). IEEE Computer Society. https://doi.org/10.1109/FCCM.2009.25
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[29]
2009 | Conference Paper | LibreCat-ID: 2262
Kaufmann, P., Plessl, C., & Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS) (pp. 11–18). Los Alamitos, CA, USA: IEEE Computer Society.
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[28]
2009 | Conference Paper | LibreCat-ID: 2263
Grad, M., & Plessl, C. (2009). Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 319–322). USA: CSREA Press.
LibreCat
 
[27]
2009 | Conference Paper | LibreCat-ID: 2352
Beutel, J., Gruber, S., Hasler, A., Lim, R., Meier, A., Plessl, C., … Yuecel, M. (2009). PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. In Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN) (pp. 265–276). Washington, DC, USA: IEEE Computer Society.
LibreCat
 
[26]
2009 | Conference Paper | LibreCat-ID: 2238
Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2009). Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig) (pp. 119–124). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/ReConFig.2009.32
LibreCat | DOI
 
[25]
2009 | Report | LibreCat-ID: 2353
Woehrle, M., Plessl, C., & Thiele, L. (2009). Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich.
LibreCat
 
[24]
2008 | Conference Paper | LibreCat-ID: 2370
Woehrle, M., Plessl, C., Lim, R., Beutel, J., & Thiele, L. (2008). EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. In IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC) (pp. 201–208). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/SUTC.2008.24
LibreCat | DOI
 
[23]
2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., & Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 245–251). CSREA Press.
LibreCat
 
[22]
2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, T., Plessl, C., & Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In Many-core and Reconfigurable Supercomputing Conference (MRSC).
LibreCat
 
[21]
2007 | Conference Paper | LibreCat-ID: 2392
Woehrle, M., Plessl, C., Beutel, J., & Thiele, L. (2007). Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework. In Proc. Workshop on Embedded Networked Sensors (EmNets) (pp. 93–97). New York, NY, USA: ACM. https://doi.org/10.1145/1278972.1278996
LibreCat | DOI
 
[20]
2007 | Conference Paper | LibreCat-ID: 2393
Beutel, J., Dyer, M., Lim, R., Plessl, C., Woehrle, M., Yuecel, M., & Thiele, L. (2007). Automated Wireless Sensor Network Testing. In Proc. Int. Conf. Networked Sensing Systems (INSS) (pp. 303–303). Piscataway, NJ, USA: IEEE. https://doi.org/10.1109/INSS.2007.4297445
LibreCat | DOI
 
[19]
2007 | Report | LibreCat-ID: 2394
Beutel, J., Plessl, C., & Woehrle, M. (2007). Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. Computer Engineering and Networks Laboratory, ETH Zurich.
LibreCat
 
[18]
2006 | Conference Paper | LibreCat-ID: 2401
Plessl, C., Platzner, M., & Thiele, L. (2006). Optimal Temporal Partitioning based on Slowdown and Retiming. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 345–348). IEEE Computer Society. https://doi.org/10.1109/FPT.2006.270344
LibreCat | DOI
 
[17]
2006 | Dissertation | LibreCat-ID: 2404
Plessl, C. (2006). Hardware virtualization on a coarse-grained reconfigurable processor. Aachen, Germany: Shaker Verlag. https://doi.org/10.2370/9783832255619
LibreCat | DOI
 
[16]
2005 | Journal Article | LibreCat-ID: 2412
Enzler, R., Plessl, C., & Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73. https://doi.org/10.1016/j.micpro.2004.06.004
LibreCat | DOI
 
[15]
2005 | Conference Paper | LibreCat-ID: 2411
Plessl, C., & Platzner, M. (2005). Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 213–218). IEEE Computer Society. https://doi.org/10.1109/ASAP.2005.69
LibreCat | DOI
 
[14]
2004 | Conference Paper | LibreCat-ID: 2415
Plessl, C., & Platzner, M. (2004). Virtualization of Hardware – Introduction and Survey. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 63–69). CSREA Press.
LibreCat
 
[13]
2003 | Conference Paper | LibreCat-ID: 2418
Plessl, C., & Platzner, M. (2003). TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 252–259). IEEE Computer Society. https://doi.org/10.1109/FPT.2003.1275755
LibreCat | DOI
 
[12]
2003 | Journal Article | LibreCat-ID: 2420
Plessl, C., & Platzner, M. (2003). Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing, 26(2), 109–129. https://doi.org/10.1023/a:1024443416592
LibreCat | DOI
 
[11]
2003 | Conference Paper | LibreCat-ID: 2421
Enzler, R., Plessl, C., & Platzner, M. (2003). Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (Vol. 2778, pp. 151–160). Springer. https://doi.org/10.1007/b12007
LibreCat | DOI
 
[10]
2003 | Journal Article | LibreCat-ID: 2419
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., & Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308. https://doi.org/10.1007/s00779-003-0243-x
LibreCat | DOI
 
[9]
2003 | Conference Paper | LibreCat-ID: 2422
Enzler, R., Plessl, C., & Platzner, M. (2003). Co-simulation of a Hybrid Multi-Context Architecture. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 174–180). CSREA Press.
LibreCat
 
[8]
2002 | Conference Paper | LibreCat-ID: 2424
Dyer, M., Plessl, C., & Platzner, M. (2002). Partially Reconfigurable Cores for Xilinx Virtex. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (Vol. 2438, pp. 292–301). Springer. https://doi.org/10.1007/3-540-46117-5
LibreCat | DOI
 
[7]
2002 | Conference Paper | LibreCat-ID: 2425
Plessl, C., & Platzner, M. (2002). Custom Computing Machines for the Set Covering Problem. In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM) (pp. 163–172). IEEE Computer Society. https://doi.org/10.1109/FPGA.2002.1106671
LibreCat | DOI
 
[6]
2002 | Conference Paper | LibreCat-ID: 2423
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., & Thiele, L. (2002). Reconfigurable Hardware in Wearable Computing Nodes. In Proc. Int. Symp. on Wearable Computers (ISWC) (pp. 215–222). IEEE Computer Society. https://doi.org/10.1109/ISWC.2002.1167250
LibreCat | DOI
 
[5]
2001 | Journal Article | LibreCat-ID: 2429
Plessl, C., & Wilde, E. (2001). Server-Side-Techniken im Web – ein Überblick. IX, 88–93.
LibreCat
 
[4]
2001 | Conference Paper | LibreCat-ID: 2432
Enzler, R., Platzner, M., Plessl, C., Thiele, L., & Tröster, G. (2001). Reconfigurable Processors for Handhelds and Wearables: Application Analysis. In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III (Vol. 4525, pp. 135–146). https://doi.org/10.1117/12.434376
LibreCat | DOI
 
[3]
2001 | Conference Paper | LibreCat-ID: 2428
Plessl, C., & Platzner, M. (2001). Instance-Specific Accelerators for Minimum Covering. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 85–91). CSREA Press.
LibreCat
 
[2]
2001 | Mastersthesis | LibreCat-ID: 2430
Plessl, C. (2001). Reconfigurable Accelerators for Minimum Covering. Computer Engineering and Networks Lab, ETH Zurich, Switzerland.
LibreCat
 
[1]
2000 | Mastersthesis | LibreCat-ID: 2433
Plessl, C., & Maurer, S. (2000). Hardware/Software Codesign in Speech Compression Applications. Computer Engineering and Networks Lab, ETH Zurich, Switzerland.
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[100]
2019 | Journal Article | LibreCat-ID: 7689
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2019). Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL (to appear). ACM Trans. Archit. Code Optim. (TACO).
LibreCat | Files available
 
[99]
2019 | Journal Article | LibreCat-ID: 12871
Platzner, M., & Plessl, C. (2019). FPGAs im Rechenzentrum. Informatik Spektrum. https://doi.org/10.1007/s00287-019-01187-w
LibreCat | Files available | DOI
 
[98]
2019 | Preprint | LibreCat-ID: 12878
Rengaraj, V., Lass, M., Plessl, C., & Kühne, T. (2019). Accurate Sampling with Noisy Forces from Approximate Computing. ArXiv:1907.08497.
LibreCat | arXiv
 
[97]
2019 | Journal Article | LibreCat-ID: 21
Richters, D., Lass, M., Walther, A., Plessl, C., & Kühne, T. (2019). A General Algorithm to Calculate the Inverse Principal p-th Root of Symmetric Positive Definite Matrices. Communications in Computational Physics, 25(2), 564–585. https://doi.org/10.4208/cicp.OA-2018-0053
LibreCat | DOI | arXiv
 
[96]
2018 | Journal Article | LibreCat-ID: 6516
Mertens, J. C., Boschmann, A., Schmidt, M., & Plessl, C. (2018). Sprint diagnostic with GPS and inertial sensor fusion. Sports Engineering, 21(4), 441–451. https://doi.org/10.1007/s12283-018-0291-0
LibreCat | Files available | DOI
 
[95]
2018 | Journal Article | LibreCat-ID: 20
Lass, M., Kühne, T., & Plessl, C. (2018). Using Approximate Computing for the Calculation of Inverse Matrix p-th Roots. Embedded Systems Letters, 10(2), 33–36. https://doi.org/10.1109/LES.2017.2760923
LibreCat | DOI | arXiv
 
[94]
2018 | Conference Paper | LibreCat-ID: 1588
Kenter, T., Mahale, G., Alhaddad, S., Grynko, Y., Schmitt, C., Afzal, A., … Plessl, C. (2018). OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes. In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM). IEEE. https://doi.org/10.1109/FCCM.2018.00037
LibreCat | Files available | DOI
 
[93]
2018 | Conference Paper | LibreCat-ID: 1204
Riebler, H., Vaz, G. F., Kenter, T., & Plessl, C. (2018). Automated Code Acceleration Targeting Heterogeneous OpenCL Devices. In Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). ACM. https://doi.org/10.1145/3178487.3178534
LibreCat | Files available | DOI
 
[92]
2018 | Conference Paper | LibreCat-ID: 1590
Lass, M., Mohr, S., Wiebeler, H., Kühne, T., & Plessl, C. (2018). A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices. In Proc. Platform for Advanced Scientific Computing (PASC) Conference. New York, NY, USA: ACM. https://doi.org/10.1145/3218176.3218231
LibreCat | DOI | arXiv
 
[91]
2017 | Journal Article | LibreCat-ID: 1589
Schumacher, J., Plessl, C., & Vandelli, W. (2017). High-Throughput and Low-Latency Network Communication with NetIO. Journal of Physics: Conference Series, 898. https://doi.org/10.1088/1742-6596/898/8/082003
LibreCat | DOI
 
[90]
2017 | Conference Paper | LibreCat-ID: 1592
Kenter, T., Förstner, J., & Plessl, C. (2017). Flexible FPGA design for FDTD using OpenCL. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE. https://doi.org/10.23919/FPL.2017.8056844
LibreCat | Files available | DOI
 
[89]
2017 | Journal Article | LibreCat-ID: 18
Riebler, H., Lass, M., Mittendorf, R., Löcke, T., & Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 10(3), 24:1-24:23. https://doi.org/10.1145/3053687
LibreCat | Files available | DOI
 
[88]
2016 | Conference Paper | LibreCat-ID: 24
Kenter, T., & Plessl, C. (2016). Microdisk Cavity FDTD Simulation on FPGA using OpenCL. In Proc. Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC).
LibreCat | Files available
 
[87]
2016 | Conference Paper | LibreCat-ID: 31
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., & Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In Proc. HiPEAC Workshop on Reonfigurable Computing (WRC).
LibreCat | Files available
 
[86]
2016 | Book Chapter | LibreCat-ID: 156
Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2016). Self-aware Compute Nodes. In Self-aware Computing Systems (pp. 145–165). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-39675-0_8
LibreCat | Files available | DOI
 
[85]
2016 | Conference Paper | LibreCat-ID: 168
Lösch, A., Beisel, T., Kenter, T., Plessl, C., & Platzner, M. (2016). Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. In Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) (pp. 912–917). EDA Consortium / IEEE.
LibreCat | Files available
 
[84]
2016 | Book Chapter | LibreCat-ID: 29
Agne, A., Platzner, M., Plessl, C., Happe, M., & Lübbers, E. (2016). ReconOS. In D. Koch, F. Hannig, & D. Ziener (Eds.), FPGAs for Software Programmers (pp. 227–244). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-26408-0_13
LibreCat | DOI
 
[83]
2016 | Conference Paper | LibreCat-ID: 138
Riebler, H., Vaz, G. F., Plessl, C., Trainiti, E. M. G., Durelli, G. C., Del Sozzo, E., … Bolchini, C. (2016). Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems. In Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI) (pp. 1–5). IEEE. https://doi.org/10.1109/RTSI.2016.7740545
LibreCat | Files available | DOI
 
[82]
2016 | Conference Paper | LibreCat-ID: 171
Kenter, T., Vaz, G. F., Riebler, H., & Plessl, C. (2016). Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract). In Workshop on Reconfigurable Computing (WRC).
LibreCat | Files available
 
[81]
2016 | Conference Paper | LibreCat-ID: 25
Lass, M., Kühne, T., & Plessl, C. (2016). Using Approximate Computing in Scientific Codes. In Workshop on Approximate Computing (AC).
LibreCat
 
[80]
2016 | Journal Article | LibreCat-ID: 165
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2016). Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code. Computers and Electrical Engineering, 55, 91–111. https://doi.org/10.1016/j.compeleceng.2016.04.021
LibreCat | Files available | DOI
 
[79]
2015 | Journal Article | LibreCat-ID: 1775
Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., Drake, G., … Zhang, J. (2015). FELIX: a High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades. Journal of Physics: Conference Series, 664. https://doi.org/10.1088/1742-6596/664/8/082050
LibreCat | DOI
 
[78]
2015 | Journal Article | LibreCat-ID: 1768
Plessl, C., Platzner, M., & Schreier, P. J. (2015). Aktuelles Schlagwort: Approximate Computing. Informatik Spektrum, (5), 396–399. https://doi.org/10.1007/s00287-015-0911-z
LibreCat | DOI
 
[77]
2015 | Conference Paper | LibreCat-ID: 238
Damschen, M., Riebler, H., Vaz, G. F., & Plessl, C. (2015). Transparent offloading of computational hotspots from binary code to Xeon Phi. In Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE) (pp. 1078–1083). EDA Consortium / IEEE. https://doi.org/10.7873/DATE.2015.1124
LibreCat | Files available | DOI
 
[76]
2015 | Conference Paper | LibreCat-ID: 303
Damschen, M., & Plessl, C. (2015). Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. In Proceedings of the 5th International Workshop on Adaptive Self-tuning Computing Systems (ADAPT).
LibreCat | Files available | arXiv
 
[75]
2015 | Journal Article | LibreCat-ID: 296
Kenter, T., Schmitz, H., & Plessl, C. (2015). Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study. International Journal of Reconfigurable Computing (IJRC), 2015. https://doi.org/10.1155/2015/859425
LibreCat | Files available | DOI
 
[74]
2015 | Journal Article | LibreCat-ID: 1772
Torresen, J., Plessl, C., & Yao, X. (2015). Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction. IEEE Computer, 48(7), 18–20. https://doi.org/10.1109/MC.2015.205
LibreCat | Files available | DOI
 
[73]
2015 | Conference Paper | LibreCat-ID: 1773
Schumacher, J., T. Anderson, J., Borga, A., Boterenbrood, H., Chen, H., Chen, K., … Zhang, J. (2015). Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. In Proc. Int. Conf. on Distributed Event-Based Systems (DEBS). ACM. https://doi.org/10.1145/2675743.2771824
LibreCat | DOI
 
[72]
2014 | Conference Paper | LibreCat-ID: 439
Vaz, G. F., Riebler, H., Kenter, T., & Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2014.7032509
LibreCat | Files available | DOI
 
[71]
2014 | Conference Paper | LibreCat-ID: 388
Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC) (Vol. 8405, pp. 144–155). Cham: Springer International Publishing. https://doi.org/10.1007/978-3-319-05960-0_13
LibreCat | Files available | DOI
 
[70]
2014 | Journal Article | LibreCat-ID: 1779
Giefers, H., Plessl, C., & Förstner, J. (2014). Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers. ACM SIGARCH Computer Architecture News, 41(5), 65–70. https://doi.org/10.1145/2641361.2641372
LibreCat | DOI
 
[69]
2014 | Journal Article | LibreCat-ID: 365
Agne, A., Happe, M., Lösch, A., Plessl, C., & Platzner, M. (2014). Self-awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 7(2). https://doi.org/10.1145/2617596
LibreCat | Files available | DOI
 
[68]
2014 | Conference Paper | LibreCat-ID: 377
Riebler, H., Kenter, T., Plessl, C., & Sorge, C. (2014). Reconstructing AES Key Schedules from Decayed Memory with FPGAs. In Proceedings of Field-Programmable Custom Computing Machines (FCCM) (pp. 222–229). IEEE. https://doi.org/10.1109/FCCM.2014.67
LibreCat | Files available | DOI
 
[67]
2014 | Book Chapter | LibreCat-ID: 335
Platzner, M., & Plessl, C. (2014). Verschiebungen an der Grenze zwischen Hardware und Software. In J. Künsemöller, N. O. Eke, L. Foit, & T. Kaerlein (Eds.), Logiken strukturbildender Prozesse: Automatismen (pp. 123–144). Paderborn: Wilhelm Fink.
LibreCat | Files available
 
[66]
2014 | Journal Article | LibreCat-ID: 328
Agne, A., Happe, M., Keller, A., Lübbers, E., Plattner, B., Platzner, M., & Plessl, C. (2014). ReconOS - An Operating System Approach for Reconfigurable Computing. IEEE Micro, 34(1), 60–71. https://doi.org/10.1109/MM.2013.110
LibreCat | Files available | DOI
 
[65]
2014 | Conference Paper | LibreCat-ID: 406
Kenter, T., Schmitz, H., & Plessl, C. (2014). Kernel-Centric Acceleration of High Accuracy Stereo-Matching. In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2014.7032535
LibreCat | Files available | DOI
 
[64]
2014 | Journal Article | LibreCat-ID: 363
Agne, A., Hangmann, H., Happe, M., Platzner, M., & Plessl, C. (2014). Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators. Microprocessors and Microsystems, 38(8, Part B), 911–919. https://doi.org/10.1016/j.micpro.2013.12.001
LibreCat | Files available | DOI
 
[63]
2014 | Conference Paper | LibreCat-ID: 1780
C. Durelli, G., Copolla, M., Djafarian, K., Koranaros, G., Miele, A., Paolino, M., … Bolchini, C. (2014). SAVE: Towards efficient resource management in heterogeneous system architectures. In Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). Springer. https://doi.org/10.1007/978-3-319-05960-0_38
LibreCat | DOI
 
[62]
2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli, G., Pogliani, M., Miele, A., Plessl, C., Riebler, H., Vaz, G. F., … Bolchini, C. (2014). Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. In Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA) (pp. 142–149). IEEE. https://doi.org/10.1109/ISPA.2014.27
LibreCat | DOI
 
[61]
2013 | Conference Paper | LibreCat-ID: 528
Riebler, H., Kenter, T., Sorge, C., & Plessl, C. (2013). FPGA-accelerated Key Search for Cold-Boot Attacks against AES. In Proceedings of the International Conference on Field-Programmable Technology (FPT) (pp. 386–389). IEEE. https://doi.org/10.1109/FPT.2013.6718394
LibreCat | Files available | DOI
 
[60]
2013 | Conference Paper | LibreCat-ID: 1787
Suess, T., Schoenrock, A., Meisner, S., & Plessl, C. (2013). Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW) (pp. 64–73). Washington, DC, USA: IEEE Computer Society. https://doi.org/10.1109/IPDPSW.2013.136
LibreCat | DOI
 
[59]
2013 | Conference Paper | LibreCat-ID: 505
Happe, M., Kling, P., Plessl, C., Platzner, M., & Meyer auf der Heide, F. (2013). On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. In Proceedings of the 9th IEEE Workshop on Software Technology for Future embedded and Ubiquitous Systems (SEUS). IEEE. https://doi.org/10.1109/ISORC.2013.6913232
LibreCat | Files available | DOI
 
[58]
2012 | Conference Paper | LibreCat-ID: 612
Rüthing, C., Happe, M., Agne, A., & Plessl, C. (2012). Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL) (pp. 559–562). IEEE. https://doi.org/10.1109/FPL.2012.6339370
LibreCat | Files available | DOI
 
[57]
2012 | Journal Article | LibreCat-ID: 2108
Schumacher, T., Plessl, C., & Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126. https://doi.org/10.1016/j.micpro.2011.04.002
LibreCat | DOI
 
[56]
2012 | Journal Article | LibreCat-ID: 2177
Grad, M., & Plessl, C. (2012). On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-based Reconfigurable Processors. Int. Journal of Reconfigurable Computing (IJRC). https://doi.org/10.1155/2012/418315
LibreCat | DOI
 
[55]
2012 | Conference Paper | LibreCat-ID: 567
Barrio, P., Carreras, C., Sierra, R., Kenter, T., & Plessl, C. (2012). Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In Proceedings of the International Conference on High Performance Computing and Simulation (HPCS) (pp. 559–565). IEEE. https://doi.org/10.1109/HPCSim.2012.6266973
LibreCat | Files available | DOI
 
[54]
2012 | Conference Paper | LibreCat-ID: 2180
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2012). Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In Proc. Workshop on Computer Architecture and Operating System Co-design (CAOS).
LibreCat
 
[53]
2012 | Misc | LibreCat-ID: 587
Plessl, C., Platzner, M., Agne, A., Happe, M., & Lübbers, E. (2012). Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine.
LibreCat | Files available
 
[52]
2012 | Conference Paper | LibreCat-ID: 615
Happe, M., Hangmann, H., Agne, A., & Plessl, C. (2012). Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2012.6416745
LibreCat | Files available | DOI
 
[51]
2012 | Conference Paper | LibreCat-ID: 609
Happe, M., Agne, A., Plessl, C., & Platzner, M. (2012). Hardware/Software Platform for Self-aware Compute Nodes. In Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) (pp. 8–9).
LibreCat | Files available
 
[50]
2012 | Conference Paper | LibreCat-ID: 2106
Meyer, B., Schumacher, J., Plessl, C., & Förstner, J. (2012). Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (pp. 189–196). IEEE. https://doi.org/10.1109/FPL.2012.6339370
LibreCat | Files available | DOI
 
[49]
2012 | Conference Paper | LibreCat-ID: 591
Kenter, T., Plessl, C., & Schmitz, H. (2012). Pragma based parallelization - Trading hardware efficiency for ease of use? In Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig) (pp. 1–8). IEEE. https://doi.org/10.1109/ReConFig.2012.6416773
LibreCat | Files available | DOI
 
[48]
2011 | Conference Paper | LibreCat-ID: 2191
Kenter, T., Plessl, C., Platzner, M., & Kauschke, M. (2011). Estimation and Partitioning for CPU-Accelerator Architectures. In Intel European Research and Innovation Conference.
LibreCat
 
[47]
2011 | Conference Paper | LibreCat-ID: 656
Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig) (pp. 55–60). IEEE. https://doi.org/10.1109/ReConFig.2011.59
LibreCat | Files available | DOI
 
[46]
2011 | Conference Paper | LibreCat-ID: 2200
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. In Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA) (pp. 177–180). New York, NY, USA: ACM. https://doi.org/10.1145/1950413.1950448
LibreCat | DOI
 
[45]
2011 | Conference Paper | LibreCat-ID: 2193
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 223–226). IEEE Computer Society. https://doi.org/10.1109/ASAP.2011.6043273
LibreCat | DOI
 
[44]
2011 | Journal Article | LibreCat-ID: 2201
Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC). https://doi.org/10.1155/2011/760954
LibreCat | DOI
 
[43]
2011 | Conference Paper | LibreCat-ID: 2198
Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In Proc. Reconfigurable Architectures Workshop (RAW) (pp. 278–285). IEEE Computer Society. https://doi.org/10.1109/IPDPS.2011.153
LibreCat | DOI
 
[42]
2011 | Book Chapter | LibreCat-ID: 2202
Plessl, C., & Platzner, M. (2011). Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. In M. Khalgui & H.-M. Hanisch (Eds.), Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility. Hershey, PA, USA: IGI Global. https://doi.org/10.4018/978-1-60960-086-0
LibreCat | DOI
 
[41]
2011 | Conference Paper | LibreCat-ID: 2194
Meyer, B., Plessl, C., & Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In Symp. on Application Accelerators in High Performance Computing (SAAHPC) (pp. 60–63). IEEE Computer Society. https://doi.org/10.1109/SAAHPC.2011.12
LibreCat | DOI
 
[40]
2010 | Conference Paper | LibreCat-ID: 2227
Woehrle, M., Plessl, C., & Thiele, L. (2010). Rupeas: Ruby Powered Event Analysis DSL. In Proc. Int. Conf. Networked Sensing Systems (INSS) (pp. 245–248). IEEE. https://doi.org/10.1109/INSS.2010.5572211
LibreCat | DOI
 
[39]
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks, T. P., Andrews, D., DeMara, R., Lam, H., Lee, J., Plessl, C., & Stitt, G. (Eds.). (2010). Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
LibreCat
 
[38]
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers, E., Platzner, M., Plessl, C., Keller, A., & Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 225–231). CSREA Press.
LibreCat
 
[37]
2010 | Conference Paper | LibreCat-ID: 2228
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2010). Performance Estimation for the Exploration of CPU-Accelerator Architectures. In O. Hammami & S. Larrabee (Eds.), Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA).
LibreCat
 
[36]
2010 | Conference Paper | LibreCat-ID: 2216
Grad, M., & Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig) (pp. 67–72). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/ReConFig.2010.19
LibreCat | DOI
 
[35]
2010 | Conference Paper | LibreCat-ID: 2224
Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 144–150). CSREA Press.
LibreCat
 
[34]
2010 | Conference Paper | LibreCat-ID: 2206
Keller, A., Plattner, B., Lübbers, E., Platzner, M., & Plessl, C. (2010). Reconfigurable Nodes for Future Networks. In Proc. IEEE Globecom Workshop on Network of the Future (FutureNet) (pp. 372–376). IEEE. https://doi.org/10.1109/GLOCOMW.2010.5700341
LibreCat | DOI
 
[33]
2010 | Conference Paper | LibreCat-ID: 2220
Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures: History and Trends. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (p. 165). CSREA Press.
LibreCat
 
[32]
2010 | Conference Paper | LibreCat-ID: 2226
Beisel, T., Niekamp, M., & Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 65–72). IEEE Computer Society. https://doi.org/10.1109/ASAP.2010.5540798
LibreCat | DOI
 
[31]
2009 | Conference Paper | LibreCat-ID: 2261
Schumacher, T., Plessl, C., & Platzner, M. (2009). An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (pp. 338–344). IEEE.
LibreCat
 
[30]
2009 | Conference Paper | LibreCat-ID: 2350
Schumacher, T., Plessl, C., & Platzner, M. (2009). IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM) (pp. 275–278). IEEE Computer Society. https://doi.org/10.1109/FCCM.2009.25
LibreCat | DOI
 
[29]
2009 | Conference Paper | LibreCat-ID: 2262
Kaufmann, P., Plessl, C., & Platzner, M. (2009). EvoCaches: Application-specific Adaptation of Cache Mapping. In Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS) (pp. 11–18). Los Alamitos, CA, USA: IEEE Computer Society.
LibreCat
 
[28]
2009 | Conference Paper | LibreCat-ID: 2263
Grad, M., & Plessl, C. (2009). Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 319–322). USA: CSREA Press.
LibreCat
 
[27]
2009 | Conference Paper | LibreCat-ID: 2352
Beutel, J., Gruber, S., Hasler, A., Lim, R., Meier, A., Plessl, C., … Yuecel, M. (2009). PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes. In Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN) (pp. 265–276). Washington, DC, USA: IEEE Computer Society.
LibreCat
 
[26]
2009 | Conference Paper | LibreCat-ID: 2238
Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2009). Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig) (pp. 119–124). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/ReConFig.2009.32
LibreCat | DOI
 
[25]
2009 | Report | LibreCat-ID: 2353
Woehrle, M., Plessl, C., & Thiele, L. (2009). Rupeas: Ruby Powered Event Analysis DSL. Computer Engineering and Networks Lab, ETH Zurich.
LibreCat
 
[24]
2008 | Conference Paper | LibreCat-ID: 2370
Woehrle, M., Plessl, C., Lim, R., Beutel, J., & Thiele, L. (2008). EvAnT: Analysis and Checking of event traces for Wireless Sensor Networks. In IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC) (pp. 201–208). Los Alamitos, CA, USA: IEEE Computer Society. https://doi.org/10.1109/SUTC.2008.24
LibreCat | DOI
 
[23]
2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, T., Meiche, R., Kaufmann, P., Lübbers, E., Plessl, C., & Platzner, M. (2008). A Hardware Accelerator for k-th Nearest Neighbor Thinning. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 245–251). CSREA Press.
LibreCat
 
[22]
2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, T., Plessl, C., & Platzner, M. (2008). IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers. In Many-core and Reconfigurable Supercomputing Conference (MRSC).
LibreCat
 
[21]
2007 | Conference Paper | LibreCat-ID: 2392
Woehrle, M., Plessl, C., Beutel, J., & Thiele, L. (2007). Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework. In Proc. Workshop on Embedded Networked Sensors (EmNets) (pp. 93–97). New York, NY, USA: ACM. https://doi.org/10.1145/1278972.1278996
LibreCat | DOI
 
[20]
2007 | Conference Paper | LibreCat-ID: 2393
Beutel, J., Dyer, M., Lim, R., Plessl, C., Woehrle, M., Yuecel, M., & Thiele, L. (2007). Automated Wireless Sensor Network Testing. In Proc. Int. Conf. Networked Sensing Systems (INSS) (pp. 303–303). Piscataway, NJ, USA: IEEE. https://doi.org/10.1109/INSS.2007.4297445
LibreCat | DOI
 
[19]
2007 | Report | LibreCat-ID: 2394
Beutel, J., Plessl, C., & Woehrle, M. (2007). Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. Computer Engineering and Networks Laboratory, ETH Zurich.
LibreCat
 
[18]
2006 | Conference Paper | LibreCat-ID: 2401
Plessl, C., Platzner, M., & Thiele, L. (2006). Optimal Temporal Partitioning based on Slowdown and Retiming. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 345–348). IEEE Computer Society. https://doi.org/10.1109/FPT.2006.270344
LibreCat | DOI
 
[17]
2006 | Dissertation | LibreCat-ID: 2404
Plessl, C. (2006). Hardware virtualization on a coarse-grained reconfigurable processor. Aachen, Germany: Shaker Verlag. https://doi.org/10.2370/9783832255619
LibreCat | DOI
 
[16]
2005 | Journal Article | LibreCat-ID: 2412
Enzler, R., Plessl, C., & Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73. https://doi.org/10.1016/j.micpro.2004.06.004
LibreCat | DOI
 
[15]
2005 | Conference Paper | LibreCat-ID: 2411
Plessl, C., & Platzner, M. (2005). Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP) (pp. 213–218). IEEE Computer Society. https://doi.org/10.1109/ASAP.2005.69
LibreCat | DOI
 
[14]
2004 | Conference Paper | LibreCat-ID: 2415
Plessl, C., & Platzner, M. (2004). Virtualization of Hardware – Introduction and Survey. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 63–69). CSREA Press.
LibreCat
 
[13]
2003 | Conference Paper | LibreCat-ID: 2418
Plessl, C., & Platzner, M. (2003). TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot. In Proc. Int. Conf. on Field Programmable Technology (ICFPT) (pp. 252–259). IEEE Computer Society. https://doi.org/10.1109/FPT.2003.1275755
LibreCat | DOI
 
[12]
2003 | Journal Article | LibreCat-ID: 2420
Plessl, C., & Platzner, M. (2003). Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing, 26(2), 109–129. https://doi.org/10.1023/a:1024443416592
LibreCat | DOI
 
[11]
2003 | Conference Paper | LibreCat-ID: 2421
Enzler, R., Plessl, C., & Platzner, M. (2003). Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (Vol. 2778, pp. 151–160). Springer. https://doi.org/10.1007/b12007
LibreCat | DOI
 
[10]
2003 | Journal Article | LibreCat-ID: 2419
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., & Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308. https://doi.org/10.1007/s00779-003-0243-x
LibreCat | DOI
 
[9]
2003 | Conference Paper | LibreCat-ID: 2422
Enzler, R., Plessl, C., & Platzner, M. (2003). Co-simulation of a Hybrid Multi-Context Architecture. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 174–180). CSREA Press.
LibreCat
 
[8]
2002 | Conference Paper | LibreCat-ID: 2424
Dyer, M., Plessl, C., & Platzner, M. (2002). Partially Reconfigurable Cores for Xilinx Virtex. In Proc. Int. Conf. on Field Programmable Logic and Applications (FPL) (Vol. 2438, pp. 292–301). Springer. https://doi.org/10.1007/3-540-46117-5
LibreCat | DOI
 
[7]
2002 | Conference Paper | LibreCat-ID: 2425
Plessl, C., & Platzner, M. (2002). Custom Computing Machines for the Set Covering Problem. In Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM) (pp. 163–172). IEEE Computer Society. https://doi.org/10.1109/FPGA.2002.1106671
LibreCat | DOI
 
[6]
2002 | Conference Paper | LibreCat-ID: 2423
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., & Thiele, L. (2002). Reconfigurable Hardware in Wearable Computing Nodes. In Proc. Int. Symp. on Wearable Computers (ISWC) (pp. 215–222). IEEE Computer Society. https://doi.org/10.1109/ISWC.2002.1167250
LibreCat | DOI
 
[5]
2001 | Journal Article | LibreCat-ID: 2429
Plessl, C., & Wilde, E. (2001). Server-Side-Techniken im Web – ein Überblick. IX, 88–93.
LibreCat
 
[4]
2001 | Conference Paper | LibreCat-ID: 2432
Enzler, R., Platzner, M., Plessl, C., Thiele, L., & Tröster, G. (2001). Reconfigurable Processors for Handhelds and Wearables: Application Analysis. In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III (Vol. 4525, pp. 135–146). https://doi.org/10.1117/12.434376
LibreCat | DOI
 
[3]
2001 | Conference Paper | LibreCat-ID: 2428
Plessl, C., & Platzner, M. (2001). Instance-Specific Accelerators for Minimum Covering. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (pp. 85–91). CSREA Press.
LibreCat
 
[2]
2001 | Mastersthesis | LibreCat-ID: 2430
Plessl, C. (2001). Reconfigurable Accelerators for Minimum Covering. Computer Engineering and Networks Lab, ETH Zurich, Switzerland.
LibreCat
 
[1]
2000 | Mastersthesis | LibreCat-ID: 2433
Plessl, C., & Maurer, S. (2000). Hardware/Software Codesign in Speech Compression Applications. Computer Engineering and Networks Lab, ETH Zurich, Switzerland.
LibreCat
 

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