Christian Plessl

Paderborn Center for Parallel Computing (PC2)
Hochleistungsrechnen
christian.plessl@uni-paderborn.de
ID
16153

136 Publications

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[136]
2025 | Journal Article | LibreCat-ID: 53202 | OA
Schapeler, Timon, et al. “Scalable Quantum Detector Tomography by High-Performance Computing.” Quantum Science and Technology, vol. 10, no. 1, IOP Publishing, 2025, doi:10.1088/2058-9565/ad8511.
LibreCat | DOI | Download (ext.) | arXiv
 
[135]
2024 | Preprint | LibreCat-ID: 53364
Meyer, Marius, et al. “Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL.” ArXiv:2403.18374, 2024.
LibreCat | arXiv
 
[134]
2024 | Journal Article | LibreCat-ID: 53474
Lass, Michael, et al. “Characterizing Microheterogeneity in Liquid Mixtures via Local Density Fluctuations.” Entropy, vol. 26, no. 4, 322, MDPI AG, 2024, doi:10.3390/e26040322.
LibreCat | DOI
 
[133]
2024 | Journal Article | LibreCat-ID: 53663 | OA
Bauer, Carsten, et al. “Noctua 2 Supercomputer.” Journal of Large-Scale Research Facilities, vol. 9, 2024, doi:10.17815/jlsrf-8-187 .
LibreCat | Files available | DOI
 
[132]
2024 | Conference Paper | LibreCat-ID: 56605
Opdenhövel, Jan-Oliver, et al. “StencilStream: A SYCL-Based Stencil Simulation Framework Targeting FPGAs.” 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2024, doi:10.1109/fpl64840.2024.00023.
LibreCat | DOI
 
[131]
2024 | Conference Paper | LibreCat-ID: 56607
Tareen, Abdul Rehman, et al. “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory.” 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), vol. 35, IEEE, 2024, doi:10.1109/fccm60383.2024.00014.
LibreCat | DOI
 
[130]
2024 | Conference Paper | LibreCat-ID: 56609
Stachura, Philip, et al. “SERI: High-Throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry Using HBM-Based FPGAs.” 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2024, pp. 60–68, doi:10.1109/fpl64840.2024.00018.
LibreCat | DOI | Download (ext.)
 
[129]
2024 | Conference Paper | LibreCat-ID: 54312
Büttner, Markus, et al. “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL.” Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), 11, ACM, 2024, doi:10.1145/3659914.3659925.
LibreCat | DOI
 
[128]
2024 | Preprint | LibreCat-ID: 57489
Wingenbach, Jan, et al. “PHOENIX -- Paderborn Highly Optimized and Energy Efficient Solver for  Two-Dimensional Nonlinear Schrödinger Equations with Integrated Extensions.” ArXiv:2411.18341, 2024.
LibreCat | arXiv
 
[127]
2024 | Journal Article | LibreCat-ID: 56604 | OA
Van Hirtum, Lennart, et al. “A Computation of the Ninth Dedekind Number Using FPGA Supercomputing.” ACM Transactions on Reconfigurable Technology and Systems, vol. 17, no. 3, Association for Computing Machinery (ACM), 2024, pp. 1–28, doi:10.1145/3674147.
LibreCat | DOI | Download (ext.)
 
[126]
2023 | Book Chapter | LibreCat-ID: 46191
Alt, Christoph, et al. “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline.” Lecture Notes in Computer Science, Springer Nature Switzerland, 2023, doi:10.1007/978-3-031-32041-5_5.
LibreCat | DOI
 
[125]
2023 | Preprint | LibreCat-ID: 43439
Van Hirtum, Lennart, et al. “A Computation of D(9) Using FPGA Supercomputing.” ArXiv:2304.03039, 2023.
LibreCat | arXiv
 
[124]
2023 | Conference Paper | LibreCat-ID: 46188
Faj, Jennifer, et al. “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes.” Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), ACM, 2023, doi:10.1145/3592979.3593407.
LibreCat | Files available | DOI | Download (ext.)
 
[123]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
Hansmeier, Tim, et al. “Compute Centers I: Heterogeneous Execution Environments.” On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, edited by Claus-Jochen Haake et al., vol. 412, Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–82, doi:10.5281/zenodo.8068642.
LibreCat | Files available | DOI
 
[122]
2023 | Conference Paper | LibreCat-ID: 46190 | OA
Opdenhövel, Jan-Oliver, et al. “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation.” Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), ACM, 2023, doi:10.1145/3597031.3597050.
LibreCat | DOI | Download (ext.)
 
[121]
2023 | Journal Article | LibreCat-ID: 38041 | OA
Meyer, Marius, et al. “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks.” ACM Transactions on Reconfigurable Technology and Systems, Association for Computing Machinery (ACM), 2023, doi:10.1145/3576200.
LibreCat | DOI | Download (ext.)
 
[120]
2023 | Conference Paper | LibreCat-ID: 43228
Wu, Xin, et al. “Computing and Compressing Electron Repulsion Integrals on FPGAs.” 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–73, doi:10.1109/FCCM57271.2023.00026.
LibreCat | DOI | Download (ext.) | arXiv
 
[119]
2023 | Journal Article | LibreCat-ID: 45361 | OA
Schade, Robert, et al. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.” The International Journal of High Performance Computing Applications, 109434202311776, SAGE Publications, 2023, doi:10.1177/10943420231177631.
LibreCat | DOI | Download (ext.)
 
[118]
2022 | Preprint | LibreCat-ID: 33493
Gavini, Vikram, et al. “Roadmap on Electronic Structure Codes in the Exascale Era.” ArXiv:2209.12747, 2022.
LibreCat | arXiv
 
[117]
2022 | Conference Paper | LibreCat-ID: 46193 | OA
Karp, Martin, et al. “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges.” International Conference on High Performance Computing in Asia-Pacific Region, ACM, 2022, doi:10.1145/3492805.3492808.
LibreCat | DOI | Download (ext.)
 
[116]
2022 | Preprint | LibreCat-ID: 32404
Kühne, Thomas, et al. “CP2K on the Road to Exascale.” ArXiv:2205.14741, 2022.
LibreCat | Download (ext.) | arXiv
 
[115]
2022 | Journal Article | LibreCat-ID: 33226 | OA
Schade, Robert, et al. “Parallel Quantum Chemistry on Noisy Intermediate-Scale Quantum Computers.” Phys. Rev. Research, vol. 4, American Physical Society, 2022, p. 033160, doi:10.1103/PhysRevResearch.4.033160.
LibreCat | DOI | Download (ext.)
 
[114]
2022 | Preprint | LibreCat-ID: 46275
Gavini, Vikram, et al. “Roadmap on Electronic Structure Codes in the Exascale Era.” ArXiv:2209.12747, 2022.
LibreCat | arXiv
 
[113]
2022 | Journal Article | LibreCat-ID: 33684 | OA
Schade, Robert, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.” Parallel Computing, vol. 111, 102920, Elsevier BV, 2022, doi:10.1016/j.parco.2022.102920.
LibreCat | DOI | Download (ext.)
 
[112]
2022 | Journal Article | LibreCat-ID: 27364
Meyer, Marius, et al. “In-Depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs Using OpenCL.” Journal of Parallel and Distributed Computing, 2022, doi:10.1016/j.jpdc.2021.10.007.
LibreCat | DOI
 
[111]
2021 | Journal Article | LibreCat-ID: 28099 | OA
Menzel, Johannes, et al. “The Strong Scaling Advantage of FPGAs in HPC for N-Body Simulations.” ACM Transactions on Reconfigurable Technology and Systems, vol. 15, no. 1, 2021, pp. 1–30, doi:10.1145/3491235.
LibreCat | DOI | Download (ext.)
 
[110]
2021 | Conference Paper | LibreCat-ID: 29937
Karp, Martin, et al. “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.” 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021, doi:10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[109]
2021 | Conference Paper | LibreCat-ID: 46195
Karp, Martin, et al. “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.” 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021, doi:10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[108]
2021 | Book Chapter | LibreCat-ID: 21587
Alhaddad, Samer, et al. “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids.” Euro-Par 2020: Parallel Processing Workshops, 2021, doi:10.1007/978-3-030-71593-9_15.
LibreCat | Files available | DOI
 
[107]
2021 | Book Chapter | LibreCat-ID: 29936
Ramaswami, Arjun, et al. “Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing.” Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2021, doi:10.1007/978-3-030-79025-7_21.
LibreCat | DOI
 
[106]
2021 | Journal Article | LibreCat-ID: 24788 | OA
Alhaddad, Samer, et al. “The HighPerMeshes Framework for Numerical Algorithms on Unstructured Grids.” Concurrency and Computation: Practice and Experience, 2021, p. e6616, doi:10.1002/cpe.6616.
LibreCat | Files available | DOI
 
[105]
2020 | Journal Article | LibreCat-ID: 16277 | OA
Kühne, Thomas, et al. “CP2K: An Electronic Structure and Molecular Dynamics Software Package - Quickstep: Efficient and Accurate Electronic Structure Calculations.” The Journal of Chemical Physics, vol. 152, no. 19, 194103, 2020, doi:10.1063/5.0007045.
LibreCat | Files available | DOI | Download (ext.) | arXiv
 
[104]
2020 | Conference Paper | LibreCat-ID: 16898
Lass, Michael, et al. “A Submatrix-Based Method for Approximate Matrix Function Evaluation in the Quantum Chemistry Code CP2K.” Proc. International Conference for High Performance Computing, Networking, Storage and Analysis (SC), IEEE Computer Society, 2020, pp. 1127–40, doi:10.1109/SC41405.2020.00084.
LibreCat | DOI | Download (ext.) | arXiv
 
[103]
2020 | Conference Paper | LibreCat-ID: 21632
Meyer, Marius, et al. “Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite.” 2020 IEEE/ACM International Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC), 2020, doi:10.1109/h2rc51942.2020.00007.
LibreCat | Files available | DOI | Download (ext.)
 
[102]
2020 | Journal Article | LibreCat-ID: 12878 | OA
Rengaraj, Varadarajan, et al. “Accurate Sampling with Noisy Forces from Approximate Computing.” Computation, vol. 8, no. 2, 39, MDPI, 2020, doi:10.3390/computation8020039.
LibreCat | DOI | Download (ext.) | arXiv
 
[101]
2019 | Journal Article | LibreCat-ID: 7689
Riebler, Heinrich, et al. “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL.” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, ACM, 2019, pp. 14:1–14:26, doi:10.1145/3319423.
LibreCat | Files available | DOI
 
[100]
2019 | Conference Paper | LibreCat-ID: 15478
Gorlani, Paolo, et al. “OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs.” Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2019, doi:10.1109/ICFPT47387.2019.00020.
LibreCat | Files available | DOI
 
[99]
2019 | Journal Article | LibreCat-ID: 21
Richters, Dorothee, et al. “A General Algorithm to Calculate the Inverse Principal P-Th Root of Symmetric Positive Definite Matrices.” Communications in Computational Physics, vol. 25, no. 2, Global Science Press, 2019, pp. 564–85, doi:10.4208/cicp.OA-2018-0053.
LibreCat | DOI | arXiv
 
[98]
2019 | Journal Article | LibreCat-ID: 12871 | OA
Platzner, Marco, and Christian Plessl. “FPGAs im Rechenzentrum.” Informatik Spektrum, 2019, doi:10.1007/s00287-019-01187-w.
LibreCat | Files available | DOI
 
[97]
2018 | Journal Article | LibreCat-ID: 20
Lass, Michael, et al. “Using Approximate Computing for the Calculation of Inverse Matrix P-Th Roots.” Embedded Systems Letters, vol. 10, no. 2, IEEE, 2018, pp. 33–36, doi:10.1109/LES.2017.2760923.
LibreCat | DOI | arXiv
 
[96]
2018 | Journal Article | LibreCat-ID: 6516
Mertens, Jan Cedric, et al. “Sprint Diagnostic with GPS and Inertial Sensor Fusion.” Sports Engineering, vol. 21, no. 4, Springer Nature, 2018, pp. 441–51, doi:10.1007/s12283-018-0291-0.
LibreCat | Files available | DOI
 
[95]
2018 | Conference Paper | LibreCat-ID: 1588
Kenter, Tobias, et al. “OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2018, doi:10.1109/FCCM.2018.00037.
LibreCat | Files available | DOI
 
[94]
2018 | Conference Paper | LibreCat-ID: 1590
Lass, Michael, et al. “A Massively Parallel Algorithm for the Approximate Calculation of Inverse P-Th Roots of Large Sparse Matrices.” Proc. Platform for Advanced Scientific Computing (PASC) Conference, ACM, 2018, doi:10.1145/3218176.3218231.
LibreCat | DOI | arXiv
 
[93]
2018 | Conference Paper | LibreCat-ID: 1204
Riebler, Heinrich, et al. “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices.” Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018, doi:10.1145/3178487.3178534.
LibreCat | Files available | DOI
 
[92]
2017 | Journal Article | LibreCat-ID: 18
Riebler, Heinrich, et al. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, Association for Computing Machinery (ACM), 2017, p. 24:1-24:23, doi:10.1145/3053687.
LibreCat | Files available | DOI
 
[91]
2017 | Conference Paper | LibreCat-ID: 1592
Kenter, Tobias, et al. “Flexible FPGA Design for FDTD Using OpenCL.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017, doi:10.23919/FPL.2017.8056844.
LibreCat | Files available | DOI
 
[90]
2017 | Journal Article | LibreCat-ID: 1589
Schumacher, Jörn, et al. “High-Throughput and Low-Latency Network Communication with NetIO.” Journal of Physics: Conference Series, vol. 898, 082003, IOP Publishing, 2017, doi:10.1088/1742-6596/898/8/082003.
LibreCat | DOI
 
[89]
2016 | Book Chapter | LibreCat-ID: 29
Agne, Andreas, et al. “ReconOS.” FPGAs for Software Programmers, edited by Dirk Koch et al., Springer International Publishing, 2016, pp. 227–44, doi:10.1007/978-3-319-26408-0_13.
LibreCat | DOI
 
[88]
2016 | Conference Paper | LibreCat-ID: 31
Riebler, Heinrich, et al. “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems.” Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
LibreCat | Files available
 
[87]
2016 | Conference Paper | LibreCat-ID: 24
Kenter, Tobias, and Christian Plessl. “Microdisk Cavity FDTD Simulation on FPGA Using OpenCL.” Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC), 2016.
LibreCat | Files available
 
[86]
2016 | Conference Paper | LibreCat-ID: 25
Lass, Michael, et al. “Using Approximate Computing in Scientific Codes.” Workshop on Approximate Computing (AC), 2016.
LibreCat
 
[85]
2016 | Conference Paper | LibreCat-ID: 138
Riebler, Heinrich, et al. “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems.” Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5, doi:10.1109/RTSI.2016.7740545.
LibreCat | Files available | DOI
 
[84]
2016 | Book Chapter | LibreCat-ID: 156
Agne, Andreas, et al. “Self-Aware Compute Nodes.” Self-Aware Computing Systems, Springer International Publishing, 2016, pp. 145–65, doi:10.1007/978-3-319-39675-0_8.
LibreCat | Files available | DOI
 
[83]
2016 | Journal Article | LibreCat-ID: 165
Vaz, Gavin Francis, et al. “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code.” Computers and Electrical Engineering, vol. 55, Elsevier, 2016, pp. 91–111, doi:10.1016/j.compeleceng.2016.04.021.
LibreCat | Files available | DOI
 
[82]
2016 | Conference Paper | LibreCat-ID: 168
Lösch, Achim, et al. “Performance-Centric Scheduling with Task Migration for a Heterogeneous Compute Node in the Data Center.” Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–17.
LibreCat | Files available
 
[81]
2016 | Conference Paper | LibreCat-ID: 171
Kenter, Tobias, et al. “Opportunities for Deferring Application Partitioning and Accelerator Synthesis to Runtime (Extended Abstract).” Workshop on Reconfigurable Computing (WRC), 2016.
LibreCat | Files available
 
[80]
2015 | Journal Article | LibreCat-ID: 1772
Torresen, Jim, et al. “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction.” IEEE Computer, vol. 48, no. 7, IEEE Computer Society, 2015, pp. 18–20, doi:10.1109/MC.2015.205.
LibreCat | Files available | DOI
 
[79]
2015 | Journal Article | LibreCat-ID: 296
Kenter, Tobias, et al. “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study.” International Journal of Reconfigurable Computing (IJRC), vol. 2015, 859425, Hindawi, 2015, doi:10.1155/2015/859425.
LibreCat | Files available | DOI
 
[78]
2015 | Conference Paper | LibreCat-ID: 303 | OA
Damschen, Marvin, and Christian Plessl. “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores.” Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
LibreCat | Files available | arXiv
 
[77]
2015 | Conference Paper | LibreCat-ID: 1773
Schumacher, Jörn, et al. “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm.” Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015, doi:10.1145/2675743.2771824.
LibreCat | DOI
 
[76]
2015 | Journal Article | LibreCat-ID: 1768
Plessl, Christian, et al. “Aktuelles Schlagwort: Approximate Computing.” Informatik Spektrum, no. 5, Springer, 2015, pp. 396–99, doi:10.1007/s00287-015-0911-z.
LibreCat | DOI
 
[75]
2015 | Conference Paper | LibreCat-ID: 238
Damschen, Marvin, et al. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.” Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–83, doi:10.7873/DATE.2015.1124.
LibreCat | Files available | DOI
 
[74]
2015 | Journal Article | LibreCat-ID: 1775
Anderson, J., et al. “FELIX: A High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades.” Journal of Physics: Conference Series, vol. 664, 082050, IOP Publishing, 2015, doi:10.1088/1742-6596/664/8/082050.
LibreCat | DOI
 
[73]
2014 | Book Chapter | LibreCat-ID: 335
Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen Hardware und Software.” Logiken strukturbildender Prozesse: Automatismen, edited by Jörn Künsemöller et al., Wilhelm Fink, 2014, pp. 123–44.
LibreCat | Files available
 
[72]
2014 | Conference Paper | LibreCat-ID: 388
Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:10.1007/978-3-319-05960-0_13.
LibreCat | Files available | DOI
 
[71]
2014 | Journal Article | LibreCat-ID: 363
Agne, Andreas, et al. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators.” Microprocessors and Microsystems, vol. 38, no. 8, Part B, Elsevier, 2014, pp. 911–19, doi:10.1016/j.micpro.2013.12.001.
LibreCat | Files available | DOI
 
[70]
2014 | Conference Paper | LibreCat-ID: 377
Riebler, Heinrich, et al. “Reconstructing AES Key Schedules from Decayed Memory with FPGAs.” Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–29, doi:10.1109/FCCM.2014.67.
LibreCat | Files available | DOI
 
[69]
2014 | Journal Article | LibreCat-ID: 365
Agne, Andreas, et al. “Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, 13, ACM, 2014, doi:10.1145/2617596.
LibreCat | Files available | DOI
 
[68]
2014 | Journal Article | LibreCat-ID: 328
Agne, Andreas, et al. “ReconOS - An Operating System Approach for Reconfigurable Computing.” IEEE Micro, vol. 34, no. 1, IEEE, 2014, pp. 60–71, doi:10.1109/MM.2013.110.
LibreCat | Files available | DOI
 
[67]
2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli, Gianluca, et al. “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach.” Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–49, doi:10.1109/ISPA.2014.27.
LibreCat | DOI
 
[66]
2014 | Conference Paper | LibreCat-ID: 439
Vaz, Gavin Francis, et al. “Deferring Accelerator Offloading Decisions to Application Runtime.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509.
LibreCat | Files available | DOI
 
[65]
2014 | Conference Paper | LibreCat-ID: 406
Kenter, Tobias, et al. “Kernel-Centric Acceleration of High Accuracy Stereo-Matching.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032535.
LibreCat | Files available | DOI
 
[64]
2014 | Conference Paper | LibreCat-ID: 1780
C. Durelli, Gianluca, et al. “SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures.” Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014, doi:10.1007/978-3-319-05960-0_38.
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[63]
2014 | Journal Article | LibreCat-ID: 1779
Giefers, Heiner, et al. “Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers.” ACM SIGARCH Computer Architecture News, vol. 41, no. 5, ACM, 2014, pp. 65–70, doi:10.1145/2641361.2641372.
LibreCat | DOI
 
[62]
2013 | Conference Paper | LibreCat-ID: 528
Riebler, Heinrich, et al. “FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.” Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–89, doi:10.1109/FPT.2013.6718394.
LibreCat | Files available | DOI
 
[61]
2013 | Conference Paper | LibreCat-ID: 505
Happe, Markus, et al. “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.” Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013, doi:10.1109/ISORC.2013.6913232.
LibreCat | Files available | DOI
 
[60]
2013 | Conference Paper | LibreCat-ID: 1787
Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136.
LibreCat | DOI
 
[59]
2012 | Misc | LibreCat-ID: 587
Plessl, Christian, et al. Programming Models for Reconfigurable Heterogeneous Multi-Cores. Awareness Magazine, 2012.
LibreCat | Files available
 
[58]
2012 | Conference Paper | LibreCat-ID: 2106
Meyer, Björn, et al. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–96, doi:10.1109/FPL.2012.6339370.
LibreCat | Files available | DOI
 
[57]
2012 | Journal Article | LibreCat-ID: 2108
Schumacher, Tobias, et al. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.” Microprocessors and Microsystems, vol. 36, no. 2, 2012, pp. 110–26, doi:10.1016/j.micpro.2011.04.002.
LibreCat | DOI
 
[56]
2012 | Conference Paper | LibreCat-ID: 615
Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.
LibreCat | Files available | DOI
 
[55]
2012 | Conference Paper | LibreCat-ID: 591
Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.
LibreCat | Files available | DOI
 
[54]
2012 | Conference Paper | LibreCat-ID: 609
Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.” Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat | Files available
 
[53]
2012 | Conference Paper | LibreCat-ID: 567
Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.
LibreCat | Files available | DOI
 
[52]
2012 | Conference Paper | LibreCat-ID: 612
Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62, doi:10.1109/FPL.2012.6339370.
LibreCat | Files available | DOI
 
[51]
2012 | Conference Paper | LibreCat-ID: 2180
Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
LibreCat
 
[50]
2012 | Journal Article | LibreCat-ID: 2177
Grad, Mariusz, and Christian Plessl. “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.” Int. Journal of Reconfigurable Computing (IJRC), Hindawi Publishing Corp., 2012, doi:10.1155/2012/418315.
LibreCat | DOI
 
[49]
2011 | Conference Paper | LibreCat-ID: 2191
Kenter, Tobias, et al. “Estimation and Partitioning for CPU-Accelerator Architectures.” Intel European Research and Innovation Conference, 2011.
LibreCat
 
[48]
2011 | Book Chapter | LibreCat-ID: 2202
Plessl, Christian, and Marco Platzner. “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors.” Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, edited by Mohamed Khalgui and Hans-Michael Hanisch, IGI Global, 2011, doi:10.4018/978-1-60960-086-0.
LibreCat | DOI
 
[47]
2011 | Book Chapter | LibreCat-ID: 10737
Sekanina, Lukas, et al. “Evolution of Electronic Circuits.” Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–79.
LibreCat
 
[46]
2011 | Conference Paper | LibreCat-ID: 2194
Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.
LibreCat | DOI
 
[45]
2011 | Conference Paper | LibreCat-ID: 2193
Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–26, doi:10.1109/ASAP.2011.6043273.
LibreCat | DOI
 
[44]
2011 | Conference Paper | LibreCat-ID: 656
Happe, Markus, et al. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.” Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60, doi:10.1109/ReConFig.2011.59.
LibreCat | Files available | DOI
 
[43]
2011 | Conference Paper | LibreCat-ID: 2200
Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.” Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, 2011, pp. 177–80, doi:10.1145/1950413.1950448.
LibreCat | DOI
 
[42]
2011 | Journal Article | LibreCat-ID: 2201
Schumacher, Tobias, et al. “FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study.” Int. Journal of Recon- Figurable Computing (IJRC), Hindawi Publishing Corp., 2011, doi:10.1155/2011/760954.
LibreCat | DOI
 
[41]
2011 | Conference Paper | LibreCat-ID: 2198
Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.” Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–85, doi:10.1109/IPDPS.2011.153.
LibreCat | DOI
 
[40]
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers, Enno, et al. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–31.
LibreCat
 
[39]
2010 | Conference Paper | LibreCat-ID: 2216
Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2010, pp. 67–72, doi:10.1109/ReConFig.2010.19.
LibreCat | DOI
 
[38]
2010 | Conference Paper | LibreCat-ID: 2224
Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–50.
LibreCat
 
[37]
2010 | Conference Paper | LibreCat-ID: 2220
Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
LibreCat
 
[36]
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks, Toomas P., et al., editors. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
LibreCat
 
[35]
2010 | Conference Paper | LibreCat-ID: 2226
Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798.
LibreCat | DOI
 
[34]
2010 | Conference Paper | LibreCat-ID: 2206
Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.” Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341.
LibreCat | DOI
 
[33]
2010 | Conference Paper | LibreCat-ID: 2227
Woehrle, Matthias, et al. “Rupeas: Ruby Powered Event Analysis DSL.” Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–48, doi:10.1109/INSS.2010.5572211.
LibreCat | DOI
 
[32]
2010 | Conference Paper | LibreCat-ID: 2228
Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.
LibreCat
 
[31]
2009 | Report | LibreCat-ID: 2353
Woehrle, Matthias, et al. Rupeas: Ruby Powered Event Analysis DSL. 2009.
LibreCat
 
[30]
2009 | Conference Paper | LibreCat-ID: 2350
Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.
LibreCat | DOI
 
[29]
2009 | Conference Paper | LibreCat-ID: 2262
Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.
LibreCat
 
[28]
2009 | Conference Paper | LibreCat-ID: 2352
Beutel, Jan, et al. “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes.” Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, 2009, pp. 265–76.
LibreCat
 
[27]
2009 | Conference Paper | LibreCat-ID: 2238
Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.
LibreCat | DOI
 
[26]
2009 | Conference Paper | LibreCat-ID: 2261
Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44.
LibreCat
 
[25]
2009 | Conference Paper | LibreCat-ID: 2263
Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22.
LibreCat
 
[24]
2008 | Conference Paper | LibreCat-ID: 2370
Woehrle, Matthias, et al. “EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks.” IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, 2008, pp. 201–08, doi:10.1109/SUTC.2008.24.
LibreCat | DOI
 
[23]
2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
LibreCat
 
[22]
2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
LibreCat
 
[21]
2007 | Report | LibreCat-ID: 2394
Beutel, Jan, et al. Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. 2007.
LibreCat
 
[20]
2007 | Conference Paper | LibreCat-ID: 2392
Woehrle, Matthias, et al. “Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework.” Proc. Workshop on Embedded Networked Sensors (EmNets), ACM, 2007, pp. 93–97, doi:10.1145/1278972.1278996.
LibreCat | DOI
 
[19]
2007 | Conference Paper | LibreCat-ID: 2393
Beutel, Jan, et al. “Automated Wireless Sensor Network Testing.” Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2007, pp. 303–303, doi:10.1109/INSS.2007.4297445.
LibreCat | DOI
 
[18]
2006 | Dissertation | LibreCat-ID: 2404
Plessl, Christian. Hardware Virtualization on a Coarse-Grained Reconfigurable Processor. Shaker Verlag, 2006, doi:10.2370/9783832255619.
LibreCat | DOI
 
[17]
2006 | Conference Paper | LibreCat-ID: 2401
Plessl, Christian, et al. “Optimal Temporal Partitioning Based on Slowdown and Retiming.” Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–48, doi:10.1109/FPT.2006.270344.
LibreCat | DOI
 
[16]
2005 | Conference Paper | LibreCat-ID: 2411
Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–18, doi:10.1109/ASAP.2005.69.
LibreCat | DOI
 
[15]
2005 | Journal Article | LibreCat-ID: 2412
Enzler, Rolf, et al. “System-Level Performance Evaluation of Reconfigurable Processors.” Microprocessors and Microsystems, vol. 29, no. 2–3, Elsevier, 2005, pp. 63–73, doi:10.1016/j.micpro.2004.06.004.
LibreCat | DOI
 
[14]
2004 | Conference Paper | LibreCat-ID: 2415
Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
LibreCat
 
[13]
2003 | Conference Paper | LibreCat-ID: 2418
Plessl, Christian, and Marco Platzner. “TKDM – A Reconfigurable Co-Processor in a PC’s Memory Slot.” Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–59, doi:10.1109/FPT.2003.1275755.
LibreCat | DOI
 
[12]
2003 | Journal Article | LibreCat-ID: 2419
Plessl, Christian, et al. “The Case for Reconfigurable Hardware in Wearable Computing.” Personal and Ubiquitous Computing, vol. 7, no. 5, Springer, 2003, pp. 299–308, doi:10.1007/s00779-003-0243-x.
LibreCat | DOI
 
[11]
2003 | Journal Article | LibreCat-ID: 2420
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” Journal of Supercomputing, vol. 26, no. 2, Kluwer Academic Publishers, 2003, pp. 109–29, doi:10.1023/a:1024443416592.
LibreCat | DOI
 
[10]
2003 | Conference Paper | LibreCat-ID: 2421
Enzler, Rolf, et al. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), vol. 2778, Springer, 2003, pp. 151–60, doi:10.1007/b12007.
LibreCat | DOI
 
[9]
2003 | Conference Paper | LibreCat-ID: 2422
Enzler, Rolf, et al. “Co-Simulation of a Hybrid Multi-Context Architecture.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 174–80.
LibreCat
 
[8]
2002 | Conference Paper | LibreCat-ID: 2423
Plessl, Christian, et al. “Reconfigurable Hardware in Wearable Computing Nodes.” Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–22, doi:10.1109/ISWC.2002.1167250.
LibreCat | DOI
 
[7]
2002 | Conference Paper | LibreCat-ID: 2424
Dyer, Matthias, et al. “Partially Reconfigurable Cores for Xilinx Virtex.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), vol. 2438, Springer, 2002, pp. 292–301, doi:10.1007/3-540-46117-5.
LibreCat | DOI
 
[6]
2002 | Conference Paper | LibreCat-ID: 2425
Plessl, Christian, and Marco Platzner. “Custom Computing Machines for the Set Covering Problem.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–72, doi:10.1109/FPGA.2002.1106671.
LibreCat | DOI
 
[5]
2001 | Conference Paper | LibreCat-ID: 2428
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
LibreCat
 
[4]
2001 | Journal Article | LibreCat-ID: 2429
Plessl, Christian, and Erik Wilde. “Server-Side-Techniken Im Web – Ein Überblick.” IX, Heise Verlag, 2001, pp. 88–93.
LibreCat
 
[3]
2001 | Mastersthesis | LibreCat-ID: 2430
Plessl, Christian. Reconfigurable Accelerators for Minimum Covering. Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2001.
LibreCat
 
[2]
2001 | Conference Paper | LibreCat-ID: 2432
Enzler, Rolf, et al. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.” Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, vol. 4525, 2001, pp. 135–46, doi:10.1117/12.434376.
LibreCat | DOI
 
[1]
2000 | Mastersthesis | LibreCat-ID: 2433
Plessl, Christian, and Simon Maurer. Hardware/Software Codesign in Speech Compression Applications. Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2000.
LibreCat
 
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[136]
2025 | Journal Article | LibreCat-ID: 53202 | OA
Schapeler, Timon, et al. “Scalable Quantum Detector Tomography by High-Performance Computing.” Quantum Science and Technology, vol. 10, no. 1, IOP Publishing, 2025, doi:10.1088/2058-9565/ad8511.
LibreCat | DOI | Download (ext.) | arXiv
 
[135]
2024 | Preprint | LibreCat-ID: 53364
Meyer, Marius, et al. “Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL.” ArXiv:2403.18374, 2024.
LibreCat | arXiv
 
[134]
2024 | Journal Article | LibreCat-ID: 53474
Lass, Michael, et al. “Characterizing Microheterogeneity in Liquid Mixtures via Local Density Fluctuations.” Entropy, vol. 26, no. 4, 322, MDPI AG, 2024, doi:10.3390/e26040322.
LibreCat | DOI
 
[133]
2024 | Journal Article | LibreCat-ID: 53663 | OA
Bauer, Carsten, et al. “Noctua 2 Supercomputer.” Journal of Large-Scale Research Facilities, vol. 9, 2024, doi:10.17815/jlsrf-8-187 .
LibreCat | Files available | DOI
 
[132]
2024 | Conference Paper | LibreCat-ID: 56605
Opdenhövel, Jan-Oliver, et al. “StencilStream: A SYCL-Based Stencil Simulation Framework Targeting FPGAs.” 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2024, doi:10.1109/fpl64840.2024.00023.
LibreCat | DOI
 
[131]
2024 | Conference Paper | LibreCat-ID: 56607
Tareen, Abdul Rehman, et al. “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory.” 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), vol. 35, IEEE, 2024, doi:10.1109/fccm60383.2024.00014.
LibreCat | DOI
 
[130]
2024 | Conference Paper | LibreCat-ID: 56609
Stachura, Philip, et al. “SERI: High-Throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry Using HBM-Based FPGAs.” 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2024, pp. 60–68, doi:10.1109/fpl64840.2024.00018.
LibreCat | DOI | Download (ext.)
 
[129]
2024 | Conference Paper | LibreCat-ID: 54312
Büttner, Markus, et al. “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL.” Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), 11, ACM, 2024, doi:10.1145/3659914.3659925.
LibreCat | DOI
 
[128]
2024 | Preprint | LibreCat-ID: 57489
Wingenbach, Jan, et al. “PHOENIX -- Paderborn Highly Optimized and Energy Efficient Solver for  Two-Dimensional Nonlinear Schrödinger Equations with Integrated Extensions.” ArXiv:2411.18341, 2024.
LibreCat | arXiv
 
[127]
2024 | Journal Article | LibreCat-ID: 56604 | OA
Van Hirtum, Lennart, et al. “A Computation of the Ninth Dedekind Number Using FPGA Supercomputing.” ACM Transactions on Reconfigurable Technology and Systems, vol. 17, no. 3, Association for Computing Machinery (ACM), 2024, pp. 1–28, doi:10.1145/3674147.
LibreCat | DOI | Download (ext.)
 
[126]
2023 | Book Chapter | LibreCat-ID: 46191
Alt, Christoph, et al. “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline.” Lecture Notes in Computer Science, Springer Nature Switzerland, 2023, doi:10.1007/978-3-031-32041-5_5.
LibreCat | DOI
 
[125]
2023 | Preprint | LibreCat-ID: 43439
Van Hirtum, Lennart, et al. “A Computation of D(9) Using FPGA Supercomputing.” ArXiv:2304.03039, 2023.
LibreCat | arXiv
 
[124]
2023 | Conference Paper | LibreCat-ID: 46188
Faj, Jennifer, et al. “Scalable Multi-FPGA Design of a Discontinuous Galerkin Shallow-Water Model on Unstructured Meshes.” Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), ACM, 2023, doi:10.1145/3592979.3593407.
LibreCat | Files available | DOI | Download (ext.)
 
[123]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
Hansmeier, Tim, et al. “Compute Centers I: Heterogeneous Execution Environments.” On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, edited by Claus-Jochen Haake et al., vol. 412, Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–82, doi:10.5281/zenodo.8068642.
LibreCat | Files available | DOI
 
[122]
2023 | Conference Paper | LibreCat-ID: 46190 | OA
Opdenhövel, Jan-Oliver, et al. “Mutation Tree Reconstruction of Tumor Cells on FPGAs Using a Bit-Level Matrix Representation.” Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), ACM, 2023, doi:10.1145/3597031.3597050.
LibreCat | DOI | Download (ext.)
 
[121]
2023 | Journal Article | LibreCat-ID: 38041 | OA
Meyer, Marius, et al. “Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks.” ACM Transactions on Reconfigurable Technology and Systems, Association for Computing Machinery (ACM), 2023, doi:10.1145/3576200.
LibreCat | DOI | Download (ext.)
 
[120]
2023 | Conference Paper | LibreCat-ID: 43228
Wu, Xin, et al. “Computing and Compressing Electron Repulsion Integrals on FPGAs.” 2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023, pp. 162–73, doi:10.1109/FCCM57271.2023.00026.
LibreCat | DOI | Download (ext.) | arXiv
 
[119]
2023 | Journal Article | LibreCat-ID: 45361 | OA
Schade, Robert, et al. “Breaking the Exascale Barrier for the Electronic Structure Problem in Ab-Initio Molecular Dynamics.” The International Journal of High Performance Computing Applications, 109434202311776, SAGE Publications, 2023, doi:10.1177/10943420231177631.
LibreCat | DOI | Download (ext.)
 
[118]
2022 | Preprint | LibreCat-ID: 33493
Gavini, Vikram, et al. “Roadmap on Electronic Structure Codes in the Exascale Era.” ArXiv:2209.12747, 2022.
LibreCat | arXiv
 
[117]
2022 | Conference Paper | LibreCat-ID: 46193 | OA
Karp, Martin, et al. “A High-Fidelity Flow Solver for Unstructured Meshes on Field-Programmable Gate Arrays: Design, Evaluation, and Future Challenges.” International Conference on High Performance Computing in Asia-Pacific Region, ACM, 2022, doi:10.1145/3492805.3492808.
LibreCat | DOI | Download (ext.)
 
[116]
2022 | Preprint | LibreCat-ID: 32404
Kühne, Thomas, et al. “CP2K on the Road to Exascale.” ArXiv:2205.14741, 2022.
LibreCat | Download (ext.) | arXiv
 
[115]
2022 | Journal Article | LibreCat-ID: 33226 | OA
Schade, Robert, et al. “Parallel Quantum Chemistry on Noisy Intermediate-Scale Quantum Computers.” Phys. Rev. Research, vol. 4, American Physical Society, 2022, p. 033160, doi:10.1103/PhysRevResearch.4.033160.
LibreCat | DOI | Download (ext.)
 
[114]
2022 | Preprint | LibreCat-ID: 46275
Gavini, Vikram, et al. “Roadmap on Electronic Structure Codes in the Exascale Era.” ArXiv:2209.12747, 2022.
LibreCat | arXiv
 
[113]
2022 | Journal Article | LibreCat-ID: 33684 | OA
Schade, Robert, et al. “Towards Electronic Structure-Based Ab-Initio Molecular Dynamics Simulations with Hundreds of Millions of Atoms.” Parallel Computing, vol. 111, 102920, Elsevier BV, 2022, doi:10.1016/j.parco.2022.102920.
LibreCat | DOI | Download (ext.)
 
[112]
2022 | Journal Article | LibreCat-ID: 27364
Meyer, Marius, et al. “In-Depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs Using OpenCL.” Journal of Parallel and Distributed Computing, 2022, doi:10.1016/j.jpdc.2021.10.007.
LibreCat | DOI
 
[111]
2021 | Journal Article | LibreCat-ID: 28099 | OA
Menzel, Johannes, et al. “The Strong Scaling Advantage of FPGAs in HPC for N-Body Simulations.” ACM Transactions on Reconfigurable Technology and Systems, vol. 15, no. 1, 2021, pp. 1–30, doi:10.1145/3491235.
LibreCat | DOI | Download (ext.)
 
[110]
2021 | Conference Paper | LibreCat-ID: 29937
Karp, Martin, et al. “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.” 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021, doi:10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[109]
2021 | Conference Paper | LibreCat-ID: 46195
Karp, Martin, et al. “High-Performance Spectral Element Methods on Field-Programmable Gate Arrays : Implementation, Evaluation, and Future Projection.” 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS), IEEE, 2021, doi:10.1109/ipdps49936.2021.00116.
LibreCat | DOI
 
[108]
2021 | Book Chapter | LibreCat-ID: 21587
Alhaddad, Samer, et al. “HighPerMeshes – A Domain-Specific Language for Numerical Algorithms on Unstructured Grids.” Euro-Par 2020: Parallel Processing Workshops, 2021, doi:10.1007/978-3-030-71593-9_15.
LibreCat | Files available | DOI
 
[107]
2021 | Book Chapter | LibreCat-ID: 29936
Ramaswami, Arjun, et al. “Evaluating the Design Space for Offloading 3D FFT Calculations to an FPGA for High-Performance Computing.” Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2021, doi:10.1007/978-3-030-79025-7_21.
LibreCat | DOI
 
[106]
2021 | Journal Article | LibreCat-ID: 24788 | OA
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Kühne, Thomas, et al. “CP2K: An Electronic Structure and Molecular Dynamics Software Package - Quickstep: Efficient and Accurate Electronic Structure Calculations.” The Journal of Chemical Physics, vol. 152, no. 19, 194103, 2020, doi:10.1063/5.0007045.
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Lass, Michael, et al. “A Submatrix-Based Method for Approximate Matrix Function Evaluation in the Quantum Chemistry Code CP2K.” Proc. International Conference for High Performance Computing, Networking, Storage and Analysis (SC), IEEE Computer Society, 2020, pp. 1127–40, doi:10.1109/SC41405.2020.00084.
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Rengaraj, Varadarajan, et al. “Accurate Sampling with Noisy Forces from Approximate Computing.” Computation, vol. 8, no. 2, 39, MDPI, 2020, doi:10.3390/computation8020039.
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Riebler, Heinrich, et al. “Transparent Acceleration for Heterogeneous Platforms with Compilation to OpenCL.” ACM Trans. Archit. Code Optim. (TACO), vol. 16, no. 2, ACM, 2019, pp. 14:1–14:26, doi:10.1145/3319423.
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Gorlani, Paolo, et al. “OpenCL Implementation of Cannon’s Matrix Multiplication Algorithm on Intel Stratix 10 FPGAs.” Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2019, doi:10.1109/ICFPT47387.2019.00020.
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Richters, Dorothee, et al. “A General Algorithm to Calculate the Inverse Principal P-Th Root of Symmetric Positive Definite Matrices.” Communications in Computational Physics, vol. 25, no. 2, Global Science Press, 2019, pp. 564–85, doi:10.4208/cicp.OA-2018-0053.
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Platzner, Marco, and Christian Plessl. “FPGAs im Rechenzentrum.” Informatik Spektrum, 2019, doi:10.1007/s00287-019-01187-w.
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Lass, Michael, et al. “Using Approximate Computing for the Calculation of Inverse Matrix P-Th Roots.” Embedded Systems Letters, vol. 10, no. 2, IEEE, 2018, pp. 33–36, doi:10.1109/LES.2017.2760923.
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Mertens, Jan Cedric, et al. “Sprint Diagnostic with GPS and Inertial Sensor Fusion.” Sports Engineering, vol. 21, no. 4, Springer Nature, 2018, pp. 441–51, doi:10.1007/s12283-018-0291-0.
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Kenter, Tobias, et al. “OpenCL-Based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2018, doi:10.1109/FCCM.2018.00037.
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Lass, Michael, et al. “A Massively Parallel Algorithm for the Approximate Calculation of Inverse P-Th Roots of Large Sparse Matrices.” Proc. Platform for Advanced Scientific Computing (PASC) Conference, ACM, 2018, doi:10.1145/3218176.3218231.
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Riebler, Heinrich, et al. “Automated Code Acceleration Targeting Heterogeneous OpenCL Devices.” Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018, doi:10.1145/3178487.3178534.
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Riebler, Heinrich, et al. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 10, no. 3, Association for Computing Machinery (ACM), 2017, p. 24:1-24:23, doi:10.1145/3053687.
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Kenter, Tobias, et al. “Flexible FPGA Design for FDTD Using OpenCL.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017, doi:10.23919/FPL.2017.8056844.
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Schumacher, Jörn, et al. “High-Throughput and Low-Latency Network Communication with NetIO.” Journal of Physics: Conference Series, vol. 898, 082003, IOP Publishing, 2017, doi:10.1088/1742-6596/898/8/082003.
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Agne, Andreas, et al. “ReconOS.” FPGAs for Software Programmers, edited by Dirk Koch et al., Springer International Publishing, 2016, pp. 227–44, doi:10.1007/978-3-319-26408-0_13.
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Riebler, Heinrich, et al. “Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems.” Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
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Kenter, Tobias, and Christian Plessl. “Microdisk Cavity FDTD Simulation on FPGA Using OpenCL.” Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC), 2016.
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Lass, Michael, et al. “Using Approximate Computing in Scientific Codes.” Workshop on Approximate Computing (AC), 2016.
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2016 | Book Chapter | LibreCat-ID: 156
Agne, Andreas, et al. “Self-Aware Compute Nodes.” Self-Aware Computing Systems, Springer International Publishing, 2016, pp. 145–65, doi:10.1007/978-3-319-39675-0_8.
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Vaz, Gavin Francis, et al. “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code.” Computers and Electrical Engineering, vol. 55, Elsevier, 2016, pp. 91–111, doi:10.1016/j.compeleceng.2016.04.021.
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2016 | Conference Paper | LibreCat-ID: 168
Lösch, Achim, et al. “Performance-Centric Scheduling with Task Migration for a Heterogeneous Compute Node in the Data Center.” Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–17.
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Kenter, Tobias, et al. “Opportunities for Deferring Application Partitioning and Accelerator Synthesis to Runtime (Extended Abstract).” Workshop on Reconfigurable Computing (WRC), 2016.
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Torresen, Jim, et al. “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction.” IEEE Computer, vol. 48, no. 7, IEEE Computer Society, 2015, pp. 18–20, doi:10.1109/MC.2015.205.
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Kenter, Tobias, et al. “Exploring Tradeoffs between Specialized Kernels and a Reusable Overlay in a Stereo-Matching Case Study.” International Journal of Reconfigurable Computing (IJRC), vol. 2015, 859425, Hindawi, 2015, doi:10.1155/2015/859425.
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Damschen, Marvin, and Christian Plessl. “Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores.” Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
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Schumacher, Jörn, et al. “Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm.” Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015, doi:10.1145/2675743.2771824.
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Plessl, Christian, et al. “Aktuelles Schlagwort: Approximate Computing.” Informatik Spektrum, no. 5, Springer, 2015, pp. 396–99, doi:10.1007/s00287-015-0911-z.
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Damschen, Marvin, et al. “Transparent Offloading of Computational Hotspots from Binary Code to Xeon Phi.” Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–83, doi:10.7873/DATE.2015.1124.
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Anderson, J., et al. “FELIX: A High-Throughput Network Approach for Interfacing to Front End Electronics for ATLAS Upgrades.” Journal of Physics: Conference Series, vol. 664, 082050, IOP Publishing, 2015, doi:10.1088/1742-6596/664/8/082050.
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Platzner, Marco, and Christian Plessl. “Verschiebungen an der Grenze zwischen Hardware und Software.” Logiken strukturbildender Prozesse: Automatismen, edited by Jörn Künsemöller et al., Wilhelm Fink, 2014, pp. 123–44.
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Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:10.1007/978-3-319-05960-0_13.
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Agne, Andreas, et al. “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators.” Microprocessors and Microsystems, vol. 38, no. 8, Part B, Elsevier, 2014, pp. 911–19, doi:10.1016/j.micpro.2013.12.001.
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Riebler, Heinrich, et al. “Reconstructing AES Key Schedules from Decayed Memory with FPGAs.” Proceedings of Field-Programmable Custom Computing Machines (FCCM), IEEE, 2014, pp. 222–29, doi:10.1109/FCCM.2014.67.
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Agne, Andreas, et al. “Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores.” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, 13, ACM, 2014, doi:10.1145/2617596.
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Agne, Andreas, et al. “ReconOS - An Operating System Approach for Reconfigurable Computing.” IEEE Micro, vol. 34, no. 1, IEEE, 2014, pp. 60–71, doi:10.1109/MM.2013.110.
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C. Durelli, Gianluca, et al. “Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach.” Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA), IEEE, 2014, pp. 142–49, doi:10.1109/ISPA.2014.27.
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Vaz, Gavin Francis, et al. “Deferring Accelerator Offloading Decisions to Application Runtime.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032509.
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2014 | Conference Paper | LibreCat-ID: 406
Kenter, Tobias, et al. “Kernel-Centric Acceleration of High Accuracy Stereo-Matching.” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8, doi:10.1109/ReConFig.2014.7032535.
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C. Durelli, Gianluca, et al. “SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures.” Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC), Springer, 2014, doi:10.1007/978-3-319-05960-0_38.
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Giefers, Heiner, et al. “Accelerating Finite Difference Time Domain Simulations with Reconfigurable Dataflow Computers.” ACM SIGARCH Computer Architecture News, vol. 41, no. 5, ACM, 2014, pp. 65–70, doi:10.1145/2641361.2641372.
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Riebler, Heinrich, et al. “FPGA-Accelerated Key Search for Cold-Boot Attacks against AES.” Proceedings of the International Conference on Field-Programmable Technology (FPT), IEEE, 2013, pp. 386–89, doi:10.1109/FPT.2013.6718394.
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Happe, Markus, et al. “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services.” Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS), IEEE, 2013, doi:10.1109/ISORC.2013.6913232.
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Suess, Tim, et al. “Parallel Macro Pipelining on the Intel SCC Many-Core Computer.” Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW), IEEE Computer Society, 2013, pp. 64–73, doi:10.1109/IPDPSW.2013.136.
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Plessl, Christian, et al. Programming Models for Reconfigurable Heterogeneous Multi-Cores. Awareness Magazine, 2012.
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Meyer, Björn, et al. “Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort?” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 189–96, doi:10.1109/FPL.2012.6339370.
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Schumacher, Tobias, et al. “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators.” Microprocessors and Microsystems, vol. 36, no. 2, 2012, pp. 110–26, doi:10.1016/j.micpro.2011.04.002.
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Happe, Markus, et al. “Eight Ways to Put Your FPGA on Fire – A Systematic Study of Heat Generators.” Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416745.
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Kenter, Tobias, et al. “Pragma Based Parallelization - Trading Hardware Efficiency for Ease of Use?” Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2012, pp. 1–8, doi:10.1109/ReConFig.2012.6416773.
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Happe, Markus, et al. “Hardware/Software Platform for Self-Aware Compute Nodes.” Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
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Barrio, Pablo, et al. “Turning Control Flow Graphs into Function Calls: Code Generation for Heterogeneous Architectures.” Proceedings of the International Conference on High Performance Computing and Simulation (HPCS), IEEE, 2012, pp. 559–65, doi:10.1109/HPCSim.2012.6266973.
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2012 | Conference Paper | LibreCat-ID: 612
Rüthing, Christoph, et al. “Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs.” Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), IEEE, 2012, pp. 559–62, doi:10.1109/FPL.2012.6339370.
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2012 | Conference Paper | LibreCat-ID: 2180
Beisel, Tobias, et al. “Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux.” Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS), 2012.
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Grad, Mariusz, and Christian Plessl. “On the Feasibility and Limitations of Just-In-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors.” Int. Journal of Reconfigurable Computing (IJRC), Hindawi Publishing Corp., 2012, doi:10.1155/2012/418315.
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Kenter, Tobias, et al. “Estimation and Partitioning for CPU-Accelerator Architectures.” Intel European Research and Innovation Conference, 2011.
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Plessl, Christian, and Marco Platzner. “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors.” Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, edited by Mohamed Khalgui and Hans-Michael Hanisch, IGI Global, 2011, doi:10.4018/978-1-60960-086-0.
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Sekanina, Lukas, et al. “Evolution of Electronic Circuits.” Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–79.
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Meyer, Björn, et al. “Transformation of Scientific Algorithms to Parallel Computing Code: Subdomain Support in a MPI-Multi-GPU Backend.” Symp. on Application Accelerators in High Performance Computing (SAAHPC), IEEE Computer Society, 2011, pp. 60–63, doi:10.1109/SAAHPC.2011.12.
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Beisel, Tobias, et al. “Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2011, pp. 223–26, doi:10.1109/ASAP.2011.6043273.
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Happe, Markus, et al. “Measuring and Predicting Temperature Distributions on FPGAs at Run-Time.” Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, 2011, pp. 55–60, doi:10.1109/ReConFig.2011.59.
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Kenter, Tobias, et al. “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures.” Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), ACM, 2011, pp. 177–80, doi:10.1145/1950413.1950448.
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Schumacher, Tobias, et al. “FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study.” Int. Journal of Recon- Figurable Computing (IJRC), Hindawi Publishing Corp., 2011, doi:10.1155/2011/760954.
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Grad, Mariusz, and Christian Plessl. “Just-in-Time Instruction Set Extension – Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.” Proc. Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, 2011, pp. 278–85, doi:10.1109/IPDPS.2011.153.
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Lübbers, Enno, et al. “Towards Adaptive Networking for Embedded Devices Based on Reconfigurable Hardware.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 225–31.
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Grad, Mariusz, and Christian Plessl. “Pruning the Design Space for Just-In-Time Processor Customization.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2010, pp. 67–72, doi:10.1109/ReConFig.2010.19.
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Grad, Mariusz, and Christian Plessl. “An Open Source Circuit Library with Benchmarking Facilities.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, pp. 144–50.
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Andrews, David, and Christian Plessl. “Configurable Processor Architectures: History and Trends.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2010, p. 165.
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Plaks, Toomas P., et al., editors. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press, 2010.
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Beisel, Tobias, et al. “Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2010, pp. 65–72, doi:10.1109/ASAP.2010.5540798.
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Keller, Ariane, et al. “Reconfigurable Nodes for Future Networks.” Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), IEEE, 2010, pp. 372–76, doi:10.1109/GLOCOMW.2010.5700341.
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Woehrle, Matthias, et al. “Rupeas: Ruby Powered Event Analysis DSL.” Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2010, pp. 245–48, doi:10.1109/INSS.2010.5572211.
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Kenter, Tobias, et al. “Performance Estimation for the Exploration of CPU-Accelerator Architectures.” Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), edited by Omar Hammami and Sandra Larrabee, 2010.
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Schumacher, Tobias, et al. “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2009, pp. 275–78, doi:10.1109/FCCM.2009.25.
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Kaufmann, Paul, et al. “EvoCaches: Application-Specific Adaptation of Cache Mapping.” Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), IEEE Computer Society, 2009, pp. 11–18.
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Beutel, Jan, et al. “PermaDAQ: A Scientific Instrument for Precision Sensing and Data Recovery in Environmental Extremes.” Proc. Int. Conf. on Information Processing in Sensor Networks (IPSN), IEEE Computer Society, 2009, pp. 265–76.
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Schumacher, Tobias, et al. “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000.” Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), IEEE Computer Society, 2009, pp. 119–24, doi:10.1109/ReConFig.2009.32.
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2009 | Conference Paper | LibreCat-ID: 2261
Schumacher, Tobias, et al. “An Accelerator for K-Th Nearest Neighbor Thinning Based on the IMORC Infrastructure.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2009, pp. 338–44.
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2009 | Conference Paper | LibreCat-ID: 2263
Grad, Mariusz, and Christian Plessl. “Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2009, pp. 319–22.
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2008 | Conference Paper | LibreCat-ID: 2370
Woehrle, Matthias, et al. “EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks.” IEEE Int. Conf. on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), IEEE Computer Society, 2008, pp. 201–08, doi:10.1109/SUTC.2008.24.
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2008 | Conference Paper | LibreCat-ID: 2364
Schumacher, Tobias, et al. “A Hardware Accelerator for K-Th Nearest Neighbor Thinning.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2008, pp. 245–51.
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2008 | Conference Paper | LibreCat-ID: 2372
Schumacher, Tobias, et al. “IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers.” Many-Core and Reconfigurable Supercomputing Conference (MRSC), 2008.
LibreCat
 
[21]
2007 | Report | LibreCat-ID: 2394
Beutel, Jan, et al. Increasing the Reliability of Wireless Sensor Networks with a Unit Testing Framework. 2007.
LibreCat
 
[20]
2007 | Conference Paper | LibreCat-ID: 2392
Woehrle, Matthias, et al. “Increasing the Reliability of Wireless Sensor Networks with a Distributed Testing Framework.” Proc. Workshop on Embedded Networked Sensors (EmNets), ACM, 2007, pp. 93–97, doi:10.1145/1278972.1278996.
LibreCat | DOI
 
[19]
2007 | Conference Paper | LibreCat-ID: 2393
Beutel, Jan, et al. “Automated Wireless Sensor Network Testing.” Proc. Int. Conf. Networked Sensing Systems (INSS), IEEE, 2007, pp. 303–303, doi:10.1109/INSS.2007.4297445.
LibreCat | DOI
 
[18]
2006 | Dissertation | LibreCat-ID: 2404
Plessl, Christian. Hardware Virtualization on a Coarse-Grained Reconfigurable Processor. Shaker Verlag, 2006, doi:10.2370/9783832255619.
LibreCat | DOI
 
[17]
2006 | Conference Paper | LibreCat-ID: 2401
Plessl, Christian, et al. “Optimal Temporal Partitioning Based on Slowdown and Retiming.” Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2006, pp. 345–48, doi:10.1109/FPT.2006.270344.
LibreCat | DOI
 
[16]
2005 | Conference Paper | LibreCat-ID: 2411
Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.” Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–18, doi:10.1109/ASAP.2005.69.
LibreCat | DOI
 
[15]
2005 | Journal Article | LibreCat-ID: 2412
Enzler, Rolf, et al. “System-Level Performance Evaluation of Reconfigurable Processors.” Microprocessors and Microsystems, vol. 29, no. 2–3, Elsevier, 2005, pp. 63–73, doi:10.1016/j.micpro.2004.06.004.
LibreCat | DOI
 
[14]
2004 | Conference Paper | LibreCat-ID: 2415
Plessl, Christian, and Marco Platzner. “Virtualization of Hardware – Introduction and Survey.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2004, pp. 63–69.
LibreCat
 
[13]
2003 | Conference Paper | LibreCat-ID: 2418
Plessl, Christian, and Marco Platzner. “TKDM – A Reconfigurable Co-Processor in a PC’s Memory Slot.” Proc. Int. Conf. on Field Programmable Technology (ICFPT), IEEE Computer Society, 2003, pp. 252–59, doi:10.1109/FPT.2003.1275755.
LibreCat | DOI
 
[12]
2003 | Journal Article | LibreCat-ID: 2419
Plessl, Christian, et al. “The Case for Reconfigurable Hardware in Wearable Computing.” Personal and Ubiquitous Computing, vol. 7, no. 5, Springer, 2003, pp. 299–308, doi:10.1007/s00779-003-0243-x.
LibreCat | DOI
 
[11]
2003 | Journal Article | LibreCat-ID: 2420
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” Journal of Supercomputing, vol. 26, no. 2, Kluwer Academic Publishers, 2003, pp. 109–29, doi:10.1023/a:1024443416592.
LibreCat | DOI
 
[10]
2003 | Conference Paper | LibreCat-ID: 2421
Enzler, Rolf, et al. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), vol. 2778, Springer, 2003, pp. 151–60, doi:10.1007/b12007.
LibreCat | DOI
 
[9]
2003 | Conference Paper | LibreCat-ID: 2422
Enzler, Rolf, et al. “Co-Simulation of a Hybrid Multi-Context Architecture.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2003, pp. 174–80.
LibreCat
 
[8]
2002 | Conference Paper | LibreCat-ID: 2423
Plessl, Christian, et al. “Reconfigurable Hardware in Wearable Computing Nodes.” Proc. Int. Symp. on Wearable Computers (ISWC), IEEE Computer Society, 2002, pp. 215–22, doi:10.1109/ISWC.2002.1167250.
LibreCat | DOI
 
[7]
2002 | Conference Paper | LibreCat-ID: 2424
Dyer, Matthias, et al. “Partially Reconfigurable Cores for Xilinx Virtex.” Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), vol. 2438, Springer, 2002, pp. 292–301, doi:10.1007/3-540-46117-5.
LibreCat | DOI
 
[6]
2002 | Conference Paper | LibreCat-ID: 2425
Plessl, Christian, and Marco Platzner. “Custom Computing Machines for the Set Covering Problem.” Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE Computer Society, 2002, pp. 163–72, doi:10.1109/FPGA.2002.1106671.
LibreCat | DOI
 
[5]
2001 | Conference Paper | LibreCat-ID: 2428
Plessl, Christian, and Marco Platzner. “Instance-Specific Accelerators for Minimum Covering.” Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), CSREA Press, 2001, pp. 85–91.
LibreCat
 
[4]
2001 | Journal Article | LibreCat-ID: 2429
Plessl, Christian, and Erik Wilde. “Server-Side-Techniken Im Web – Ein Überblick.” IX, Heise Verlag, 2001, pp. 88–93.
LibreCat
 
[3]
2001 | Mastersthesis | LibreCat-ID: 2430
Plessl, Christian. Reconfigurable Accelerators for Minimum Covering. Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2001.
LibreCat
 
[2]
2001 | Conference Paper | LibreCat-ID: 2432
Enzler, Rolf, et al. “Reconfigurable Processors for Handhelds and Wearables: Application Analysis.” Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, vol. 4525, 2001, pp. 135–46, doi:10.1117/12.434376.
LibreCat | DOI
 
[1]
2000 | Mastersthesis | LibreCat-ID: 2433
Plessl, Christian, and Simon Maurer. Hardware/Software Codesign in Speech Compression Applications. Computer Engineering and Networks Lab, ETH Zurich, Switzerland, 2000.
LibreCat
 
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