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165 Publications
2001 | Journal Article | LibreCat-ID: 13068
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” Journal of Electronic Testing - Theory and Applications (JETTA) 17, no. 3/4 (2001): 341–49.
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2000 | Misc | LibreCat-ID: 13094
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Hardwarepraktikum Im Diplomstudiengang Informatik. Handbuch Lehre, Berlin, Raabe Verlag, 2000.
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2000 | Misc | LibreCat-ID: 13095
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. IEEE European Test Workshop, Cascais, Portugal, 2000.
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2000 | Conference Paper | LibreCat-ID: 13005
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” In IEEE International Test Conference (ITC’00), 778–84. Atlantic City, NJ, USA: IEEE, 2000. https://doi.org/10.1109/test.2000.894274.
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1999 | Book | LibreCat-ID: 13065
Hellebrand, Sybille. Selbsttestbare Steuerwerke - Strukturen Und Syntheseverfahren. 10. Verlag Dr. Kovac, Hamburg: Verlag Dr. Kovac, Hamburg, 1999.
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1999 | Misc | LibreCat-ID: 13093
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. Exploiting Symmetries to Speed Up Transparent BIST. 11th GI/ITG/GMM/IEEE Workshop, 1999.
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1999 | Conference Paper | LibreCat-ID: 13006
Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Error Detecting Refreshment for Embedded DRAMs.” In 17th IEEE VLSI Test Symposium (VTS’99), 384–90. Dana Point, CA, USA: IEEE, 1999. https://doi.org/10.1109/vtest.1999.766693.
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1999 | Conference Paper | LibreCat-ID: 13066
N. Yarmolik, Vyacheslav, Iuri V. Bykov, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.” In Third European Dependable Computing Conference (EDCC-3). Prague, Czech Republic, 1999.
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1999 | Conference Paper | LibreCat-ID: 13067
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Symmetric Transparent BIST for RAMs.” In Design Automation and Test in Europe (DATE’99), 702–7. Munich, Germany, 1999.
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1998 | Report | LibreCat-ID: 13029
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Test Und Synthese Schneller Eingebetteter Systeme. Universität Stuttgart, 1998.
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1998 | Misc | LibreCat-ID: 13091
N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich. Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.
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1998 | Misc | LibreCat-ID: 13092
N. Yarmolik, Vyacheslav, Sybille Hellebrand, and Hans-Joachim Wunderlich. Efficient Consistency Checking for Embedded Memories. 10th GI/ITG/GMM/IEEE Workshop, 1998.
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1998 | Book Chapter | LibreCat-ID: 13060
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In Mixed-Mode BIST Using Embedded Processors. 5. In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998: Kluwer Academic Publishers, 1998.
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1998 | Journal Article | LibreCat-ID: 13061
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” Journal of Electronic Testing Theory and Applications - JETTA 12, no. 1/2 (1998): 127–38.
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1998 | Journal Article | LibreCat-ID: 13064
Hellebrand, Sybille, Andre Hertwig, and Hans-Joachim Wunderlich. “Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications.” IEEE Design and Test 15, no. 4 (1998): 36–41.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Fast Self-Recovering Controllers.” In 16th IEEE VLSI Test Symposium (VTS’98), 296–302. Monterey, CA, USA: IEEE, 1998. https://doi.org/10.1109/vtest.1998.670883.
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1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.” In Design Automation and Test in Europe (DATE’98), 173–79. Paris, France, 1998. https://doi.org/10.1109/date.1998.655853.
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1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik, Vyacheslav, Yuri V. Klimets, Sybille Hellebrand, and Hans-Joachim Wunderlich. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” In Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 27–33. Szczyrk, Poland, 1998.
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1997 | Misc | LibreCat-ID: 13089
Tsai, Kun-Han, Sybille Hellebrand, Janusz Rajski, and Malgorzata Marek-Sadowska. STARBIST: Scan Autocorrelated Random Pattern Generation. 4th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1997.
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1997 | Misc | LibreCat-ID: 13090
Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. Synthesis of Fast On-Line Testable Controllers for Data-Dominated Applications. 3rd IEEE International On-Line Testing Workshop, Crete, Greece, 1997.
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1997 | Conference Paper | LibreCat-ID: 13009
Tsai, Kun-Han, Sybille Hellebrand, Malgorzata Marek-Sadowska, and Janusz Rajski. “STARBIST: Scan Autocorrelated Random Pattern Generation.” In 34th ACM/IEEE Design Automation Conference (DAC’97). Anaheim, CA, USA: IEEE, 1997. https://doi.org/10.1109/dac.1997.597194.
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1996 | Misc | LibreCat-ID: 13087
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Using Embedded Processors for BIST. 3rd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1996.
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1996 | Misc | LibreCat-ID: 13088
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. Mixed-Mode BIST Using Embedded Processors. 2nd IEEE International On-Line Testing Workshop. Biarritz, France, 1996.
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1996 | Conference Paper | LibreCat-ID: 13010
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996. https://doi.org/10.1109/test.1996.556962.
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1995 | Report | LibreCat-ID: 13026
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis Procedures for Self-Testable Controllers. University of Siegen, Germany, 1995.
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1995 | Report | LibreCat-ID: 13027
Hellebrand, Sybille, Hans-Joachim Wunderlich, F. Goncalves, and Joao Paulo Teixeira. Evaluation of Self-Testable Controller Architectures Based on Realistic Fault Analysis. University Siegen, Germany, 1995.
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1995 | Report | LibreCat-ID: 13028
Hellebrand, Sybille, Maik Herzog, and Hans-Joachim Wunderlich. Partitioning of CMOS-Circuits for On-Chip IDDQ-Testing. University of Siegen, Germany, 1995.
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1995 | Misc | LibreCat-ID: 13086
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. Pattern Generation for a Deterministic BIST Scheme. 2nd IEEE International Test Synthesis Workshop, Santa Barbara, CA, 1995.
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1995 | Journal Article | LibreCat-ID: 13011
Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” IEEE Transactions on Computers 44, no. 2 (1995): 223–33. https://doi.org/10.1109/12.364534.
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1995 | Conference Paper | LibreCat-ID: 13012
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. “Pattern Generation for a Deterministic BIST Scheme.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), 88–94. San Jose, CA, USA: IEEE, 1995. https://doi.org/10.1109/iccad.1995.479997.
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1994 | Report | LibreCat-ID: 13024
Hellebrand, Sybille, Arne Juergensen, and Hans-Joachim Wunderlich. Synthesis for Off-Line Testability. University of Siegen, Germany, 1994.
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1994 | Report | LibreCat-ID: 13025
Hellebrand, Sybille, Arne Juergensen, Albrecht Stroele, and Hans-Joachim Wunderlich. Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time. University of Siegen, Germany, 1994.
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1994 | Misc | LibreCat-ID: 13083
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. Effiziente Testsatzkodierung Für Prüfpfad-Basierte Selbsttestarchitekturen. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
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1994 | Misc | LibreCat-ID: 13084
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Ein Verfahren Zur Testfreundlichen Steuerwerkssynthese. 6th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Vaals, The Netherlands, 1994.
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1994 | Misc | LibreCat-ID: 13085
Hellebrand, Sybille, Joao Paulo Teixeira, and Hans-Joachim Wunderlich. Synthesis for Testability - the ARCHIMEDES Approach. 1st IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1994.
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1994 | Conference Paper | LibreCat-ID: 13014
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures.” In ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 110–16. San Jose, CA, USA: IEEE, 1994. https://doi.org/10.1109/iccad.1994.629752.
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1994 | Conference Paper | LibreCat-ID: 13059
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthese Schneller Selbsttestbarer Steuerwerke.” In Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, 3–11. Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994.
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1994 | Conference Paper | LibreCat-ID: 13013
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthesis of Self-Testable Controllers.” In European Design and Test Conference (EDAC/ETC/EUROASIC), 580–85. Paris, France, 1994. https://doi.org/10.1109/edtc.1994.326815.
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1993 | Misc | LibreCat-ID: 13081
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Effiziente Erzeugung Deterministischer Muster Im Selbsttest. 5th ITG/GI/GME Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Holzhau, Germany, 1993.
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1993 | Misc | LibreCat-ID: 13082
Hellebrand, Sybille, and Hans-Joachim Wunderlich. Synthesis of Self-Testable Controllers. ARCHIMEDES Open Workshop on “Synthesis - Architectural Testability Support”, Montpellier, France, 1993.
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1993 | Conference Paper | LibreCat-ID: 13015
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. “An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’93). IEEE, 1993. https://doi.org/10.1109/iccad.1993.580117.
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1992 | Report | LibreCat-ID: 13023
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. Institut National Polytechnique de Grenoble, Grenoble, France, 1992.
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1992 | Misc | LibreCat-ID: 13076
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. IEEE Design for Testability Workshop, Vail, CO, USA, 1992.
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1992 | Misc | LibreCat-ID: 13080
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. Generation of Vector Patterns through Reseeding of Multiple-Polynomial LFSRs. Workshop on New Directions for Testing, Montreal, Canada, 1992.
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1992 | Journal Article | LibreCat-ID: 13017
Wunderlich, Hans-Joachim, and Sybille Hellebrand. “The Pseudoexhaustive Test of Sequential Circuits.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 11, no. 1 (1992): 26–33. https://doi.org/10.1109/43.108616.
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1992 | Conference Paper | LibreCat-ID: 13016
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. “Generation of Vector Patterns through Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” In IEEE International Test Conference (ITC’92), 120–29. Baltimore, MD, USA: IEEE, 1992. https://doi.org/10.1109/test.1992.527812.
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1991 | Book | LibreCat-ID: 13034
Hellebrand, Sybille. Synthese Vollständig Testbarer Schaltungen. 10. Verlag Düsseldorf: VDI Verlag: Verlag Düsseldorf: VDI Verlag, 1991.
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1990 | Misc | LibreCat-ID: 13103
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Oliver F. Haberl. Generating Pseudo-Exhaustive Vectors for External Testing. IEEE Design for Testability Workshop, Vail, CO, USA, 1990.
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1990 | Conference Paper | LibreCat-ID: 13018
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Tools and Devices Supporting the Pseudo-Exhaustive Test.” In European Design Automation Conference (EDAC’90), 13–17. Glasgow, UK: IEEE, 1990. https://doi.org/10.1109/edac.1990.136612.
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1990 | Conference Paper | LibreCat-ID: 13019
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Oliver F. Haberl. “Generating Pseudo-Exhaustive Vectors for External Testing.” In IEEE International Test Conference (ITC’90), 670–79. Washington, DC, USA: IEEE, 1990. https://doi.org/10.1109/test.1990.114082.
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