Marco Platzner

Technische Informatik
marco.platzner@uni-paderborn.de
ID
398

246 Publications

Mark all

[246]
2024 | Journal Article | LibreCat-ID: 52686
Q. A. Ahmed, T. Wiersema, and M. Platzner, “Post-configuration Activation of Hardware Trojans in FPGAs,” Journal of Hardware and Systems Security, 2024, doi: 10.1007/s41635-024-00147-5.
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[245]
2024 | Conference Paper | LibreCat-ID: 54468
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing,” presented at the IEEE Computer Society Annual Symposium on VLSI, Knoxville, Tennessee, USA, 2024.
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[244]
2024 | Conference Paper | LibreCat-ID: 56481
C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, and H. Giefers, “FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers,” presented at the International Conference on Field Programmable Technology, Sydney, 2024.
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[243]
2023 | Conference Paper | LibreCat-ID: 53794
C. Lienen et al., “AutonomROS: A ReconROS-based Autonomous Driving Unit,” 2023, doi: 10.1109/irc59093.2023.00056.
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[242]
2023 | Conference Paper | LibreCat-ID: 45913
L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, and M. Platzner, “On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64,” 2023, doi: https://doi.org/10.1007/978-3-031-42921-7_17.
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[241]
2023 | Conference Paper | LibreCat-ID: 46229
C. Lienen, A. P. Nowosad, and M. Platzner, “Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms,” doi: https://doi.org/10.1145/3637843.3637846.
LibreCat | DOI | Download (ext.)
 
[240]
2023 | Conference Paper | LibreCat-ID: 43048
C. Lienen, S. H. Middeke, and M. Platzner, “fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications,” 2023, doi: 10.1109/IROS55552.2023.10341921.
LibreCat | DOI | Download (ext.)
 
[239]
2023 | Book Chapter | LibreCat-ID: 45888 | OA
H. Wehrheim, M. Platzner, E. Bodden, P. Schubert, F. Pauck, and M.-C. Jakobs, “Verifying Software and Reconfigurable Hardware Services,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 125–144.
LibreCat | Files available | DOI
 
[238]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat | Files available | DOI
 
[237]
2023 | Book Chapter | LibreCat-ID: 45899 | OA
A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, and M. Platzner, “Flexible Industrial Analytics on Reconfigurable Systems-On-Chip,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 225–236.
LibreCat | Files available | DOI
 
[236]
2023 | Book | LibreCat-ID: 45863 | OA
C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023.
LibreCat | Files available | DOI
 
[235]
2023 | Conference Paper | LibreCat-ID: 44194 | OA
Q. A. Ahmed, M. Awais, and M. Platzner, “MAAS: Hiding Trojans in Approximate Circuits,” presented at the The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA, 2023.
LibreCat | Files available
 
[234]
2022 | Conference Paper | LibreCat-ID: 29945
L. M. Witschen, T. Wiersema, L. D. Reuter, and M. Platzner, “Search Space Characterization for Approximate Logic Synthesis ,” presented at the 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.
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[233]
2022 | Conference Paper | LibreCat-ID: 29865
L. M. Witschen, T. Wiersema, M. Artmann, and M. Platzner, “MUSCAT: MUS-based Circuit Approximation Technique,” presented at the Design, Automation and Test in Europe (DATE), Online.
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[232]
2022 | Conference Paper | LibreCat-ID: 30971
T. Hansmeier and M. Platzner, “Integrating Safety Guarantees into the Learning Classifier System XCS,” in Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, Madrid, 2022, vol. 13224, pp. 386–401, doi: 10.1007/978-3-031-02462-7_25.
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[231]
2022 | Conference Paper | LibreCat-ID: 32855
L. Clausing and M. Platzner, “ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support,” in 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Lyon, France, 2022, pp. 120–127, doi: 10.1109/ipdpsw55747.2022.00029.
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[230]
2022 | Conference Paper | LibreCat-ID: 33253
T. Hansmeier, M. Brede, and M. Platzner, “XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion,” in GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Boston, MA, USA, 2022, pp. 2071–2079, doi: 10.1145/3520304.3533977.
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[229]
2022 | Preprint | LibreCat-ID: 29541
C. Lienen and M. Platzner, “ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.” 2022.
LibreCat | Download (ext.)
 
[228]
2022 | Conference Paper | LibreCat-ID: 34007
C. Lienen and M. Platzner, “Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS,” presented at the 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.
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[227]
2022 | Conference Paper | LibreCat-ID: 34005
C. Lienen and M. Platzner, “Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications,” presented at the 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Gran Canaria, Spain, doi: 10.1109/DSD57027.2022.00088.
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[226]
2022 | Conference Paper | LibreCat-ID: 32342
Q. A. Ahmed and M. Platzner, “On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs,” presented at the IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus, 2022.
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[225]
2022 | Journal Article | LibreCat-ID: 33990
F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, and M. Platzner, “RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures,” IEEE Micro, vol. 42, no. 6, pp. 125–133, 2022, doi: 10.1109/MM.2022.3202091.
LibreCat | DOI | Download (ext.)
 
[224]
2021 | Journal Article | LibreCat-ID: 29150
C. Lienen and M. Platzner, “Design of Distributed Reconfigurable Robotics Systems with ReconROS,” ACM Transactions on Reconfigurable Technology and Systems, pp. 1–20, 2021, doi: 10.1145/3494571.
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[223]
2021 | Conference Paper | LibreCat-ID: 21610
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis,” in Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, Virtual, 2021, pp. 27–32.
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[222]
2021 | Conference Paper | LibreCat-ID: 21953
L. M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, and M. Platzner, “Timing Optimization for Virtual FPGA Configurations,” in Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Virtual conference, doi: 10.1007/978-3-030-79025-7_4.
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[221]
2021 | Journal Article | LibreCat-ID: 30906
A. Boschmann, D. Neuhaus, S. Vogt, C. Kaltschmidt, M. Platzner, and S. Dosen, “Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis,” Journal of NeuroEngineering and Rehabilitation, vol. 18, no. 1, Art. no. 25, 2021, doi: 10.1186/s12984-021-00822-6.
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[220]
2021 | Journal Article | LibreCat-ID: 30907
A. Rodriguez, A. Otero, M. Platzner, and E. De la Torre, “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs,” IEEE Transactions on Computers, pp. 1–1, 2021, doi: 10.1109/tc.2021.3107196.
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[219]
2021 | Preprint | LibreCat-ID: 22764 | OA
C. Lienen and M. Platzner, “Design of Distributed Reconfigurable Robotics Systems with ReconROS,” arXiv:2107.07208. 2021.
LibreCat | Download (ext.)
 
[218]
2021 | Conference Paper | LibreCat-ID: 21813
T. Hansmeier and M. Platzner, “An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS,” in GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Lille, France, 2021, pp. 1639–1647, doi: 10.1145/3449726.3463159.
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[217]
2021 | Journal Article | LibreCat-ID: 27841
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, and T. Wiersema, “Software/Hardware Co-Verification for Custom Instruction Set Processors,” IEEE Access, 2021, doi: 10.1109/ACCESS.2021.3131213.
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[216]
2021 | Conference Paper | LibreCat-ID: 20681 | OA
Q. A. Ahmed, T. Wiersema, and M. Platzner, “Malicious Routing: Circumventing Bitstream-level Verification for FPGAs,” presented at the Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France, 2021, doi: 10.23919/DATE51398.2021.9474026.
LibreCat | Files available | DOI | Download (ext.)
 
[215]
2021 | Conference Paper | LibreCat-ID: 30908
H. Ghasemzadeh Mohammadi et al., “FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics,” 2021, doi: https://doi.org/10.1007/978-3-030-93736-2_27.
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[214]
2020 | Conference Paper | LibreCat-ID: 3583
Z. Guetttatfi, P. Kaufmann, and M. Platzner, “Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices,” in Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
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[213]
2020 | Conference Paper | LibreCat-ID: 21584
C. P. Gatica and M. Platzner, “Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures,” in Machine Learning for Cyber Physical Systems (ML4CPS 2017), 2020.
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[212]
2020 | Journal Article | LibreCat-ID: 17358
L. M. Witschen, T. Wiersema, and M. Platzner, “Proof-carrying Approximate Circuits,” IEEE Transactions On Very Large Scale Integration Systems, vol. 28, no. 9, pp. 2084–2088, 2020.
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[211]
2020 | Journal Article | LibreCat-ID: 17369
N. Ho, P. Kaufmann, and M. Platzner, “Evolution of Application-Specific Cache Mappings,” International Journal of Hybrid intelligent Systems, 2020.
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[210]
2020 | Preprint | LibreCat-ID: 20748
L. M. Witschen, T. Wiersema, and M. Platzner, “Search Space Characterization for AxC Synthesis,” Fifth Workshop on Approximate Computing (AxC 2020). .
LibreCat | Files available
 
[209]
2020 | Conference Paper | LibreCat-ID: 20750
C. Lienen, M. Platzner, and B. Rinner, “ReconROS: Flexible Hardware Acceleration for ROS2 Applications,” in Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.
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[208]
2020 | Conference Paper | LibreCat-ID: 17063
T. Hansmeier, P. Kaufmann, and M. Platzner, “An Adaption Mechanism for the Error Threshold of XCSF,” in GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Cancún, Mexico, 2020, pp. 1756–1764, doi: 10.1145/3377929.3398106.
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[207]
2020 | Journal Article | LibreCat-ID: 17092
J. Anwer, S. Meisner, and M. Platzner, “Dynamic Reliability Management for FPGA-Based Systems,” International Journal of Reconfigurable Computing, pp. 1–19, 2020.
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[206]
2020 | Journal Article | LibreCat-ID: 15836
K. Bellman et al., “Self-aware Cyber-Physical Systems,” ACM Transactions on Cyber-Physical Systems, vol. Accepted for Publication, pp. 1–24, 2020.
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[205]
2020 | Conference Paper | LibreCat-ID: 16213
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “A Hybrid Synthesis Methodology for Approximate Circuits,” in Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, Beijing, China, 2020, pp. 421–426.
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[204]
2020 | Conference Paper | LibreCat-ID: 16363
T. Hansmeier, P. Kaufmann, and M. Platzner, “Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold,” in GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Cancún, Mexico, 2020, pp. 125–126.
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[203]
2020 | Conference Paper | LibreCat-ID: 20838
A. Lösch and M. Platzner, “MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes,” 2020, doi: 10.1109/ipdpsw50202.2020.00012.
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[202]
2020 | Conference Paper | LibreCat-ID: 20808
H. Ghasemzadeh Mohammadi et al., “DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms,” 2020, doi: 10.1109/etfa46521.2020.9211880.
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[201]
2019 | Journal Article | LibreCat-ID: 3585
L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Microelectronics Reliability, vol. 99, pp. 277–290, 2019.
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[200]
2019 | Preprint | LibreCat-ID: 16853
L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” Fourth Workshop on Approximate Computing (AxC 2019). .
LibreCat | Files available
 
[199]
2019 | Conference Paper | LibreCat-ID: 10577
L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, Tysons Corner, VA, USA, 2019.
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[198]
2019 | Journal Article | LibreCat-ID: 11950
A. Boschmann, A. Agne, G. Thombansen, L. M. Witschen, F. Kraus, and M. Platzner, “Zynq-based acceleration of robust high density myoelectric signal processing,” Journal of Parallel and Distributed Computing, vol. 123, pp. 77–89, 2019.
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[197]
2019 | Journal Article | LibreCat-ID: 12967
T. Hansmeier, M. Platzner, M. J. H. Pantho, and D. Andrews, “An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology,” Journal of Signal Processing Systems, vol. 91, no. 11, pp. 1259–1272, 2019.
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[196]
2019 | Conference Paper | LibreCat-ID: 15422
N. Ho, P. Kaufmann, and M. Platzner, “Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor,” in World Congress on Nature and Biologically Inspired Computing (NaBIC), 2019.
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[195]
2019 | Conference Paper | LibreCat-ID: 31067
Z. Guettatfi, M. Platzner, O. Kermia, and A. Khouas, “An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware,” 2019, doi: 10.1109/ipdpsw.2019.00027.
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[194]
2019 | Conference Paper | LibreCat-ID: 9913 | OA
Q. A. Ahmed, T. Wiersema, and M. Platzner, “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan,” in Applied Reconfigurable Computing, Darmstadt, Germany, 2019, vol. 11444, pp. 127–136, doi: 10.1007/978-3-030-17227-5_10.
LibreCat | Files available | DOI | Download (ext.)
 
[193]
2019 | Journal Article | LibreCat-ID: 12871 | OA
M. Platzner and C. Plessl, “FPGAs im Rechenzentrum,” Informatik Spektrum, 2019, doi: 10.1007/s00287-019-01187-w.
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[192]
2018 | Conference Paper | LibreCat-ID: 3362
A. Lösch, A. Wiens, and M. Platzner, “Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes,” in Proceedings of the International Conference on Architecture of Computing Systems (ARCS), 2018, vol. 10793, pp. 73–84.
LibreCat | Files available | DOI
 
[191]
2018 | Conference Paper | LibreCat-ID: 3373
T. Hansmeier, M. Platzner, and D. Andrews, “An FPGA/HMC-Based Accelerator for Resolution Proof Checking,” in ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Santorini, Greece, 2018, vol. 10824, pp. 153–165.
LibreCat | Files available | DOI
 
[190]
2018 | Preprint | LibreCat-ID: 3586
L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Third Workshop on Approximate Computing (AxC 2018). .
LibreCat | Files available
 
[189]
2018 | Preprint | LibreCat-ID: 1165
L. M. Witschen, T. Wiersema, and M. Platzner, “Making the Case for Proof-carrying Approximate Circuits,” 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
LibreCat | Files available
 
[188]
2018 | Conference Paper | LibreCat-ID: 5547
A. Lösch and M. Platzner, “A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes,” in 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018.
LibreCat | Files available | DOI
 
[187]
2018 | Conference Paper | LibreCat-ID: 10598
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
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[186]
2018 | Journal Article | LibreCat-ID: 12965
I. Ghribi, R. B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, and M. Platzner, “R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints,” IEEE Access, pp. 14078–14092, 2018.
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[185]
2017 | Conference Paper | LibreCat-ID: 65
A. Lösch and M. Platzner, “reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements,” in Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2017.
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[184]
2017 | Journal Article | LibreCat-ID: 68
T. Isenberg, M. Platzner, H. Wehrheim, and T. Wiersema, “Proof-Carrying Hardware via Inductive Invariants,” ACM Transactions on Design Automation of Electronic Systems, no. 4, pp. 61:1--61:23, 2017.
LibreCat | Files available | DOI
 
[183]
2017 | Journal Article | LibreCat-ID: 10600
P. H.W. Leong et al., “The First 25 Years of the FPL Conference – Significant Papers,” ACM Transactions on Reconfigurable Technology and Systems, 2017.
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[182]
2017 | Journal Article | LibreCat-ID: 10601
R. F. DeMara, M. Platzner, and M. Ottavi, “Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial),” IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing, 2017.
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[181]
2017 | Journal Article | LibreCat-ID: 10611
J. Anwer and M. Platzner, “Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus,” Microprocessors and Microsystems, pp. 160–172, 2017.
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[180]
2017 | Conference Paper | LibreCat-ID: 10630
A. Boschmann, G. Thombansen, L. M. Witschen, A. Wiens, and M. Platzner, “A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller,” in Design, Automation and Test in Europe (DATE), 2017.
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[179]
2017 | Conference Paper | LibreCat-ID: 10672
N. Ho, I. I. Ashraf, P. Kaufmann, and M. Platzner, “Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
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[178]
2017 | Conference Paper | LibreCat-ID: 10676
N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
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[177]
2017 | Conference Paper | LibreCat-ID: 10761
P. Kaufmann, N. Ho, and M. Platzner, “Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches,” in Adaptive Hardware and Systems (AHS), 2017.
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[176]
2017 | Conference Paper | LibreCat-ID: 10780
Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
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[175]
2017 | Conference Paper | LibreCat-ID: 14893
I. Ghribi, R. B. Abdallah, M. Khalgui, and M. Platzner, “I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems,” in Communications in Computer and Information Science, 2017.
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[174]
2016 | Journal Article | LibreCat-ID: 222
T. Wiersema, A. Bockhorn, and M. Platzner, “An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip,” Computers & Electrical Engineering, pp. 112--122, 2016.
LibreCat | Files available | DOI
 
[173]
2016 | Conference Paper | LibreCat-ID: 5812
A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2016.
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[172]
2016 | Conference Paper | LibreCat-ID: 10622
J. Anwer and M. Platzner, “Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs,” in Euromicro Conference on Digital System Design (DSD), 2016.
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[171]
2016 | Journal Article | LibreCat-ID: 10661
T. Graf and M. Platzner, “Adaptive playouts for online learning of policies during Monte Carlo Tree Search,” Journal Theoretical Computer Science, vol. 644, pp. 53–62, 2016.
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[170]
2016 | Conference Paper | LibreCat-ID: 10712
S. Meisner and M. Platzner, “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level,” in Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on, 2016, pp. 1–8.
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[169]
2016 | Conference Paper | LibreCat-ID: 10766
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “RCo-Design: New Visual Environment for Reconfigurable Embedded Systems,” in Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
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[168]
2016 | Conference Paper | LibreCat-ID: 10768
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Co-design Methodology for Real-time Embedded Systems,” in Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
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[167]
2016 | Book (Editor) | LibreCat-ID: 12972
P. R. Lewis, M. Platzner, B. Rinner, J. Tørresen, and X. Yao, Eds., Self-aware Computing Systems: An Engineering Approach. Cham: Springer, 2016.
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[166]
2016 | Conference Paper | LibreCat-ID: 15873
A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
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[165]
2016 | Conference Paper | LibreCat-ID: 13151
T. Graf and M. Platzner, “Using Deep Convolutional Neural Networks in Monte Carlo Tree Search,” in Computer and Games, 2016.
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[164]
2016 | Conference Paper | LibreCat-ID: 13152
T. Graf and M. Platzner, “Monte-Carlo Simulation Balancing Revisited,” in IEEE Computational Intelligence and Games, 2016.
LibreCat
 
[163]
2016 | Conference Paper | LibreCat-ID: 132
T. Wiersema and M. Platzner, “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware,” in Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
LibreCat | Files available | DOI
 
[162]
2016 | Book Chapter | LibreCat-ID: 29
A. Agne, M. Platzner, C. Plessl, M. Happe, and E. Lübbers, “ReconOS,” in FPGAs for Software Programmers, D. Koch, F. Hannig, and D. Ziener, Eds. Cham: Springer International Publishing, 2016, pp. 227–244.
LibreCat | DOI
 
[161]
2016 | Book Chapter | LibreCat-ID: 156
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-aware Compute Nodes,” in Self-aware Computing Systems, Cham: Springer International Publishing, 2016, pp. 145–165.
LibreCat | Files available | DOI
 
[160]
2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
LibreCat | Files available
 
[159]
2015 | Conference Paper | LibreCat-ID: 269
T. Wiersema, S. Wu, and M. Platzner, “On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach,” in Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
LibreCat | Files available | DOI
 
[158]
2015 | Conference Paper | LibreCat-ID: 10673
N. Ho, A. F. Ahmed, P. Kaufmann, and M. Platzner, “Microarchitectural optimization by means of reconfigurable and evolvable cache mappings,” in Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
LibreCat | DOI
 
[157]
2015 | Conference Paper | LibreCat-ID: 10711
S. Meisner and M. Platzner, “Comparison of thread signatures for error detection in hybrid multi-cores,” in Field Programmable Technology (FPT), 2015 International Conference on, 2015, pp. 212–215.
LibreCat | DOI
 
[156]
2015 | Conference Paper | LibreCat-ID: 10765
P. H.W. Leong et al., “Significant papers from the first 25 years of the FPL conference,” in Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), 2015, pp. 1–3.
LibreCat | DOI
 
[155]
2015 | Conference Paper | LibreCat-ID: 10767
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software,” in Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.
LibreCat
 
[154]
2015 | Conference Paper | LibreCat-ID: 13153
T. Graf and M. Platzner, “Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning,” in Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, 2015, pp. 1–11.
LibreCat | DOI
 
[153]
2015 | Journal Article | LibreCat-ID: 1768
C. Plessl, M. Platzner, and P. J. Schreier, “Aktuelles Schlagwort: Approximate Computing,” Informatik Spektrum, no. 5, pp. 396–399, 2015, doi: 10.1007/s00287-015-0911-z.
LibreCat | DOI
 
[152]
2014 | Conference Paper | LibreCat-ID: 347
S. Meisner and M. Platzner, “Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection,” in Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC), 2014, pp. 283–290.
LibreCat | Files available | DOI
 
[151]
2014 | Conference Paper | LibreCat-ID: 1782
T. Graf, L. Schaefers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go,” in Proc. Conf. on Computers and Games (CG), 2014, no. 8427, pp. 14–25.
LibreCat | DOI
 
[150]
2014 | Conference Paper | LibreCat-ID: 399
T. Wiersema, S. Drzevitzky, and M. Platzner, “Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp. 167–174.
LibreCat | Files available | DOI
 
[149]
2014 | Conference Paper | LibreCat-ID: 408
M.-C. Jakobs, M. Platzner, T. Wiersema, and H. Wehrheim, “Integrating Software and Hardware Verification,” in Proceedings of the 11th International Conference on Integrated Formal Methods (iFM), 2014, pp. 307–322.
LibreCat | Files available | DOI
 
[148]
2014 | Conference Paper | LibreCat-ID: 433
T. Wiersema, A. Bockhorn, and M. Platzner, “Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.
LibreCat | Files available | DOI
 
[147]
2014 | Journal Article | LibreCat-ID: 10602
L. Schaefers and M. Platzner, “A Novel Technique and its Application to Computer Go,” IEEE Transactions on Computational Intelligence and AI in Games, vol. 6, no. 3, pp. 361–374, 2014.
LibreCat | DOI
 
[146]
2014 | Journal Article | LibreCat-ID: 10603
H. Giefers and M. Platzner, “An FPGA-based Reconfigurable Mesh Many-Core,” IEEE Transactions on Computers, vol. 63, no. 12, pp. 2919–2932, 2014.
LibreCat | DOI
 
[145]
2014 | Conference Paper | LibreCat-ID: 10621
J. Anwer, M. Platzner, and S. Meisner, “FPGA Redundancy Configurations: An Automated Design Space Exploration,” in Reconfigurable Architectures Workshop (RAW), 2014.
LibreCat | DOI
 
[144]
2014 | Conference Paper | LibreCat-ID: 10632
A. Boschmann and M. Platzner, “A computer vision-based approach to high density EMG pattern recognition using structural similarity,” in Proc. MyoElectric Controls Symposium (MEC), 2014.
LibreCat
 
[143]
2014 | Conference Paper | LibreCat-ID: 10633
A. Boschmann and M. Platzner, “Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.
LibreCat
 
[142]
2014 | Conference Paper | LibreCat-ID: 10674
N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.
LibreCat | DOI
 
[141]
2014 | Conference Paper | LibreCat-ID: 10677
N. Ho, P. Kaufmann, and M. Platzner, “Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure,” in 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.
LibreCat | DOI
 
[140]
2014 | Conference Paper | LibreCat-ID: 10764
J. Anwer and M. Platzner, “Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs,” in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014, pp. 177–184.
LibreCat | DOI
 
[139]
2014 | Conference Paper | LibreCat-ID: 13154
T. Graf and M. Platzner, “Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go,” in 2014 IEEE Conference on Computational Intelligence and Games, 2014, pp. 1–8.
LibreCat | DOI
 
[138]
2014 | Book Chapter | LibreCat-ID: 335
M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware und Software,” in Logiken strukturbildender Prozesse: Automatismen, J. Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink, 2014, pp. 123–144.
LibreCat | Files available
 
[137]
2014 | Journal Article | LibreCat-ID: 363
A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators,” Microprocessors and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi: 10.1016/j.micpro.2013.12.001.
LibreCat | Files available | DOI
 
[136]
2014 | Journal Article | LibreCat-ID: 365
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness as a Model for Designing and Operating Heterogeneous Multicores,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no. 13, 2014, doi: 10.1145/2617596.
LibreCat | Files available | DOI
 
[135]
2014 | Journal Article | LibreCat-ID: 328
A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable Computing,” IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi: 10.1109/MM.2013.110.
LibreCat | Files available | DOI
 
[134]
2013 | Journal Article | LibreCat-ID: 10604
M. Happe, E. Lübbers, and M. Platzner, “A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking,” International Journal of Real-time Image Processing, vol. 8, no. 1, pp. 95–110, 2013.
LibreCat | DOI
 
[133]
2013 | Conference Paper | LibreCat-ID: 10620
J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, 2013, pp. 1–6.
LibreCat | DOI
 
[132]
2013 | Conference Paper | LibreCat-ID: 10634
A. Boschmann, B. Nofen, and M. Platzner, “Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
LibreCat
 
[131]
2013 | Conference Paper | LibreCat-ID: 10635
A. Boschmann and M. Platzner, “Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array,” in Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
LibreCat
 
[130]
2013 | Journal Article | LibreCat-ID: 10684
P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, and B. Sick, “Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers,” IEEE Transactions on Evolutionary Computation, vol. 17, no. 1, pp. 46–63, 2013.
LibreCat | DOI
 
[129]
2013 | Conference Paper | LibreCat-ID: 13645
T. Graf, L. Schäfers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go.,” in Proceedings of the International Conference on Computers and Games (CG), 2013.
LibreCat
 
[128]
2013 | Conference Paper | LibreCat-ID: 505
M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services,” 2013, doi: 10.1109/ISORC.2013.6913232.
LibreCat | Files available | DOI
 
[127]
2012 | Conference Paper | LibreCat-ID: 2103
M. Wistuba, L. Schaefers, and M. Platzner, “Comparison of Bayesian Move Prediction Systems for Computer Go,” in Proc. IEEE Conf. on Computational Intelligence and Games (CIG), 2012, pp. 91–99.
LibreCat | DOI
 
[126]
2012 | Misc | LibreCat-ID: 587
C. Plessl, M. Platzner, A. Agne, M. Happe, and E. Lübbers, Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine, 2012.
LibreCat | Files available
 
[125]
2012 | Conference Paper | LibreCat-ID: 10636
A. Boschmann and M. Platzner, “Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
LibreCat
 
[124]
2012 | Journal Article | LibreCat-ID: 10685
P. Kaufmann, K. Glette, M. Platzner, and J. Torresen, “Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture,” International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), vol. 3, no. 4, pp. 17–31, 2012.
LibreCat | DOI
 
[123]
2012 | Misc | LibreCat-ID: 10723
M. Platzner, A. Boschmann, and P. Kaufmann, Wieder natürlich gehen und greifen. 2012, pp. 6–11.
LibreCat
 
[122]
2012 | Misc | LibreCat-ID: 13462
P. Lewis, M. Platzner, and X. Yao, An outlook for self-awareness in computing systems. Awareness Magazine, 2012.
LibreCat
 
[121]
2012 | Journal Article | LibreCat-ID: 2108
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi: 10.1016/j.micpro.2011.04.002.
LibreCat | DOI
 
[120]
2012 | Conference Paper | LibreCat-ID: 609
M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat | Files available
 
[119]
2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
LibreCat
 
[118]
2011 | Book Chapter | LibreCat-ID: 2202
C. Plessl and M. Platzner, “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors,” in Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, M. Khalgui and H.-M. Hanisch, Eds. Hershey, PA, USA: IGI Global, 2011.
LibreCat | DOI
 
[117]
2011 | Conference Paper | LibreCat-ID: 2204
T. Graf, U. Lorenz, M. Platzner, and L. Schaefers, “Parallel Monte-Carlo Tree Search for HPC Systems,” in Proc. European Conf. on Parallel Processing (Euro-Par), 2011, vol. 6853.
LibreCat | DOI
 
[116]
2011 | Conference Paper | LibreCat-ID: 666
S. Drzevitzky and M. Platzner, “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach,” in Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65.
LibreCat | Files available | DOI
 
[115]
2011 | Conference Paper | LibreCat-ID: 10637
A. Boschmann, P. Kaufmann, and M. Platzner, “Accurate gait phase detection using surface electromyographic signals and support vector machines,” in Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
LibreCat
 
[114]
2011 | Conference Paper | LibreCat-ID: 10638
A. Boschmann, M. Platzner, M. Robrecht, M. Hahn, and M. Winkler, “Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems,” in Proc. MyoElectric Controls Symposium (MEC), 2011.
LibreCat
 
[113]
2011 | Book Chapter | LibreCat-ID: 10687
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Evolution of Embedded Systems,” in Organic Computing---A Paradigm Shift for Complex Systems, vol. 1, C. Müller-Schloer, H. Schmeck, and T. Ungerer, Eds. Springer Basel, 2011, pp. 193–206.
LibreCat
 
[112]
2011 | Book Chapter | LibreCat-ID: 10737
L. Sekanina, J. A. Walker, P. Kaufmann, C. Plessl, and M. Platzner, “Evolution of Electronic Circuits,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
LibreCat
 
[111]
2011 | Book Chapter | LibreCat-ID: 10748
J. A. Walker, J. F. Miller, P. Kaufmann, and M. Platzner, “Problem Decomposition in Cartesian Genetic Programming,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 35–99.
LibreCat
 
[110]
2011 | Conference Paper | LibreCat-ID: 13643
A. Agne, M. Platzner, and E. Lübbers, “Memory Virtualization for Multithreaded Reconfigurable Hardware,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2011, pp. 185–188.
LibreCat | DOI
 
[109]
2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
LibreCat | DOI
 
[108]
2011 | Journal Article | LibreCat-ID: 2201
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study,” Int. Journal of Recon- figurable Computing (IJRC), 2011, doi: 10.1155/2011/760954.
LibreCat | DOI
 
[107]
2010 | Conference Paper | LibreCat-ID: 2994
W. Schäfer et al., “Engineering self-coordinating software intensive systems,” in Proceedings of the FSE/SDP workshop on Future of software engineering research - FoSER ’10, 2010.
LibreCat | DOI
 
[106]
2010 | Journal Article | LibreCat-ID: 10605
S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification,” International Journal of Reconfigurable Computing, vol. 2010, 2010.
LibreCat | DOI
 
[105]
2010 | Conference Paper | LibreCat-ID: 10683
P. Kaufmann, K. Englehart, and M. Platzner, “Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms,” in International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2010, pp. 6357–6360.
LibreCat
 
[104]
2010 | Conference Paper | LibreCat-ID: 10686
P. Kaufmann, T. Knieper, and M. Platzner, “A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers,” in IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), 2010, pp. 541–548.
LibreCat
 
[103]
2010 | Journal Article | LibreCat-ID: 10694
U. Kebschull, M. Platzner, and J. Teich, “Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial),” IET Computers Digital Techniques, vol. 4, no. 3, pp. 157–158, 2010.
LibreCat | DOI
 
[102]
2010 | Conference Paper | LibreCat-ID: 10699
T. Knieper, P. Kaufmann, K. Glette, M. Platzner, and J. Torresen, “Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2010, vol. 6274, pp. 250–261.
LibreCat
 
[101]
2010 | Book Chapter | LibreCat-ID: 10704
E. Lübbers and M. Platzner, “ReconOS: An Operating System for Dynamically Reconfigurable Hardware,” in Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, M. Platzner, J. Teich, and N. Wehn, Eds. Springer-Verlag GmbH, 2010, pp. 269–290.
LibreCat | DOI
 
[100]
2010 | Book (Editor) | LibreCat-ID: 10763
M. Platzner, J. Teich, and N. Wehn, Eds., Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH, 2010.
LibreCat | DOI
 
[99]
2010 | Conference Paper | LibreCat-ID: 13640
H. Giefers and M. Platzner, “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier,” in Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), 2010.
LibreCat
 
[98]
2010 | Conference Paper | LibreCat-ID: 13641
W. Schäfer et al., “Engineering Self-Coordinating Software Intensive Systems,” in Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–324.
LibreCat
 
[97]
2010 | Conference Paper | LibreCat-ID: 13642
H. Giefers and M. Platzner, “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics,” in Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010.
LibreCat
 
[96]
2010 | Conference Paper | LibreCat-ID: 2223
E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.
LibreCat
 
[95]
2010 | Conference Paper | LibreCat-ID: 2206
A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376, doi: 10.1109/GLOCOMW.2010.5700341.
LibreCat | DOI
 
[94]
2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
LibreCat
 
[93]
2009 | Conference Paper | LibreCat-ID: 10639
A. Boschmann, P. Kaufmann, M. Platzner, and M. Winkler, “Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets,” in Proc. Technically Assisted Rehabilitation (TAR), 2009.
LibreCat
 
[92]
2009 | Journal Article | LibreCat-ID: 10703
E. Lübbers and M. Platzner, “ReconOS: Multithreaded Programming for Reconfigurable Computers,” ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, pp. 8:1-8:33, 2009.
LibreCat | DOI
 
[91]
2009 | Conference Paper | LibreCat-ID: 13632
M. Happe, E. Lübbers, and M. Platzner, “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms,” in Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2009.
LibreCat
 
[90]
2009 | Conference Paper | LibreCat-ID: 13634
H. Giefers and M. Platzner, “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh,” in Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
LibreCat
 
[89]
2009 | Conference Paper | LibreCat-ID: 13635
H. Giefers and M. Platzner, “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores,” in Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, 2009.
LibreCat
 
[88]
2009 | Conference Paper | LibreCat-ID: 13636
E. Lübbers and M. Platzner, “Cooperative Multithreading in Dynamically Reconfigurable Systems,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009.
LibreCat
 
[87]
2009 | Conference Paper | LibreCat-ID: 13637
H. Giefers and M. Platzner, “Program-driven Fine-grained Power Management for the Reconfigurable Mesh,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009.
LibreCat
 
[86]
2009 | Conference Paper | LibreCat-ID: 13638
M. Happe, E. Lübbers, and M. Platzner, “An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning,” in Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), 2009.
LibreCat | DOI
 
[85]
2009 | Conference Paper | LibreCat-ID: 13639
S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2009.
LibreCat
 
[84]
2009 | Conference Paper | LibreCat-ID: 2350
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25.
LibreCat | DOI
 
[83]
2009 | Conference Paper | LibreCat-ID: 2262
P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat
 
[82]
2009 | Conference Paper | LibreCat-ID: 2238
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32.
LibreCat | DOI
 
[81]
2009 | Conference Paper | LibreCat-ID: 2261
T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.
LibreCat
 
[80]
2008 | Conference Paper | LibreCat-ID: 2365
M. Platzner et al., “The GOmputer: Accelerating GO with FPGAs,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat
 
[79]
2008 | Conference Paper | LibreCat-ID: 10653
K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, and M. Platzner, “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control,” in IEEE Adaptive Hardware and Systems (AHS), 2008, pp. 32–39.
LibreCat
 
[78]
2008 | Conference Paper | LibreCat-ID: 10656
K. Glette, J. Torresen, P. Kaufmann, and M. Platzner, “A Comparison of Evolvable Hardware Architectures for Classification Tasks,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2008, vol. 5216, pp. 22–33.
LibreCat
 
[77]
2008 | Preprint | LibreCat-ID: 10690
J. Torresen, K. Glette, M. Platzner, and P. Kaufmann, “Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS).” 2008.
LibreCat
 
[76]
2008 | Conference Paper | LibreCat-ID: 10691
P. Kaufmann and M. Platzner, “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming,” in Genetic and Evolutionary Computation (GECCO), 2008, pp. 1219–1226.
LibreCat
 
[75]
2008 | Conference Paper | LibreCat-ID: 10698
T. Knieper, B. Defo, P. Kaufmann, and M. Platzner, “On Robust Evolution of Digital Hardware,” in Biologically Inspired Collaborative Computing (BICC), 2008, vol. 268, pp. 2313–222.
LibreCat
 
[74]
2008 | Conference Paper | LibreCat-ID: 13629
H. Giefers and M. Platzner, “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays,” in Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), 2008.
LibreCat
 
[73]
2008 | Conference Paper | LibreCat-ID: 13630
E. Lübbers and M. Platzner, “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems,” in Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008.
LibreCat
 
[72]
2008 | Conference Paper | LibreCat-ID: 13631
E. Lübbers and M. Platzner, “A portable abstraction layer for hardware threads,” in Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), 2008.
LibreCat | DOI
 
[71]
2008 | Conference Paper | LibreCat-ID: 2364
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat
 
[70]
2008 | Conference Paper | LibreCat-ID: 2372
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.
LibreCat
 
[69]
2007 | Conference Paper | LibreCat-ID: 6508
P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.
LibreCat | DOI
 
[68]
2007 | Journal Article | LibreCat-ID: 10625
N. Bergmann, M. Platzner, and J. Teich, “Dynamically Reconfigurable Architectures (editorial),” {EURASIP} Journal on Embedded Systems, vol. 2007, pp. 1–2, 2007.
LibreCat | DOI
 
[67]
2007 | Journal Article | LibreCat-ID: 10646
K. Danne, R. Mühlenbernd, and M. Platzner, “Server-based execution of periodic tasks on dynamically reconfigurable hardware,” IET Computers Digital Techniques, vol. 1, no. 4, pp. 295–302, 2007.
LibreCat | DOI
 
[66]
2007 | Conference Paper | LibreCat-ID: 10689
P. Kaufmann and M. Platzner, “Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution,” in Architecture of Computing Systems (ARCS), 2007, vol. 4415, pp. 199–208.
LibreCat
 
[65]
2007 | Conference Paper | LibreCat-ID: 10735
T. Schumacher, E. Lübbers, P. Kaufmann, and M. Platzner, “Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster,” in Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), 2007, vol. 15, pp. 749–756.
LibreCat
 
[64]
2007 | Conference Paper | LibreCat-ID: 13627
H. Giefers and M. Platzner, “A Many-Core Implementation Based on the Reconfigurable Mesh Model,” in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), 2007.
LibreCat | DOI
 
[63]
2007 | Conference Paper | LibreCat-ID: 13628
E. Lübbers and M. Platzner, “ReconOS: An RTOS Supporting Hard-and Software Threads,” in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), 2007.
LibreCat | DOI
 
[62]
2006 | Conference Paper | LibreCat-ID: 2401
C. Plessl, M. Platzner, and L. Thiele, “Optimal Temporal Partitioning based on Slowdown and Retiming,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2006, pp. 345–348.
LibreCat | DOI
 
[61]
2006 | Conference Paper | LibreCat-ID: 10688
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Hardware Evolution,” in Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
LibreCat
 
[60]
2006 | Conference Paper | LibreCat-ID: 13624
K. Danne, R. Mühlenbernd, and M. Platzner, “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions,” in Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), 2006.
LibreCat
 
[59]
2006 | Conference Paper | LibreCat-ID: 13625
K. Danne and M. Platzner, “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices,” in In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
LibreCat
 
[58]
2006 | Conference Paper | LibreCat-ID: 13626
K. Danne and M. Platzner, “Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware,” in Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), 2006.
LibreCat
 
[57]
2005 | Conference Paper | LibreCat-ID: 2411
C. Plessl and M. Platzner, “Zippy – A coarse-grained reconfigurable array with support for hardware virtualization,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2005, pp. 213–218.
LibreCat | DOI
 
[56]
2005 | Journal Article | LibreCat-ID: 2412
R. Enzler, C. Plessl, and M. Platzner, “System-level performance evaluation of reconfigurable processors,” Microprocessors and Microsystems, vol. 29, no. 2–3, pp. 63–73, 2005.
LibreCat | DOI
 
[55]
2005 | Conference Paper | LibreCat-ID: 13621
K. Danne and M. Platzner, “Periodic real-time scheduling for FPGA computers,” in Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.
LibreCat | DOI
 
[54]
2005 | Conference Paper | LibreCat-ID: 13622
K. Danne and M. Platzner, “Memory-demanding Periodic Real-time Applications on FPGA Computers,” in Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-time Systems (ECRTS), 2005.
LibreCat
 
[53]
2005 | Conference Paper | LibreCat-ID: 13623
K. Danne and M. Platzner, “A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware,” in Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), 2005.
LibreCat | DOI
 
[52]
2004 | Conference Paper | LibreCat-ID: 2415
C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
LibreCat
 
[51]
2004 | Journal Article | LibreCat-ID: 10742
C. Steiger, H. Walder, and M. Platzner, “Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks,” {IEEE} Transactions on Computers, vol. 53, no. 11, pp. 1393–1407, 2004.
LibreCat | DOI
 
[50]
2004 | Conference Paper | LibreCat-ID: 13618
H. Walder and M. Platzner, “A Runtime Environment for Reconfigurable Hardware Operating Systems,” in Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), 2004, pp. 831–835.
LibreCat | DOI
 
[49]
2004 | Conference Paper | LibreCat-ID: 13619
H. Walder, S. Nobs, and M. Platzner, “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems,” in Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004.
LibreCat
 
[48]
2004 | Conference Paper | LibreCat-ID: 13620
M. Dyer, M. Platzner, and L. Thiele, “Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine,” in Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2004.
LibreCat | DOI
 
[47]
2003 | Conference Paper | LibreCat-ID: 2418
C. Plessl and M. Platzner, “TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2003, pp. 252–259.
LibreCat | DOI
 
[46]
2003 | Journal Article | LibreCat-ID: 2419
C. Plessl et al., “The Case for Reconfigurable Hardware in Wearable Computing,” Personal and Ubiquitous Computing, vol. 7, no. 5, pp. 299–308, 2003.
LibreCat | DOI
 
[45]
2003 | Journal Article | LibreCat-ID: 2420
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” Journal of Supercomputing, vol. 26, no. 2, pp. 109–129, 2003.
LibreCat | DOI
 
[44]
2003 | Conference Paper | LibreCat-ID: 2421
R. Enzler, C. Plessl, and M. Platzner, “Virtualizing Hardware with Multi-Context Reconfigurable Arrays,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2003, vol. 2778, pp. 151–160.
LibreCat | DOI
 
[43]
2003 | Conference Paper | LibreCat-ID: 2422
R. Enzler, C. Plessl, and M. Platzner, “Co-simulation of a Hybrid Multi-Context Architecture,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 174–180.
LibreCat
 
[42]
2003 | Conference Paper | LibreCat-ID: 13612
H. Walder and M. Platzner, “Online scheduling for block-partitioned reconfigurable devices,” in Proceedings Design, Automation and Test in Europe Conference (DATE), 2003, pp. 290–295.
LibreCat | DOI
 
[41]
2003 | Conference Paper | LibreCat-ID: 13613
H. Walder, C. Steiger, and M. Platzner, “Fast online task placement on FPGAs: free space partitioning and 2D-hashing,” in Proceedings International Parallel and Distributed Processing Symposium, 2003.
LibreCat | DOI
 
[40]
2003 | Conference Paper | LibreCat-ID: 13614
H. Walder and M. Platzner, “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations,” in Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 284–287.
LibreCat
 
[39]
2003 | Conference Paper | LibreCat-ID: 13615
C. Steiger, H. Walder, and M. Platzner, “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices,” in Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 2003, pp. 575–584.
LibreCat | DOI
 
[38]
2003 | Conference Paper | LibreCat-ID: 13617
C. Steiger, H. Walder, M. Platzner, and L. Thiele, “Online scheduling and placement of real-time tasks to partially reconfigurable devices,” in Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 2003, pp. 252–235.
LibreCat | DOI
 
[37]
2002 | Conference Paper | LibreCat-ID: 2423
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, and L. Thiele, “Reconfigurable Hardware in Wearable Computing Nodes,” in Proc. Int. Symp. on Wearable Computers (ISWC), 2002, pp. 215–222.
LibreCat | DOI
 
[36]
2002 | Conference Paper | LibreCat-ID: 2424
M. Dyer, C. Plessl, and M. Platzner, “Partially Reconfigurable Cores for Xilinx Virtex,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2002, vol. 2438, pp. 292–301.
LibreCat | DOI
 
[35]
2002 | Conference Paper | LibreCat-ID: 2425
C. Plessl and M. Platzner, “Custom Computing Machines for the Set Covering Problem,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2002, pp. 163–172.
LibreCat | DOI
 
[34]
2002 | Journal Article | LibreCat-ID: 10651
M. Eisenring and M. Platzner, “A Framework for Run-time Reconfigurable Systems,” The Journal of Supercomputing, vol. 21, no. 2, pp. 145–159, 2002.
LibreCat | DOI
 
[33]
2002 | Conference Paper | LibreCat-ID: 13611
H. Walder and M. Platzner, “Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform,” in Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2002, pp. 24–30.
LibreCat
 
[32]
2001 | Conference Paper | LibreCat-ID: 2428
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2001, pp. 85–91.
LibreCat
 
[31]
2001 | Conference Paper | LibreCat-ID: 2432
R. Enzler, M. Platzner, C. Plessl, L. Thiele, and G. Tröster, “Reconfigurable Processors for Handhelds and Wearables: Application Analysis,” in Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, vol. 4525, pp. 135–146.
LibreCat | DOI
 
[30]
2001 | Journal Article | LibreCat-ID: 10713
O. Mencer, M. Platzner, M. Morf, and M. J. Flynn, “Object-oriented domain specific compilers for programming FPGAs,” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, vol. 9, no. 1, pp. 205–210, 2001.
LibreCat | DOI
 
[29]
2001 | Misc | LibreCat-ID: 13463
R. Enzler and M. Platzner, Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
 
[28]
2000 | Journal Article | LibreCat-ID: 6507
M. Platzner, “Reconfigurable accelerators for combinatorial problems,” Computer, vol. 33, no. 4, pp. 58–60, 2000.
LibreCat | DOI
 
[27]
2000 | Journal Article | LibreCat-ID: 10606
M. Eisenring and M. Platzner, “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems,” IEE Proceedings -- Computers & Digital Techniques, vol. 147, pp. 159–165, 2000.
LibreCat | DOI
 
[26]
2000 | Journal Article | LibreCat-ID: 10725
M. Platzner, B. Rinner, and R. Weiss, “Toward embedded qualitative simulation: a specialized computer architecture for QSim,” IEEE Intelligent Systems, vol. 15, no. 2, pp. 62–68, 2000.
LibreCat | DOI
 
[25]
2000 | Conference Paper | LibreCat-ID: 13609
M. H. Eisenring and M. Platzner, “An Implementation Framework for Run-time Reconfigurable Systems,” in Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 2000, pp. 151–157.
LibreCat
 
[24]
2000 | Conference Paper | LibreCat-ID: 13610
M. Eisenring and M. Platzner, “Optimization of Run-time Reconfigurable Embedded Systems,” in Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 2000, pp. 565–574.
LibreCat
 
[23]
1999 | Conference Paper | LibreCat-ID: 13607
O. Mencer and M. Platzner, “Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment,” in Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), 1999.
LibreCat | DOI
 
[22]
1999 | Conference Paper | LibreCat-ID: 13608
M. Eisenring, M. Platzner, and L. Thiele, “Communication Synthesis for Reconfigurable Embedded Systems,” in Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1999, vol. 1673, pp. 205–214.
LibreCat | DOI
 
[21]
1998 | Journal Article | LibreCat-ID: 10607
M. Platzner, “Reconfigurable Computer Architectures,” e&i Elektrotechnik und Informationstechnik, vol. 115, pp. 143–148, 1998.
LibreCat
 
[20]
1998 | Journal Article | LibreCat-ID: 10608
M. Platzner and B. Rinner, “Design and Implementation of a Parallel Constraint Satisfaction Algorithm,” International Journal of Computers & Their Applications, vol. 5, pp. 106–116, 1998.
LibreCat
 
[19]
1998 | Misc | LibreCat-ID: 13464
M. Platzner, B. Rinner, and R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–107.
LibreCat
 
[18]
1998 | Conference Paper | LibreCat-ID: 13606
M. Platzner and G. De Micheli, “Acceleration of satisfiability algorithms by reconfigurable hardware,” in Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 1998, pp. 69–78.
LibreCat | DOI
 
[17]
1997 | Journal Article | LibreCat-ID: 10609
M. Platzner, B. Rinner, and R. Weiss, “A Computer Architecture to Support Qualitative Simulation in Industrial Applications,” e & i Elektrotechnik und Informationstechnik, vol. 114, pp. 13–18, 1997.
LibreCat
 
[16]
1997 | Journal Article | LibreCat-ID: 10724
M. Platzner, B. Rinner, and R. Weiss, “Parallel qualitative simulation,” Simulation Practice and Theory, vol. 5, no. 7–8, pp. 623–638, 1997.
LibreCat | DOI
 
[15]
1997 | Conference Paper | LibreCat-ID: 13603
M. Platzner and L. Peters, “Fast Signature Segmentation on a Multi-DSP Architecture,” in Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997, vol. 3166.
LibreCat
 
[14]
1997 | Conference Paper | LibreCat-ID: 13604
T. Röwekamp, M. Platzner, and L. Peters, “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP,” in Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 1997, pp. 829–833.
LibreCat
 
[13]
1996 | Conference Paper | LibreCat-ID: 13602
E. Lind, M. Platzner, and B. Rinner, “A Multi-DSP System with Dynamically Reconfigurable Processors,” in Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
LibreCat
 
[12]
1995 | Journal Article | LibreCat-ID: 10610
M. Platzner, B. Rinner, and R. Weiss, “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation,” J.UCS Journal of Universal Computer Science, vol. 12, pp. 811–820, 1995.
LibreCat
 
[11]
1995 | Conference Paper | LibreCat-ID: 13469
M. Platzner, B. Rinner, and R. Weiss, “A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs,” in Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 1995, pp. 311–318.
LibreCat
 
[10]
1995 | Conference Paper | LibreCat-ID: 13470
E. Brenner et al., “High-Performance Simulators Based on Multi-TMS320C40,” in Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference, 1995.
LibreCat
 
[9]
1995 | Conference Paper | LibreCat-ID: 13471
G. Friedl, M. Platzner, and B. Rinner, “A Special-Purpose Coprocessor for Qualitative Simulation,” in Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 1995, pp. 695–698.
LibreCat
 
[8]
1995 | Conference Paper | LibreCat-ID: 13472
M. Platzner, B. Rinner, and R. Weiss, “Parallel Qualitative Simulation,” in Proceedings of the EUROSIM Congress, 1995, pp. 231–236.
LibreCat
 
[7]
1995 | Conference Paper | LibreCat-ID: 13473
M. Platzner and B. Rinner, “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture,” in Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 1995, pp. 494–501.
LibreCat
 
[6]
1995 | Conference Paper | LibreCat-ID: 13474
M. Platzner and B. Rinner, “High-Performance Qualitative Simulation on a Multi-DSP Architecture,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[5]
1995 | Conference Paper | LibreCat-ID: 13484
R. Hranitzky and M. Platzner, “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[4]
1994 | Conference Paper | LibreCat-ID: 13468
M. Platzner, C. Steger, and R. Weiss, “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications,” in Proceedings of the 7th Mediterranean Electrotechnical Conference, 1994.
LibreCat
 
[3]
1993 | Journal Article | LibreCat-ID: 13466
M. Platzner and C. Steger, “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40),” Mikroelektronik, 1993.
LibreCat
 
[2]
1993 | Conference Paper | LibreCat-ID: 13467
M. Platzner, C. Steger, and R. Weiss, “Performance Measurements on a Multi-DSP Architecture with TMS320C40,” in Proceedings of the 4th International Conference on Signal Processing Applications & Technology (ICSPAT), 1993.
LibreCat
 
[1]
1992 | Conference Paper | LibreCat-ID: 13465
R. Ginthör, M. Platzner, and R. Weiss, “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems,” in Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.
LibreCat
 
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[246]
2024 | Journal Article | LibreCat-ID: 52686
Q. A. Ahmed, T. Wiersema, and M. Platzner, “Post-configuration Activation of Hardware Trojans in FPGAs,” Journal of Hardware and Systems Security, 2024, doi: 10.1007/s41635-024-00147-5.
LibreCat | DOI
 
[245]
2024 | Conference Paper | LibreCat-ID: 54468
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing,” presented at the IEEE Computer Society Annual Symposium on VLSI, Knoxville, Tennessee, USA, 2024.
LibreCat
 
[244]
2024 | Conference Paper | LibreCat-ID: 56481
C. Berganski, F. Jentzsch, M. Platzner, M. Kuhmichel, and H. Giefers, “FINN-T: Compiling Custom Dataflow Accelerators for Quantized Transformers,” presented at the International Conference on Field Programmable Technology, Sydney, 2024.
LibreCat
 
[243]
2023 | Conference Paper | LibreCat-ID: 53794
C. Lienen et al., “AutonomROS: A ReconROS-based Autonomous Driving Unit,” 2023, doi: 10.1109/irc59093.2023.00056.
LibreCat | DOI
 
[242]
2023 | Conference Paper | LibreCat-ID: 45913
L. Clausing, Z. Guetattfi, P. Kaufmann, C. Lienen, and M. Platzner, “On Guaranteeing Schedulability of Periodic Real-time Hardware Tasks under ReconOS64,” 2023, doi: https://doi.org/10.1007/978-3-031-42921-7_17.
LibreCat | DOI
 
[241]
2023 | Conference Paper | LibreCat-ID: 46229
C. Lienen, A. P. Nowosad, and M. Platzner, “Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms,” doi: https://doi.org/10.1145/3637843.3637846.
LibreCat | DOI | Download (ext.)
 
[240]
2023 | Conference Paper | LibreCat-ID: 43048
C. Lienen, S. H. Middeke, and M. Platzner, “fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications,” 2023, doi: 10.1109/IROS55552.2023.10341921.
LibreCat | DOI | Download (ext.)
 
[239]
2023 | Book Chapter | LibreCat-ID: 45888 | OA
H. Wehrheim, M. Platzner, E. Bodden, P. Schubert, F. Pauck, and M.-C. Jakobs, “Verifying Software and Reconfigurable Hardware Services,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 125–144.
LibreCat | Files available | DOI
 
[238]
2023 | Book Chapter | LibreCat-ID: 45893 | OA
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, and C. Plessl, “Compute Centers I: Heterogeneous Execution Environments,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 165–182.
LibreCat | Files available | DOI
 
[237]
2023 | Book Chapter | LibreCat-ID: 45899 | OA
A. Boschmann, L. Clausing, F. Jentzsch, H. Ghasemzadeh Mohammadi, and M. Platzner, “Flexible Industrial Analytics on Reconfigurable Systems-On-Chip,” in On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412, C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, Eds. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023, pp. 225–236.
LibreCat | Files available | DOI
 
[236]
2023 | Book | LibreCat-ID: 45863 | OA
C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, and H. Wehrheim, On-The-Fly Computing -- Individualized IT-services in dynamic markets, vol. 412. Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2023.
LibreCat | Files available | DOI
 
[235]
2023 | Conference Paper | LibreCat-ID: 44194 | OA
Q. A. Ahmed, M. Awais, and M. Platzner, “MAAS: Hiding Trojans in Approximate Circuits,” presented at the The 24th International Symposium on Quality Electronic Design (ISQED’23), San Fransico CA 94023-0607, USA, 2023.
LibreCat | Files available
 
[234]
2022 | Conference Paper | LibreCat-ID: 29945
L. M. Witschen, T. Wiersema, L. D. Reuter, and M. Platzner, “Search Space Characterization for Approximate Logic Synthesis ,” presented at the 2022 59th ACM/IEEE Design Automation Conference (DAC), San Francisco, USA.
LibreCat
 
[233]
2022 | Conference Paper | LibreCat-ID: 29865
L. M. Witschen, T. Wiersema, M. Artmann, and M. Platzner, “MUSCAT: MUS-based Circuit Approximation Technique,” presented at the Design, Automation and Test in Europe (DATE), Online.
LibreCat
 
[232]
2022 | Conference Paper | LibreCat-ID: 30971
T. Hansmeier and M. Platzner, “Integrating Safety Guarantees into the Learning Classifier System XCS,” in Applications of Evolutionary Computation, EvoApplications 2022, Proceedings, Madrid, 2022, vol. 13224, pp. 386–401, doi: 10.1007/978-3-031-02462-7_25.
LibreCat | DOI
 
[231]
2022 | Conference Paper | LibreCat-ID: 32855
L. Clausing and M. Platzner, “ReconOS64: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support,” in 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Lyon, France, 2022, pp. 120–127, doi: 10.1109/ipdpsw55747.2022.00029.
LibreCat | DOI
 
[230]
2022 | Conference Paper | LibreCat-ID: 33253
T. Hansmeier, M. Brede, and M. Platzner, “XCS on Embedded Systems: An Analysis of Execution Profiles and Accelerated Classifier Deletion,” in GECCO ’22: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Boston, MA, USA, 2022, pp. 2071–2079, doi: 10.1145/3520304.3533977.
LibreCat | DOI
 
[229]
2022 | Preprint | LibreCat-ID: 29541
C. Lienen and M. Platzner, “ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications.” 2022.
LibreCat | Download (ext.)
 
[228]
2022 | Conference Paper | LibreCat-ID: 34007
C. Lienen and M. Platzner, “Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS,” presented at the 2022 Sixth IEEE International Conference on Robotic Computing (IRC) , Neaples, Italy.
LibreCat
 
[227]
2022 | Conference Paper | LibreCat-ID: 34005
C. Lienen and M. Platzner, “Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications,” presented at the 25th Euromicro Conference on Digital System Design (DSD), Maspalomas, Gran Canaria, Spain, doi: 10.1109/DSD57027.2022.00088.
LibreCat | DOI
 
[226]
2022 | Conference Paper | LibreCat-ID: 32342
Q. A. Ahmed and M. Platzner, “On the Detection and Circumvention of Bitstream-Level Trojans in FPGAs,” presented at the IEEE Computer Society Annual Symposium on VLSI Aliathon Resort, Pafos, Cyprus, 2022.
LibreCat
 
[225]
2022 | Journal Article | LibreCat-ID: 33990
F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, and M. Platzner, “RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures,” IEEE Micro, vol. 42, no. 6, pp. 125–133, 2022, doi: 10.1109/MM.2022.3202091.
LibreCat | DOI | Download (ext.)
 
[224]
2021 | Journal Article | LibreCat-ID: 29150
C. Lienen and M. Platzner, “Design of Distributed Reconfigurable Robotics Systems with ReconROS,” ACM Transactions on Reconfigurable Technology and Systems, pp. 1–20, 2021, doi: 10.1145/3494571.
LibreCat | DOI
 
[223]
2021 | Conference Paper | LibreCat-ID: 21610
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis,” in Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI) 2021, Virtual, 2021, pp. 27–32.
LibreCat | DOI
 
[222]
2021 | Conference Paper | LibreCat-ID: 21953
L. M. Witschen, T. Wiersema, M. Raeisi Nafchi, A. Bockhorn, and M. Platzner, “Timing Optimization for Virtual FPGA Configurations,” in Proceedings of International Symposium on Applied Reconfigurable Computing (ARC’21), Virtual conference, doi: 10.1007/978-3-030-79025-7_4.
LibreCat | DOI
 
[221]
2021 | Journal Article | LibreCat-ID: 30906
A. Boschmann, D. Neuhaus, S. Vogt, C. Kaltschmidt, M. Platzner, and S. Dosen, “Immersive augmented reality system for the training of pattern classification control with a myoelectric prosthesis,” Journal of NeuroEngineering and Rehabilitation, vol. 18, no. 1, Art. no. 25, 2021, doi: 10.1186/s12984-021-00822-6.
LibreCat | DOI
 
[220]
2021 | Journal Article | LibreCat-ID: 30907
A. Rodriguez, A. Otero, M. Platzner, and E. De la Torre, “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs,” IEEE Transactions on Computers, pp. 1–1, 2021, doi: 10.1109/tc.2021.3107196.
LibreCat | DOI
 
[219]
2021 | Preprint | LibreCat-ID: 22764 | OA
C. Lienen and M. Platzner, “Design of Distributed Reconfigurable Robotics Systems with ReconROS,” arXiv:2107.07208. 2021.
LibreCat | Download (ext.)
 
[218]
2021 | Conference Paper | LibreCat-ID: 21813
T. Hansmeier and M. Platzner, “An Experimental Comparison of Explore/Exploit Strategies for the Learning Classifier System XCS,” in GECCO ’21: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Lille, France, 2021, pp. 1639–1647, doi: 10.1145/3449726.3463159.
LibreCat | DOI
 
[217]
2021 | Journal Article | LibreCat-ID: 27841
M.-C. Jakobs, F. Pauck, M. Platzner, H. Wehrheim, and T. Wiersema, “Software/Hardware Co-Verification for Custom Instruction Set Processors,” IEEE Access, 2021, doi: 10.1109/ACCESS.2021.3131213.
LibreCat | DOI
 
[216]
2021 | Conference Paper | LibreCat-ID: 20681 | OA
Q. A. Ahmed, T. Wiersema, and M. Platzner, “Malicious Routing: Circumventing Bitstream-level Verification for FPGAs,” presented at the Design, Automation and Test in Europe Conference (DATE’21), Alpexpo | Grenoble, France, 2021, doi: 10.23919/DATE51398.2021.9474026.
LibreCat | Files available | DOI | Download (ext.)
 
[215]
2021 | Conference Paper | LibreCat-ID: 30908
H. Ghasemzadeh Mohammadi et al., “FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics,” 2021, doi: https://doi.org/10.1007/978-3-030-93736-2_27.
LibreCat | DOI
 
[214]
2020 | Conference Paper | LibreCat-ID: 3583
Z. Guetttatfi, P. Kaufmann, and M. Platzner, “Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices,” in Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
LibreCat
 
[213]
2020 | Conference Paper | LibreCat-ID: 21584
C. P. Gatica and M. Platzner, “Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures,” in Machine Learning for Cyber Physical Systems (ML4CPS 2017), 2020.
LibreCat | DOI
 
[212]
2020 | Journal Article | LibreCat-ID: 17358
L. M. Witschen, T. Wiersema, and M. Platzner, “Proof-carrying Approximate Circuits,” IEEE Transactions On Very Large Scale Integration Systems, vol. 28, no. 9, pp. 2084–2088, 2020.
LibreCat | DOI
 
[211]
2020 | Journal Article | LibreCat-ID: 17369
N. Ho, P. Kaufmann, and M. Platzner, “Evolution of Application-Specific Cache Mappings,” International Journal of Hybrid intelligent Systems, 2020.
LibreCat
 
[210]
2020 | Preprint | LibreCat-ID: 20748
L. M. Witschen, T. Wiersema, and M. Platzner, “Search Space Characterization for AxC Synthesis,” Fifth Workshop on Approximate Computing (AxC 2020). .
LibreCat | Files available
 
[209]
2020 | Conference Paper | LibreCat-ID: 20750
C. Lienen, M. Platzner, and B. Rinner, “ReconROS: Flexible Hardware Acceleration for ROS2 Applications,” in Proceedings of the 2020 International Conference on Field-Programmable Technology (FPT), 2020.
LibreCat
 
[208]
2020 | Conference Paper | LibreCat-ID: 17063
T. Hansmeier, P. Kaufmann, and M. Platzner, “An Adaption Mechanism for the Error Threshold of XCSF,” in GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Cancún, Mexico, 2020, pp. 1756–1764, doi: 10.1145/3377929.3398106.
LibreCat | DOI
 
[207]
2020 | Journal Article | LibreCat-ID: 17092
J. Anwer, S. Meisner, and M. Platzner, “Dynamic Reliability Management for FPGA-Based Systems,” International Journal of Reconfigurable Computing, pp. 1–19, 2020.
LibreCat | DOI
 
[206]
2020 | Journal Article | LibreCat-ID: 15836
K. Bellman et al., “Self-aware Cyber-Physical Systems,” ACM Transactions on Cyber-Physical Systems, vol. Accepted for Publication, pp. 1–24, 2020.
LibreCat
 
[205]
2020 | Conference Paper | LibreCat-ID: 16213
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “A Hybrid Synthesis Methodology for Approximate Circuits,” in Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, Beijing, China, 2020, pp. 421–426.
LibreCat | DOI
 
[204]
2020 | Conference Paper | LibreCat-ID: 16363
T. Hansmeier, P. Kaufmann, and M. Platzner, “Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold,” in GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Cancún, Mexico, 2020, pp. 125–126.
LibreCat | DOI
 
[203]
2020 | Conference Paper | LibreCat-ID: 20838
A. Lösch and M. Platzner, “MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes,” 2020, doi: 10.1109/ipdpsw50202.2020.00012.
LibreCat | DOI
 
[202]
2020 | Conference Paper | LibreCat-ID: 20808
H. Ghasemzadeh Mohammadi et al., “DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms,” 2020, doi: 10.1109/etfa46521.2020.9211880.
LibreCat | DOI
 
[201]
2019 | Journal Article | LibreCat-ID: 3585
L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Microelectronics Reliability, vol. 99, pp. 277–290, 2019.
LibreCat | DOI
 
[200]
2019 | Preprint | LibreCat-ID: 16853
L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” Fourth Workshop on Approximate Computing (AxC 2019). .
LibreCat | Files available
 
[199]
2019 | Conference Paper | LibreCat-ID: 10577
L. M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, and M. Platzner, “Jump Search: A Fast Technique for the Synthesis of Approximate Circuits,” in Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, Tysons Corner, VA, USA, 2019.
LibreCat | DOI
 
[198]
2019 | Journal Article | LibreCat-ID: 11950
A. Boschmann, A. Agne, G. Thombansen, L. M. Witschen, F. Kraus, and M. Platzner, “Zynq-based acceleration of robust high density myoelectric signal processing,” Journal of Parallel and Distributed Computing, vol. 123, pp. 77–89, 2019.
LibreCat | DOI
 
[197]
2019 | Journal Article | LibreCat-ID: 12967
T. Hansmeier, M. Platzner, M. J. H. Pantho, and D. Andrews, “An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology,” Journal of Signal Processing Systems, vol. 91, no. 11, pp. 1259–1272, 2019.
LibreCat | DOI
 
[196]
2019 | Conference Paper | LibreCat-ID: 15422
N. Ho, P. Kaufmann, and M. Platzner, “Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor,” in World Congress on Nature and Biologically Inspired Computing (NaBIC), 2019.
LibreCat
 
[195]
2019 | Conference Paper | LibreCat-ID: 31067
Z. Guettatfi, M. Platzner, O. Kermia, and A. Khouas, “An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware,” 2019, doi: 10.1109/ipdpsw.2019.00027.
LibreCat | DOI
 
[194]
2019 | Conference Paper | LibreCat-ID: 9913 | OA
Q. A. Ahmed, T. Wiersema, and M. Platzner, “Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan,” in Applied Reconfigurable Computing, Darmstadt, Germany, 2019, vol. 11444, pp. 127–136, doi: 10.1007/978-3-030-17227-5_10.
LibreCat | Files available | DOI | Download (ext.)
 
[193]
2019 | Journal Article | LibreCat-ID: 12871 | OA
M. Platzner and C. Plessl, “FPGAs im Rechenzentrum,” Informatik Spektrum, 2019, doi: 10.1007/s00287-019-01187-w.
LibreCat | Files available | DOI
 
[192]
2018 | Conference Paper | LibreCat-ID: 3362
A. Lösch, A. Wiens, and M. Platzner, “Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes,” in Proceedings of the International Conference on Architecture of Computing Systems (ARCS), 2018, vol. 10793, pp. 73–84.
LibreCat | Files available | DOI
 
[191]
2018 | Conference Paper | LibreCat-ID: 3373
T. Hansmeier, M. Platzner, and D. Andrews, “An FPGA/HMC-Based Accelerator for Resolution Proof Checking,” in ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Santorini, Greece, 2018, vol. 10824, pp. 153–165.
LibreCat | Files available | DOI
 
[190]
2018 | Preprint | LibreCat-ID: 3586
L. M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, and M. Platzner, “CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation,” Third Workshop on Approximate Computing (AxC 2018). .
LibreCat | Files available
 
[189]
2018 | Preprint | LibreCat-ID: 1165
L. M. Witschen, T. Wiersema, and M. Platzner, “Making the Case for Proof-carrying Approximate Circuits,” 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
LibreCat | Files available
 
[188]
2018 | Conference Paper | LibreCat-ID: 5547
A. Lösch and M. Platzner, “A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes,” in 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 2018.
LibreCat | Files available | DOI
 
[187]
2018 | Conference Paper | LibreCat-ID: 10598
M. Awais, H. Ghasemzadeh Mohammadi, and M. Platzner, “An MCTS-based Framework for Synthesis of Approximate Circuits,” in 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
LibreCat | DOI
 
[186]
2018 | Journal Article | LibreCat-ID: 12965
I. Ghribi, R. B. Abdallah, M. Khalgui, Z. Li, K. Alnowibet, and M. Platzner, “R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints,” IEEE Access, pp. 14078–14092, 2018.
LibreCat | DOI
 
[185]
2017 | Conference Paper | LibreCat-ID: 65
A. Lösch and M. Platzner, “reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements,” in Proceedings of the 28th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2017.
LibreCat | Files available | DOI
 
[184]
2017 | Journal Article | LibreCat-ID: 68
T. Isenberg, M. Platzner, H. Wehrheim, and T. Wiersema, “Proof-Carrying Hardware via Inductive Invariants,” ACM Transactions on Design Automation of Electronic Systems, no. 4, pp. 61:1--61:23, 2017.
LibreCat | Files available | DOI
 
[183]
2017 | Journal Article | LibreCat-ID: 10600
P. H.W. Leong et al., “The First 25 Years of the FPL Conference – Significant Papers,” ACM Transactions on Reconfigurable Technology and Systems, 2017.
LibreCat | DOI
 
[182]
2017 | Journal Article | LibreCat-ID: 10601
R. F. DeMara, M. Platzner, and M. Ottavi, “Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures (guest editorial),” IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing, 2017.
LibreCat | DOI
 
[181]
2017 | Journal Article | LibreCat-ID: 10611
J. Anwer and M. Platzner, “Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus,” Microprocessors and Microsystems, pp. 160–172, 2017.
LibreCat | DOI
 
[180]
2017 | Conference Paper | LibreCat-ID: 10630
A. Boschmann, G. Thombansen, L. M. Witschen, A. Wiens, and M. Platzner, “A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller,” in Design, Automation and Test in Europe (DATE), 2017.
LibreCat | DOI
 
[179]
2017 | Conference Paper | LibreCat-ID: 10672
N. Ho, I. I. Ashraf, P. Kaufmann, and M. Platzner, “Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor,” in Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
LibreCat | DOI
 
[178]
2017 | Conference Paper | LibreCat-ID: 10676
N. Ho, P. Kaufmann, and M. Platzner, “Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor,” in 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
LibreCat | DOI
 
[177]
2017 | Conference Paper | LibreCat-ID: 10761
P. Kaufmann, N. Ho, and M. Platzner, “Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches,” in Adaptive Hardware and Systems (AHS), 2017.
LibreCat | DOI
 
[176]
2017 | Conference Paper | LibreCat-ID: 10780
Z. Guettatfi, P. Hübner, M. Platzner, and B. Rinner, “Computational self-awareness as design approach for visual sensor nodes,” in 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
LibreCat | DOI
 
[175]
2017 | Conference Paper | LibreCat-ID: 14893
I. Ghribi, R. B. Abdallah, M. Khalgui, and M. Platzner, “I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems,” in Communications in Computer and Information Science, 2017.
LibreCat | DOI
 
[174]
2016 | Journal Article | LibreCat-ID: 222
T. Wiersema, A. Bockhorn, and M. Platzner, “An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip,” Computers & Electrical Engineering, pp. 112--122, 2016.
LibreCat | Files available | DOI
 
[173]
2016 | Conference Paper | LibreCat-ID: 5812
A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2016.
LibreCat | DOI
 
[172]
2016 | Conference Paper | LibreCat-ID: 10622
J. Anwer and M. Platzner, “Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs,” in Euromicro Conference on Digital System Design (DSD), 2016.
LibreCat | DOI
 
[171]
2016 | Journal Article | LibreCat-ID: 10661
T. Graf and M. Platzner, “Adaptive playouts for online learning of policies during Monte Carlo Tree Search,” Journal Theoretical Computer Science, vol. 644, pp. 53–62, 2016.
LibreCat | DOI
 
[170]
2016 | Conference Paper | LibreCat-ID: 10712
S. Meisner and M. Platzner, “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level,” in Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on, 2016, pp. 1–8.
LibreCat | DOI
 
[169]
2016 | Conference Paper | LibreCat-ID: 10766
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “RCo-Design: New Visual Environment for Reconfigurable Embedded Systems,” in Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
LibreCat
 
[168]
2016 | Conference Paper | LibreCat-ID: 10768
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Co-design Methodology for Real-time Embedded Systems,” in Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
LibreCat
 
[167]
2016 | Book (Editor) | LibreCat-ID: 12972
P. R. Lewis, M. Platzner, B. Rinner, J. Tørresen, and X. Yao, Eds., Self-aware Computing Systems: An Engineering Approach. Cham: Springer, 2016.
LibreCat | DOI
 
[166]
2016 | Conference Paper | LibreCat-ID: 15873
A. Boschmann, A. Agne, L. M. Witschen, G. Thombansen, F. Kraus, and M. Platzner, “FPGA-based acceleration of high density myoelectric signal processing,” in 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), Mexiko City, Mexiko, 2016.
LibreCat | DOI
 
[165]
2016 | Conference Paper | LibreCat-ID: 13151
T. Graf and M. Platzner, “Using Deep Convolutional Neural Networks in Monte Carlo Tree Search,” in Computer and Games, 2016.
LibreCat
 
[164]
2016 | Conference Paper | LibreCat-ID: 13152
T. Graf and M. Platzner, “Monte-Carlo Simulation Balancing Revisited,” in IEEE Computational Intelligence and Games, 2016.
LibreCat
 
[163]
2016 | Conference Paper | LibreCat-ID: 132
T. Wiersema and M. Platzner, “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware,” in Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
LibreCat | Files available | DOI
 
[162]
2016 | Book Chapter | LibreCat-ID: 29
A. Agne, M. Platzner, C. Plessl, M. Happe, and E. Lübbers, “ReconOS,” in FPGAs for Software Programmers, D. Koch, F. Hannig, and D. Ziener, Eds. Cham: Springer International Publishing, 2016, pp. 227–244.
LibreCat | DOI
 
[161]
2016 | Book Chapter | LibreCat-ID: 156
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-aware Compute Nodes,” in Self-aware Computing Systems, Cham: Springer International Publishing, 2016, pp. 145–165.
LibreCat | Files available | DOI
 
[160]
2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
LibreCat | Files available
 
[159]
2015 | Conference Paper | LibreCat-ID: 269
T. Wiersema, S. Wu, and M. Platzner, “On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach,” in Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
LibreCat | Files available | DOI
 
[158]
2015 | Conference Paper | LibreCat-ID: 10673
N. Ho, A. F. Ahmed, P. Kaufmann, and M. Platzner, “Microarchitectural optimization by means of reconfigurable and evolvable cache mappings,” in Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
LibreCat | DOI
 
[157]
2015 | Conference Paper | LibreCat-ID: 10711
S. Meisner and M. Platzner, “Comparison of thread signatures for error detection in hybrid multi-cores,” in Field Programmable Technology (FPT), 2015 International Conference on, 2015, pp. 212–215.
LibreCat | DOI
 
[156]
2015 | Conference Paper | LibreCat-ID: 10765
P. H.W. Leong et al., “Significant papers from the first 25 years of the FPL conference,” in Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), 2015, pp. 1–3.
LibreCat | DOI
 
[155]
2015 | Conference Paper | LibreCat-ID: 10767
I. Ghribi, R. Ben Abdallah, M. Khalgui, and M. Platzner, “New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software,” in Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.
LibreCat
 
[154]
2015 | Conference Paper | LibreCat-ID: 13153
T. Graf and M. Platzner, “Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning,” in Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, 2015, pp. 1–11.
LibreCat | DOI
 
[153]
2015 | Journal Article | LibreCat-ID: 1768
C. Plessl, M. Platzner, and P. J. Schreier, “Aktuelles Schlagwort: Approximate Computing,” Informatik Spektrum, no. 5, pp. 396–399, 2015, doi: 10.1007/s00287-015-0911-z.
LibreCat | DOI
 
[152]
2014 | Conference Paper | LibreCat-ID: 347
S. Meisner and M. Platzner, “Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection,” in Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC), 2014, pp. 283–290.
LibreCat | Files available | DOI
 
[151]
2014 | Conference Paper | LibreCat-ID: 1782
T. Graf, L. Schaefers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go,” in Proc. Conf. on Computers and Games (CG), 2014, no. 8427, pp. 14–25.
LibreCat | DOI
 
[150]
2014 | Conference Paper | LibreCat-ID: 399
T. Wiersema, S. Drzevitzky, and M. Platzner, “Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring,” in Proceedings of the International Conference on Field-Programmable Technology (FPT), 2014, pp. 167–174.
LibreCat | Files available | DOI
 
[149]
2014 | Conference Paper | LibreCat-ID: 408
M.-C. Jakobs, M. Platzner, T. Wiersema, and H. Wehrheim, “Integrating Software and Hardware Verification,” in Proceedings of the 11th International Conference on Integrated Formal Methods (iFM), 2014, pp. 307–322.
LibreCat | Files available | DOI
 
[148]
2014 | Conference Paper | LibreCat-ID: 433
T. Wiersema, A. Bockhorn, and M. Platzner, “Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2014, pp. 1–6.
LibreCat | Files available | DOI
 
[147]
2014 | Journal Article | LibreCat-ID: 10602
L. Schaefers and M. Platzner, “A Novel Technique and its Application to Computer Go,” IEEE Transactions on Computational Intelligence and AI in Games, vol. 6, no. 3, pp. 361–374, 2014.
LibreCat | DOI
 
[146]
2014 | Journal Article | LibreCat-ID: 10603
H. Giefers and M. Platzner, “An FPGA-based Reconfigurable Mesh Many-Core,” IEEE Transactions on Computers, vol. 63, no. 12, pp. 2919–2932, 2014.
LibreCat | DOI
 
[145]
2014 | Conference Paper | LibreCat-ID: 10621
J. Anwer, M. Platzner, and S. Meisner, “FPGA Redundancy Configurations: An Automated Design Space Exploration,” in Reconfigurable Architectures Workshop (RAW), 2014.
LibreCat | DOI
 
[144]
2014 | Conference Paper | LibreCat-ID: 10632
A. Boschmann and M. Platzner, “A computer vision-based approach to high density EMG pattern recognition using structural similarity,” in Proc. MyoElectric Controls Symposium (MEC), 2014.
LibreCat
 
[143]
2014 | Conference Paper | LibreCat-ID: 10633
A. Boschmann and M. Platzner, “Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2014.
LibreCat
 
[142]
2014 | Conference Paper | LibreCat-ID: 10674
N. Ho, P. Kaufmann, and M. Platzner, “A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms,” in 24th Intl. Conf. on Field Programmable Logic and Applications (FPL), 2014, pp. 1–4.
LibreCat | DOI
 
[141]
2014 | Conference Paper | LibreCat-ID: 10677
N. Ho, P. Kaufmann, and M. Platzner, “Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure,” in 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES), 2014, pp. 31–37.
LibreCat | DOI
 
[140]
2014 | Conference Paper | LibreCat-ID: 10764
J. Anwer and M. Platzner, “Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs,” in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014, pp. 177–184.
LibreCat | DOI
 
[139]
2014 | Conference Paper | LibreCat-ID: 13154
T. Graf and M. Platzner, “Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go,” in 2014 IEEE Conference on Computational Intelligence and Games, 2014, pp. 1–8.
LibreCat | DOI
 
[138]
2014 | Book Chapter | LibreCat-ID: 335
M. Platzner and C. Plessl, “Verschiebungen an der Grenze zwischen Hardware und Software,” in Logiken strukturbildender Prozesse: Automatismen, J. Künsemöller, N. O. Eke, L. Foit, and T. Kaerlein, Eds. Paderborn: Wilhelm Fink, 2014, pp. 123–144.
LibreCat | Files available
 
[137]
2014 | Journal Article | LibreCat-ID: 363
A. Agne, H. Hangmann, M. Happe, M. Platzner, and C. Plessl, “Seven Recipes for Setting Your FPGA on Fire – A Cookbook on Heat Generators,” Microprocessors and Microsystems, vol. 38, no. 8, Part B, pp. 911–919, 2014, doi: 10.1016/j.micpro.2013.12.001.
LibreCat | Files available | DOI
 
[136]
2014 | Journal Article | LibreCat-ID: 365
A. Agne, M. Happe, A. Lösch, C. Plessl, and M. Platzner, “Self-awareness as a Model for Designing and Operating Heterogeneous Multicores,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 7, no. 2, Art. no. 13, 2014, doi: 10.1145/2617596.
LibreCat | Files available | DOI
 
[135]
2014 | Journal Article | LibreCat-ID: 328
A. Agne et al., “ReconOS - An Operating System Approach for Reconfigurable Computing,” IEEE Micro, vol. 34, no. 1, pp. 60–71, 2014, doi: 10.1109/MM.2013.110.
LibreCat | Files available | DOI
 
[134]
2013 | Journal Article | LibreCat-ID: 10604
M. Happe, E. Lübbers, and M. Platzner, “A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking,” International Journal of Real-time Image Processing, vol. 8, no. 1, pp. 95–110, 2013.
LibreCat | DOI
 
[133]
2013 | Conference Paper | LibreCat-ID: 10620
J. Anwer, S. Meisner, and M. Platzner, “Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime,” in Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference on, 2013, pp. 1–6.
LibreCat | DOI
 
[132]
2013 | Conference Paper | LibreCat-ID: 10634
A. Boschmann, B. Nofen, and M. Platzner, “Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2013.
LibreCat
 
[131]
2013 | Conference Paper | LibreCat-ID: 10635
A. Boschmann and M. Platzner, “Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array,” in Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC), 2013.
LibreCat
 
[130]
2013 | Journal Article | LibreCat-ID: 10684
P. Kaufmann, K. Glette, T. Gruber, M. Platzner, J. Torresen, and B. Sick, “Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers,” IEEE Transactions on Evolutionary Computation, vol. 17, no. 1, pp. 46–63, 2013.
LibreCat | DOI
 
[129]
2013 | Conference Paper | LibreCat-ID: 13645
T. Graf, L. Schäfers, and M. Platzner, “On Semeai Detection in Monte-Carlo Go.,” in Proceedings of the International Conference on Computers and Games (CG), 2013.
LibreCat
 
[128]
2013 | Conference Paper | LibreCat-ID: 505
M. Happe, P. Kling, C. Plessl, M. Platzner, and F. Meyer auf der Heide, “On-The-Fly Computing: A Novel Paradigm for Individualized IT Services,” 2013, doi: 10.1109/ISORC.2013.6913232.
LibreCat | Files available | DOI
 
[127]
2012 | Conference Paper | LibreCat-ID: 2103
M. Wistuba, L. Schaefers, and M. Platzner, “Comparison of Bayesian Move Prediction Systems for Computer Go,” in Proc. IEEE Conf. on Computational Intelligence and Games (CIG), 2012, pp. 91–99.
LibreCat | DOI
 
[126]
2012 | Misc | LibreCat-ID: 587
C. Plessl, M. Platzner, A. Agne, M. Happe, and E. Lübbers, Programming models for reconfigurable heterogeneous multi-cores. Awareness Magazine, 2012.
LibreCat | Files available
 
[125]
2012 | Conference Paper | LibreCat-ID: 10636
A. Boschmann and M. Platzner, “Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array,” in Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC), 2012.
LibreCat
 
[124]
2012 | Journal Article | LibreCat-ID: 10685
P. Kaufmann, K. Glette, M. Platzner, and J. Torresen, “Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture,” International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), vol. 3, no. 4, pp. 17–31, 2012.
LibreCat | DOI
 
[123]
2012 | Misc | LibreCat-ID: 10723
M. Platzner, A. Boschmann, and P. Kaufmann, Wieder natürlich gehen und greifen. 2012, pp. 6–11.
LibreCat
 
[122]
2012 | Misc | LibreCat-ID: 13462
P. Lewis, M. Platzner, and X. Yao, An outlook for self-awareness in computing systems. Awareness Magazine, 2012.
LibreCat
 
[121]
2012 | Journal Article | LibreCat-ID: 2108
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators,” Microprocessors and Microsystems, vol. 36, no. 2, pp. 110–126, 2012, doi: 10.1016/j.micpro.2011.04.002.
LibreCat | DOI
 
[120]
2012 | Conference Paper | LibreCat-ID: 609
M. Happe, A. Agne, C. Plessl, and M. Platzner, “Hardware/Software Platform for Self-aware Compute Nodes,” in Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), 2012, pp. 8–9.
LibreCat | Files available
 
[119]
2011 | Conference Paper | LibreCat-ID: 2191
T. Kenter, C. Plessl, M. Platzner, and M. Kauschke, “Estimation and Partitioning for CPU-Accelerator Architectures,” in Intel European Research and Innovation Conference, 2011.
LibreCat
 
[118]
2011 | Book Chapter | LibreCat-ID: 2202
C. Plessl and M. Platzner, “Hardware Virtualization on Dynamically Reconfigurable Embedded Processors,” in Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, M. Khalgui and H.-M. Hanisch, Eds. Hershey, PA, USA: IGI Global, 2011.
LibreCat | DOI
 
[117]
2011 | Conference Paper | LibreCat-ID: 2204
T. Graf, U. Lorenz, M. Platzner, and L. Schaefers, “Parallel Monte-Carlo Tree Search for HPC Systems,” in Proc. European Conf. on Parallel Processing (Euro-Par), 2011, vol. 6853.
LibreCat | DOI
 
[116]
2011 | Conference Paper | LibreCat-ID: 666
S. Drzevitzky and M. Platzner, “Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach,” in Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011, pp. 58–65.
LibreCat | Files available | DOI
 
[115]
2011 | Conference Paper | LibreCat-ID: 10637
A. Boschmann, P. Kaufmann, and M. Platzner, “Accurate gait phase detection using surface electromyographic signals and support vector machines,” in Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT), 2011.
LibreCat
 
[114]
2011 | Conference Paper | LibreCat-ID: 10638
A. Boschmann, M. Platzner, M. Robrecht, M. Hahn, and M. Winkler, “Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems,” in Proc. MyoElectric Controls Symposium (MEC), 2011.
LibreCat
 
[113]
2011 | Book Chapter | LibreCat-ID: 10687
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Evolution of Embedded Systems,” in Organic Computing---A Paradigm Shift for Complex Systems, vol. 1, C. Müller-Schloer, H. Schmeck, and T. Ungerer, Eds. Springer Basel, 2011, pp. 193–206.
LibreCat
 
[112]
2011 | Book Chapter | LibreCat-ID: 10737
L. Sekanina, J. A. Walker, P. Kaufmann, C. Plessl, and M. Platzner, “Evolution of Electronic Circuits,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 125–179.
LibreCat
 
[111]
2011 | Book Chapter | LibreCat-ID: 10748
J. A. Walker, J. F. Miller, P. Kaufmann, and M. Platzner, “Problem Decomposition in Cartesian Genetic Programming,” in Cartesian Genetic Programming, Springer Berlin Heidelberg, 2011, pp. 35–99.
LibreCat
 
[110]
2011 | Conference Paper | LibreCat-ID: 13643
A. Agne, M. Platzner, and E. Lübbers, “Memory Virtualization for Multithreaded Reconfigurable Hardware,” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), 2011, pp. 185–188.
LibreCat | DOI
 
[109]
2011 | Conference Paper | LibreCat-ID: 2200
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures,” in Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 2011, pp. 177–180, doi: 10.1145/1950413.1950448.
LibreCat | DOI
 
[108]
2011 | Journal Article | LibreCat-ID: 2201
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study,” Int. Journal of Recon- figurable Computing (IJRC), 2011, doi: 10.1155/2011/760954.
LibreCat | DOI
 
[107]
2010 | Conference Paper | LibreCat-ID: 2994
W. Schäfer et al., “Engineering self-coordinating software intensive systems,” in Proceedings of the FSE/SDP workshop on Future of software engineering research - FoSER ’10, 2010.
LibreCat | DOI
 
[106]
2010 | Journal Article | LibreCat-ID: 10605
S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification,” International Journal of Reconfigurable Computing, vol. 2010, 2010.
LibreCat | DOI
 
[105]
2010 | Conference Paper | LibreCat-ID: 10683
P. Kaufmann, K. Englehart, and M. Platzner, “Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms,” in International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2010, pp. 6357–6360.
LibreCat
 
[104]
2010 | Conference Paper | LibreCat-ID: 10686
P. Kaufmann, T. Knieper, and M. Platzner, “A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers,” in IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC), 2010, pp. 541–548.
LibreCat
 
[103]
2010 | Journal Article | LibreCat-ID: 10694
U. Kebschull, M. Platzner, and J. Teich, “Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial),” IET Computers Digital Techniques, vol. 4, no. 3, pp. 157–158, 2010.
LibreCat | DOI
 
[102]
2010 | Conference Paper | LibreCat-ID: 10699
T. Knieper, P. Kaufmann, K. Glette, M. Platzner, and J. Torresen, “Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2010, vol. 6274, pp. 250–261.
LibreCat
 
[101]
2010 | Book Chapter | LibreCat-ID: 10704
E. Lübbers and M. Platzner, “ReconOS: An Operating System for Dynamically Reconfigurable Hardware,” in Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, M. Platzner, J. Teich, and N. Wehn, Eds. Springer-Verlag GmbH, 2010, pp. 269–290.
LibreCat | DOI
 
[100]
2010 | Book (Editor) | LibreCat-ID: 10763
M. Platzner, J. Teich, and N. Wehn, Eds., Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. Springer-Verlag GmbH, 2010.
LibreCat | DOI
 
[99]
2010 | Conference Paper | LibreCat-ID: 13640
H. Giefers and M. Platzner, “A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier,” in Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), 2010.
LibreCat
 
[98]
2010 | Conference Paper | LibreCat-ID: 13641
W. Schäfer et al., “Engineering Self-Coordinating Software Intensive Systems,” in Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER), 2010, pp. 321–324.
LibreCat
 
[97]
2010 | Conference Paper | LibreCat-ID: 13642
H. Giefers and M. Platzner, “A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics,” in Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010.
LibreCat
 
[96]
2010 | Conference Paper | LibreCat-ID: 2223
E. Lübbers, M. Platzner, C. Plessl, A. Keller, and B. Plattner, “Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2010, pp. 225–231.
LibreCat
 
[95]
2010 | Conference Paper | LibreCat-ID: 2206
A. Keller, B. Plattner, E. Lübbers, M. Platzner, and C. Plessl, “Reconfigurable Nodes for Future Networks,” in Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 2010, pp. 372–376, doi: 10.1109/GLOCOMW.2010.5700341.
LibreCat | DOI
 
[94]
2010 | Conference Paper | LibreCat-ID: 2228
T. Kenter, M. Platzner, C. Plessl, and M. Kauschke, “Performance Estimation for the Exploration of CPU-Accelerator Architectures,” in Proc. Workshop on Architectural Research Prototyping (WARP), International Symposium on Computer Architecture (ISCA), 2010.
LibreCat
 
[93]
2009 | Conference Paper | LibreCat-ID: 10639
A. Boschmann, P. Kaufmann, M. Platzner, and M. Winkler, “Towards multi-movement hand prostheses: Combining adaptive classification with high precision sockets,” in Proc. Technically Assisted Rehabilitation (TAR), 2009.
LibreCat
 
[92]
2009 | Journal Article | LibreCat-ID: 10703
E. Lübbers and M. Platzner, “ReconOS: Multithreaded Programming for Reconfigurable Computers,” ACM Transactions on Embedded Computing Systems, vol. 9, no. 1, pp. 8:1-8:33, 2009.
LibreCat | DOI
 
[91]
2009 | Conference Paper | LibreCat-ID: 13632
M. Happe, E. Lübbers, and M. Platzner, “A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms,” in Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2009.
LibreCat
 
[90]
2009 | Conference Paper | LibreCat-ID: 13634
H. Giefers and M. Platzner, “Towards Models for Many-Cores: The Case for the Reconfigurable Mesh,” in Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), 2009.
LibreCat
 
[89]
2009 | Conference Paper | LibreCat-ID: 13635
H. Giefers and M. Platzner, “ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores,” in Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, 2009.
LibreCat
 
[88]
2009 | Conference Paper | LibreCat-ID: 13636
E. Lübbers and M. Platzner, “Cooperative Multithreading in Dynamically Reconfigurable Systems,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009.
LibreCat
 
[87]
2009 | Conference Paper | LibreCat-ID: 13637
H. Giefers and M. Platzner, “Program-driven Fine-grained Power Management for the Reconfigurable Mesh,” in Proceedings of the 19th International Workshop on Field Programmable Logic and Applications (FPL) , 2009.
LibreCat
 
[86]
2009 | Conference Paper | LibreCat-ID: 13638
M. Happe, E. Lübbers, and M. Platzner, “An adaptive Sequential Monte Carlo framework with runtime HW/SW repartitioning,” in Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), 2009.
LibreCat | DOI
 
[85]
2009 | Conference Paper | LibreCat-ID: 13639
S. Drzevitzky, U. Kastens, and M. Platzner, “Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules,” in Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), 2009.
LibreCat
 
[84]
2009 | Conference Paper | LibreCat-ID: 2350
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2009, pp. 275–278, doi: 10.1109/FCCM.2009.25.
LibreCat | DOI
 
[83]
2009 | Conference Paper | LibreCat-ID: 2262
P. Kaufmann, C. Plessl, and M. Platzner, “EvoCaches: Application-specific Adaptation of Cache Mapping,” in Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2009, pp. 11–18.
LibreCat
 
[82]
2009 | Conference Paper | LibreCat-ID: 2238
T. Schumacher, T. Süß, C. Plessl, and M. Platzner, “Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000,” in Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 2009, pp. 119–124, doi: 10.1109/ReConFig.2009.32.
LibreCat | DOI
 
[81]
2009 | Conference Paper | LibreCat-ID: 2261
T. Schumacher, C. Plessl, and M. Platzner, “An Accelerator for k-th Nearest Neighbor Thinning Based on the IMORC Infrastructure,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2009, pp. 338–344.
LibreCat
 
[80]
2008 | Conference Paper | LibreCat-ID: 2365
M. Platzner et al., “The GOmputer: Accelerating GO with FPGAs,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat
 
[79]
2008 | Conference Paper | LibreCat-ID: 10653
K. Glette, T. Gruber, P. Kaufmann, J. Torresen, B. Sick, and M. Platzner, “Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control,” in IEEE Adaptive Hardware and Systems (AHS), 2008, pp. 32–39.
LibreCat
 
[78]
2008 | Conference Paper | LibreCat-ID: 10656
K. Glette, J. Torresen, P. Kaufmann, and M. Platzner, “A Comparison of Evolvable Hardware Architectures for Classification Tasks,” in IEEE Intl. Conf. on Evolvable Systems (ICES), 2008, vol. 5216, pp. 22–33.
LibreCat
 
[77]
2008 | Preprint | LibreCat-ID: 10690
J. Torresen, K. Glette, M. Platzner, and P. Kaufmann, “Evolvable Hardware - Tutorial at Architecture of Computing Systems (ARCS).” 2008.
LibreCat
 
[76]
2008 | Conference Paper | LibreCat-ID: 10691
P. Kaufmann and M. Platzner, “Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming,” in Genetic and Evolutionary Computation (GECCO), 2008, pp. 1219–1226.
LibreCat
 
[75]
2008 | Conference Paper | LibreCat-ID: 10698
T. Knieper, B. Defo, P. Kaufmann, and M. Platzner, “On Robust Evolution of Digital Hardware,” in Biologically Inspired Collaborative Computing (BICC), 2008, vol. 268, pp. 2313–222.
LibreCat
 
[74]
2008 | Conference Paper | LibreCat-ID: 13629
H. Giefers and M. Platzner, “Realizing Reconfigurable Mesh Algorithms on Softcore Arrays,” in Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), 2008.
LibreCat
 
[73]
2008 | Conference Paper | LibreCat-ID: 13630
E. Lübbers and M. Platzner, “Communication and Synchronization in Multithreaded Reconfigurable Computing Systems,” in Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008.
LibreCat
 
[72]
2008 | Conference Paper | LibreCat-ID: 13631
E. Lübbers and M. Platzner, “A portable abstraction layer for hardware threads,” in Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), 2008.
LibreCat | DOI
 
[71]
2008 | Conference Paper | LibreCat-ID: 2364
T. Schumacher, R. Meiche, P. Kaufmann, E. Lübbers, C. Plessl, and M. Platzner, “A Hardware Accelerator for k-th Nearest Neighbor Thinning,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2008, pp. 245–251.
LibreCat
 
[70]
2008 | Conference Paper | LibreCat-ID: 2372
T. Schumacher, C. Plessl, and M. Platzner, “IMORC: An infrastructure for performance monitoring and optimization of reconfigurable computers,” 2008.
LibreCat
 
[69]
2007 | Conference Paper | LibreCat-ID: 6508
P. Kaufmann and M. Platzner, “MOVES: A Modular Framework for Hardware Evolution,” in Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), Edinburgh, UK, 2007, pp. 447–454.
LibreCat | DOI
 
[68]
2007 | Journal Article | LibreCat-ID: 10625
N. Bergmann, M. Platzner, and J. Teich, “Dynamically Reconfigurable Architectures (editorial),” {EURASIP} Journal on Embedded Systems, vol. 2007, pp. 1–2, 2007.
LibreCat | DOI
 
[67]
2007 | Journal Article | LibreCat-ID: 10646
K. Danne, R. Mühlenbernd, and M. Platzner, “Server-based execution of periodic tasks on dynamically reconfigurable hardware,” IET Computers Digital Techniques, vol. 1, no. 4, pp. 295–302, 2007.
LibreCat | DOI
 
[66]
2007 | Conference Paper | LibreCat-ID: 10689
P. Kaufmann and M. Platzner, “Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution,” in Architecture of Computing Systems (ARCS), 2007, vol. 4415, pp. 199–208.
LibreCat
 
[65]
2007 | Conference Paper | LibreCat-ID: 10735
T. Schumacher, E. Lübbers, P. Kaufmann, and M. Platzner, “Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster,” in Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing: Architectures, Algorithms and Applications (PARCO), 2007, vol. 15, pp. 749–756.
LibreCat
 
[64]
2007 | Conference Paper | LibreCat-ID: 13627
H. Giefers and M. Platzner, “A Many-Core Implementation Based on the Reconfigurable Mesh Model,” in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), 2007.
LibreCat | DOI
 
[63]
2007 | Conference Paper | LibreCat-ID: 13628
E. Lübbers and M. Platzner, “ReconOS: An RTOS Supporting Hard-and Software Threads,” in Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), 2007.
LibreCat | DOI
 
[62]
2006 | Conference Paper | LibreCat-ID: 2401
C. Plessl, M. Platzner, and L. Thiele, “Optimal Temporal Partitioning based on Slowdown and Retiming,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2006, pp. 345–348.
LibreCat | DOI
 
[61]
2006 | Conference Paper | LibreCat-ID: 10688
P. Kaufmann and M. Platzner, “Multi-objective Intrinsic Hardware Evolution,” in Intl. Conf. Military Applications of Programmable Logic Devices (MAPLD), 2006.
LibreCat
 
[60]
2006 | Conference Paper | LibreCat-ID: 13624
K. Danne, R. Mühlenbernd, and M. Platzner, “Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions,” in Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), 2006.
LibreCat
 
[59]
2006 | Conference Paper | LibreCat-ID: 13625
K. Danne and M. Platzner, “An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices,” in In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), 2006.
LibreCat
 
[58]
2006 | Conference Paper | LibreCat-ID: 13626
K. Danne and M. Platzner, “Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware,” in Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), 2006.
LibreCat
 
[57]
2005 | Conference Paper | LibreCat-ID: 2411
C. Plessl and M. Platzner, “Zippy – A coarse-grained reconfigurable array with support for hardware virtualization,” in Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 2005, pp. 213–218.
LibreCat | DOI
 
[56]
2005 | Journal Article | LibreCat-ID: 2412
R. Enzler, C. Plessl, and M. Platzner, “System-level performance evaluation of reconfigurable processors,” Microprocessors and Microsystems, vol. 29, no. 2–3, pp. 63–73, 2005.
LibreCat | DOI
 
[55]
2005 | Conference Paper | LibreCat-ID: 13621
K. Danne and M. Platzner, “Periodic real-time scheduling for FPGA computers,” in Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2005.
LibreCat | DOI
 
[54]
2005 | Conference Paper | LibreCat-ID: 13622
K. Danne and M. Platzner, “Memory-demanding Periodic Real-time Applications on FPGA Computers,” in Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-time Systems (ECRTS), 2005.
LibreCat
 
[53]
2005 | Conference Paper | LibreCat-ID: 13623
K. Danne and M. Platzner, “A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware,” in Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), 2005.
LibreCat | DOI
 
[52]
2004 | Conference Paper | LibreCat-ID: 2415
C. Plessl and M. Platzner, “Virtualization of Hardware – Introduction and Survey,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004, pp. 63–69.
LibreCat
 
[51]
2004 | Journal Article | LibreCat-ID: 10742
C. Steiger, H. Walder, and M. Platzner, “Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks,” {IEEE} Transactions on Computers, vol. 53, no. 11, pp. 1393–1407, 2004.
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[50]
2004 | Conference Paper | LibreCat-ID: 13618
H. Walder and M. Platzner, “A Runtime Environment for Reconfigurable Hardware Operating Systems,” in Proceedings of the 14th International Conference on Field Programmable Logic and Applications (FPL), 2004, pp. 831–835.
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[49]
2004 | Conference Paper | LibreCat-ID: 13619
H. Walder, S. Nobs, and M. Platzner, “XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems,” in Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2004.
LibreCat
 
[48]
2004 | Conference Paper | LibreCat-ID: 13620
M. Dyer, M. Platzner, and L. Thiele, “Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine,” in Proceedings 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2004.
LibreCat | DOI
 
[47]
2003 | Conference Paper | LibreCat-ID: 2418
C. Plessl and M. Platzner, “TKDM – A Reconfigurable Co-processor in a PC’s Memory Slot,” in Proc. Int. Conf. on Field Programmable Technology (ICFPT), 2003, pp. 252–259.
LibreCat | DOI
 
[46]
2003 | Journal Article | LibreCat-ID: 2419
C. Plessl et al., “The Case for Reconfigurable Hardware in Wearable Computing,” Personal and Ubiquitous Computing, vol. 7, no. 5, pp. 299–308, 2003.
LibreCat | DOI
 
[45]
2003 | Journal Article | LibreCat-ID: 2420
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” Journal of Supercomputing, vol. 26, no. 2, pp. 109–129, 2003.
LibreCat | DOI
 
[44]
2003 | Conference Paper | LibreCat-ID: 2421
R. Enzler, C. Plessl, and M. Platzner, “Virtualizing Hardware with Multi-Context Reconfigurable Arrays,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2003, vol. 2778, pp. 151–160.
LibreCat | DOI
 
[43]
2003 | Conference Paper | LibreCat-ID: 2422
R. Enzler, C. Plessl, and M. Platzner, “Co-simulation of a Hybrid Multi-Context Architecture,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 174–180.
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[42]
2003 | Conference Paper | LibreCat-ID: 13612
H. Walder and M. Platzner, “Online scheduling for block-partitioned reconfigurable devices,” in Proceedings Design, Automation and Test in Europe Conference (DATE), 2003, pp. 290–295.
LibreCat | DOI
 
[41]
2003 | Conference Paper | LibreCat-ID: 13613
H. Walder, C. Steiger, and M. Platzner, “Fast online task placement on FPGAs: free space partitioning and 2D-hashing,” in Proceedings International Parallel and Distributed Processing Symposium, 2003.
LibreCat | DOI
 
[40]
2003 | Conference Paper | LibreCat-ID: 13614
H. Walder and M. Platzner, “Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations,” in Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2003, pp. 284–287.
LibreCat
 
[39]
2003 | Conference Paper | LibreCat-ID: 13615
C. Steiger, H. Walder, and M. Platzner, “Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices,” in Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL), 2003, pp. 575–584.
LibreCat | DOI
 
[38]
2003 | Conference Paper | LibreCat-ID: 13617
C. Steiger, H. Walder, M. Platzner, and L. Thiele, “Online scheduling and placement of real-time tasks to partially reconfigurable devices,” in Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), 2003, pp. 252–235.
LibreCat | DOI
 
[37]
2002 | Conference Paper | LibreCat-ID: 2423
C. Plessl, R. Enzler, H. Walder, J. Beutel, M. Platzner, and L. Thiele, “Reconfigurable Hardware in Wearable Computing Nodes,” in Proc. Int. Symp. on Wearable Computers (ISWC), 2002, pp. 215–222.
LibreCat | DOI
 
[36]
2002 | Conference Paper | LibreCat-ID: 2424
M. Dyer, C. Plessl, and M. Platzner, “Partially Reconfigurable Cores for Xilinx Virtex,” in Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), 2002, vol. 2438, pp. 292–301.
LibreCat | DOI
 
[35]
2002 | Conference Paper | LibreCat-ID: 2425
C. Plessl and M. Platzner, “Custom Computing Machines for the Set Covering Problem,” in Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), 2002, pp. 163–172.
LibreCat | DOI
 
[34]
2002 | Journal Article | LibreCat-ID: 10651
M. Eisenring and M. Platzner, “A Framework for Run-time Reconfigurable Systems,” The Journal of Supercomputing, vol. 21, no. 2, pp. 145–159, 2002.
LibreCat | DOI
 
[33]
2002 | Conference Paper | LibreCat-ID: 13611
H. Walder and M. Platzner, “Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform,” in Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2002, pp. 24–30.
LibreCat
 
[32]
2001 | Conference Paper | LibreCat-ID: 2428
C. Plessl and M. Platzner, “Instance-Specific Accelerators for Minimum Covering,” in Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 2001, pp. 85–91.
LibreCat
 
[31]
2001 | Conference Paper | LibreCat-ID: 2432
R. Enzler, M. Platzner, C. Plessl, L. Thiele, and G. Tröster, “Reconfigurable Processors for Handhelds and Wearables: Application Analysis,” in Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III, 2001, vol. 4525, pp. 135–146.
LibreCat | DOI
 
[30]
2001 | Journal Article | LibreCat-ID: 10713
O. Mencer, M. Platzner, M. Morf, and M. J. Flynn, “Object-oriented domain specific compilers for programming FPGAs,” {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, vol. 9, no. 1, pp. 205–210, 2001.
LibreCat | DOI
 
[29]
2001 | Misc | LibreCat-ID: 13463
R. Enzler and M. Platzner, Dynamically Reconfigurable Processors. TELEMATIK, Zeitschrift des Telematik-Ingebieur-Verbandes 7(1), 2001.
LibreCat
 
[28]
2000 | Journal Article | LibreCat-ID: 6507
M. Platzner, “Reconfigurable accelerators for combinatorial problems,” Computer, vol. 33, no. 4, pp. 58–60, 2000.
LibreCat | DOI
 
[27]
2000 | Journal Article | LibreCat-ID: 10606
M. Eisenring and M. Platzner, “Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems,” IEE Proceedings -- Computers & Digital Techniques, vol. 147, pp. 159–165, 2000.
LibreCat | DOI
 
[26]
2000 | Journal Article | LibreCat-ID: 10725
M. Platzner, B. Rinner, and R. Weiss, “Toward embedded qualitative simulation: a specialized computer architecture for QSim,” IEEE Intelligent Systems, vol. 15, no. 2, pp. 62–68, 2000.
LibreCat | DOI
 
[25]
2000 | Conference Paper | LibreCat-ID: 13609
M. H. Eisenring and M. Platzner, “An Implementation Framework for Run-time Reconfigurable Systems,” in Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), 2000, pp. 151–157.
LibreCat
 
[24]
2000 | Conference Paper | LibreCat-ID: 13610
M. Eisenring and M. Platzner, “Optimization of Run-time Reconfigurable Embedded Systems,” in Proceedings of the 10th International Workshop on Field Programmable Logic and Applications (FPL), 2000, pp. 565–574.
LibreCat
 
[23]
1999 | Conference Paper | LibreCat-ID: 13607
O. Mencer and M. Platzner, “Dynamic circuit generation for Boolean satisfiability in an object-oriented design environment,” in Proceedings of the 32nd Annual Hawaii International Conference on Systems Sciences (HICSS-32), 1999.
LibreCat | DOI
 
[22]
1999 | Conference Paper | LibreCat-ID: 13608
M. Eisenring, M. Platzner, and L. Thiele, “Communication Synthesis for Reconfigurable Embedded Systems,” in Proceedings of the 9th International Workshop on Field Programmable Logic and Applications (FPL), 1999, vol. 1673, pp. 205–214.
LibreCat | DOI
 
[21]
1998 | Journal Article | LibreCat-ID: 10607
M. Platzner, “Reconfigurable Computer Architectures,” e&i Elektrotechnik und Informationstechnik, vol. 115, pp. 143–148, 1998.
LibreCat
 
[20]
1998 | Journal Article | LibreCat-ID: 10608
M. Platzner and B. Rinner, “Design and Implementation of a Parallel Constraint Satisfaction Algorithm,” International Journal of Computers & Their Applications, vol. 5, pp. 106–116, 1998.
LibreCat
 
[19]
1998 | Misc | LibreCat-ID: 13464
M. Platzner, B. Rinner, and R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–107.
LibreCat
 
[18]
1998 | Conference Paper | LibreCat-ID: 13606
M. Platzner and G. De Micheli, “Acceleration of satisfiability algorithms by reconfigurable hardware,” in Proceedings of the 8th International Workshop on Field Programmable Logic and Applications (FPL) , 1998, pp. 69–78.
LibreCat | DOI
 
[17]
1997 | Journal Article | LibreCat-ID: 10609
M. Platzner, B. Rinner, and R. Weiss, “A Computer Architecture to Support Qualitative Simulation in Industrial Applications,” e & i Elektrotechnik und Informationstechnik, vol. 114, pp. 13–18, 1997.
LibreCat
 
[16]
1997 | Journal Article | LibreCat-ID: 10724
M. Platzner, B. Rinner, and R. Weiss, “Parallel qualitative simulation,” Simulation Practice and Theory, vol. 5, no. 7–8, pp. 623–638, 1997.
LibreCat | DOI
 
[15]
1997 | Conference Paper | LibreCat-ID: 13603
M. Platzner and L. Peters, “Fast Signature Segmentation on a Multi-DSP Architecture,” in Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, 1997, vol. 3166.
LibreCat
 
[14]
1997 | Conference Paper | LibreCat-ID: 13604
T. Röwekamp, M. Platzner, and L. Peters, “Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP,” in Proceedings of the 8th International Conference on Signal Processing Applications & Technology (ICSPAT), 1997, pp. 829–833.
LibreCat
 
[13]
1996 | Conference Paper | LibreCat-ID: 13602
E. Lind, M. Platzner, and B. Rinner, “A Multi-DSP System with Dynamically Reconfigurable Processors,” in Proceedings of the 7th International Conference on Signal Processing Applications & Technology (ICSPAT), 1996.
LibreCat
 
[12]
1995 | Journal Article | LibreCat-ID: 10610
M. Platzner, B. Rinner, and R. Weiss, “Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation,” J.UCS Journal of Universal Computer Science, vol. 12, pp. 811–820, 1995.
LibreCat
 
[11]
1995 | Conference Paper | LibreCat-ID: 13469
M. Platzner, B. Rinner, and R. Weiss, “A Distributed Computer Architecture for Qualitative Simulation based on a Multi-DSP and FPGAs,” in Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing , 1995, pp. 311–318.
LibreCat
 
[10]
1995 | Conference Paper | LibreCat-ID: 13470
E. Brenner et al., “High-Performance Simulators Based on Multi-TMS320C40,” in Proceedings of the 5th Annual Texas Instruments TMS320 Educators Conference, 1995.
LibreCat
 
[9]
1995 | Conference Paper | LibreCat-ID: 13471
G. Friedl, M. Platzner, and B. Rinner, “A Special-Purpose Coprocessor for Qualitative Simulation,” in Proceedings of the EURO-PAR’95 International Conference on Parallel Processing, 1995, pp. 695–698.
LibreCat
 
[8]
1995 | Conference Paper | LibreCat-ID: 13472
M. Platzner, B. Rinner, and R. Weiss, “Parallel Qualitative Simulation,” in Proceedings of the EUROSIM Congress, 1995, pp. 231–236.
LibreCat
 
[7]
1995 | Conference Paper | LibreCat-ID: 13473
M. Platzner and B. Rinner, “Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture,” in Proceedings of the PDCS International Conference on Parallel and Distributed Computing Systems, 1995, pp. 494–501.
LibreCat
 
[6]
1995 | Conference Paper | LibreCat-ID: 13474
M. Platzner and B. Rinner, “High-Performance Qualitative Simulation on a Multi-DSP Architecture,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[5]
1995 | Conference Paper | LibreCat-ID: 13484
R. Hranitzky and M. Platzner, “Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System,” in Proceedings of the 6th International Conference on Signal Processing Applications & Technology (ICSPAT), 1995.
LibreCat
 
[4]
1994 | Conference Paper | LibreCat-ID: 13468
M. Platzner, C. Steger, and R. Weiss, “Experimental Evaluation of Multi-DSP Architectures in High Performance Applications,” in Proceedings of the 7th Mediterranean Electrotechnical Conference, 1994.
LibreCat
 
[3]
1993 | Journal Article | LibreCat-ID: 13466
M. Platzner and C. Steger, “Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40),” Mikroelektronik, 1993.
LibreCat
 
[2]
1993 | Conference Paper | LibreCat-ID: 13467
M. Platzner, C. Steger, and R. Weiss, “Performance Measurements on a Multi-DSP Architecture with TMS320C40,” in Proceedings of the 4th International Conference on Signal Processing Applications & Technology (ICSPAT), 1993.
LibreCat
 
[1]
1992 | Conference Paper | LibreCat-ID: 13465
R. Ginthör, M. Platzner, and R. Weiss, “Experimental Results to Interprocessor Communication in Distributed Transputer-Systems,” in Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, 1992, pp. 45–54.
LibreCat
 
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