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165 Publications


2010 | Conference Paper | LibreCat-ID: 13051
Hunger, M., & Hellebrand, S. (2010). Ausbeute und Fehlertoleranz bei dreifach modularer Redundanz. In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf” (pp. 81–88). Wildbad Kreuth, Germany.
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2010 | Misc | LibreCat-ID: 13073
Hellebrand, S. (2010). Nano-Electronic Systems. Editorial, it 4/2010, pp. 179-180.
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch, F., Becker, B., Hellebrand, S., Polian, I., Straube, B., Vermeiren, W., & Wunderlich, H.-J. (2010). Variation-Aware Fault Modeling. 19th IEEE Asian Test Symposium (ATS’10), 87–93. https://doi.org/10.1109/ats.2010.24
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer, T., Schnittger, M., & Hellebrand, S. (2010). Efficient Test Response Compaction for Robust BIST Using Parity Sequences. 28th IEEE International Conference on Computer Design (ICCD’10), 480–485. https://doi.org/10.1109/iccd.2010.5647648
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger, M., & Hellebrand, S. (2010). The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems. 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), 101–108. https://doi.org/10.1109/dft.2010.19
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2010 | Conference Paper | LibreCat-ID: 12988
Froese, V., Ibers, R., & Hellebrand, S. (2010). Reusing NoC-Infrastructure for Test Data Compression. 28th IEEE VLSI Test Symposium (VTS’10), 227–231. https://doi.org/10.1109/vts.2010.5469570
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2010 | Conference Paper | LibreCat-ID: 13049
Becker, B., Hellebrand, S., Polian, I., Straube, B., Vermeiren, W., & Wunderlich, H.-J. (2010). Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits. 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper).
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer, T., Schnittger, M., & Hellebrand, S. (2010). Robuster Selbsttest mit extremer Kompaktierung. 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 17–24.
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2009 | Conference Paper | LibreCat-ID: 12991
Hunger, M., Hellebrand, S., Czutro, A., Polian, I., & Becker, B. (2009). ATPG-Based Grading of Strong Fault-Secureness. 15th IEEE International On-Line Testing Symposium (IOLTS’09. https://doi.org/10.1109/iolts.2009.5196027
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand, S., & Hunger, M. (2009). Are Robust Circuits Really Robust? 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), 77. https://doi.org/10.1109/dft.2009.28
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2009 | Conference Paper | LibreCat-ID: 13030
Hunger, M., Hellebrand, S., Czutro, A., Polian, I., & Becker, B. (2009). Robustheitsanalyse stark fehlersicherer Schaltungen mit SAT-basierter Testmustererzeugung. 3. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.”
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2008 | Misc | LibreCat-ID: 13033
Coym, T., Hellebrand, S., Ludwig, S., Straube, B., Wunderlich, H.-J., & G. Zoellin, C. (2008). Ein verfeinertes elektrisches Modell für Teilchentreffer und dessen Auswirkung auf die Bewertung der Schaltungsempfindlichkeit. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (Poster), Wien, Österreich.
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2008 | Misc | LibreCat-ID: 13035
Amgalan, U., Hachmann, C., Hellebrand, S., & Wunderlich, H.-J. (2008). Testen mit Rücksetzpunkten - ein Ansatz zur Verbesserung der Ausbeute bei robusten Schaltungen. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Wien, Österreich.
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2008 | Conference Paper | LibreCat-ID: 12992
Oehler, P., Bosio, A., di Natale, G., & Hellebrand, S. (2008). A Modular Memory BIST for Optimized Memory Repair. 14th IEEE International On-Line Testing Symposium (IOLTS’08), (Poster). https://doi.org/10.1109/iolts.2008.30
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2008 | Conference Paper | LibreCat-ID: 12994
Amgalan, U., Hachmann, C., Hellebrand, S., & Wunderlich, H.-J. (2008). Signature Rollback - A Technique for Testing Robust Circuits. 26th IEEE VLSI Test Symposium (VTS’08), 125–130. https://doi.org/10.1109/vts.2008.34
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2008 | Conference Paper | LibreCat-ID: 12993
Hunger, M., & Hellebrand, S. (2008). Verification and Analysis of Self-Checking Properties through ATPG. 14th IEEE International On-Line Testing Symposium (IOLTS’08). https://doi.org/10.1109/iolts.2008.32
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2008 | Conference Paper | LibreCat-ID: 13031
Hunger, M., & Hellebrand, S. (2008). Analyse selbstprüfender Schaltungen – Nachweis von Fehlersicherheit und Selbsttestbarkeit mit ATPG. 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.”
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2008 | Conference Paper | LibreCat-ID: 13032
Oehler, P., Bosio, A., Di Natale, G., & Hellebrand, S. (2008). Modularer Selbsttest und optimierte Reparaturanalyse. 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.”
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2007 | Misc | LibreCat-ID: 13038
Hellebrand, S. (2007). Reliable Nanoscale Systems - Challenges and Strategies for On- and Offline Testing. 5th IEEE East-West Design \& Test Symposium, Yerevan, Armenia (Invited Talk).
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2007 | Misc | LibreCat-ID: 13039
Ali, M., Welzl, M., Hessler, S., & Hellebrand, S. (2007). An End-to-End Reliability Protocol to Address Transient Faults in Network on Chips. DATE 2007 Friday Workshop on Diagnostic Services in Network-on-Chips, Nice, France, (Poster).
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