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136 Publications


2019 | Misc | LibreCat-ID: 8112
M. U. Maaz, A. Sprenger, and S. Hellebrand, A Hybrid Space Compactor for Varying X-Rates. Prien am Chiemsee: 31. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’19), 2019.
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2019 | Journal Article | LibreCat-ID: 8667
A. Sprenger and S. Hellebrand, “Divide and Compact - Stochastic Space Compaction for Faster-than-At-Speed Test,” Journal of Circuits, Systems and Computers, vol. 28, no. 1, pp. 1–23, 2019.
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2019 | Conference Paper | LibreCat-ID: 12918
M. U. Maaz, A. Sprenger, and S. Hellebrand, “A Hybrid Space Compactor for Adaptive X-Handling,” in 50th IEEE International Test Conference (ITC), Washington, DC, USA, 2019, pp. 1–8.
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2019 | Journal Article | LibreCat-ID: 13048
M. Kampmann, M. A. Kochte, C. Liu, E. Schneider, S. Hellebrand, and H.-J. Wunderlich, “Built-in Test for Hidden Delay Faults,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 38, no. 10, pp. 1956–1968, 2019.
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2018 | Misc | LibreCat-ID: 4576
A. Sprenger and S. Hellebrand, Stochastische Kompaktierung für den Hochgeschwindigkeitstest. Freiburg, Germany: 30. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’18), 2018.
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2018 | Journal Article | LibreCat-ID: 13057
M. Kampmann and S. Hellebrand, “Design For Small Delay Test - A Simulation Study,” Microelectronics Reliability, vol. 80, pp. 124–133, 2018.
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2018 | Misc | LibreCat-ID: 13072
M. Kampmann and S. Hellebrand, Optimized Constraints for Scan-Chain Insertion for Faster-than-at-Speed Test. 19th Workshop on RTL and High Level Testing (WRTLT’18), Hefei, Anhui, China, 2018.
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2018 | Journal Article | LibreCat-ID: 12974
S. Hellebrand, J. Henkel, A. Raghunathan, and H.-J. Wunderlich, “Guest Editors’ Introduction - Special Issue on Approximate Computing,” IEEE Embedded Systems Letters, vol. 10, no. 1, pp. 1–1, 2018.
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2018 | Conference Paper | LibreCat-ID: 10575
C. Liu, E. Schneider, M. Kampmann, S. Hellebrand, and H.-J. Wunderlich, “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention,” in 2018 IEEE 27th Asian Test Symposium (ATS), 2018.
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2018 | Conference Paper | LibreCat-ID: 4575
A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,” in 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2018.
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2017 | Conference Paper | LibreCat-ID: 10576
M. Kampmann and S. Hellebrand, “Design-for-FAST: Supporting X-tolerant compaction during Faster-than-at-Speed Test,” in 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2017.
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2017 | Conference Paper | LibreCat-ID: 12973
J. Deshmukh, W. Kunz, H.-J. Wunderlich, and S. Hellebrand, “Special Session on Early Life Failures,” in 35th IEEE VLSI Test Symposium (VTS’17), 2017.
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2017 | Misc | LibreCat-ID: 13078
M. Kampmann and S. Hellebrand, X-tolerante Prüfzellengruppierung für den Test mit erhöhter Betriebsfrequenz. 29. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’17), Lübeck, Germany, 2017.
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2016 | Conference Paper | LibreCat-ID: 12975
M. Kampmann and S. Hellebrand, “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test,” in 25th IEEE Asian Test Symposium (ATS’16), 2016, pp. 1–6.
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2015 | Conference Paper | LibreCat-ID: 12976
M. Kampmann, M. A. Kochte, E. Schneider, T. Indlekofer, S. Hellebrand, and H.-J. Wunderlich, “Optimized Selection of Frequencies for Faster-Than-at-Speed Test,” in 24th IEEE Asian Test Symposium (ATS’15), 2015, pp. 109–114.
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2015 | Journal Article | LibreCat-ID: 13056
Z. Huang, H. Liang, and S. Hellebrand, “A High Performance SEU Tolerant Latch,” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 31, no. 4, pp. 349–359, 2015.
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2015 | Misc | LibreCat-ID: 13077
S. Hellebrand, T. Indlekofer, M. Kampmann, M. Kochte, C. Liu, and H.-J. Wunderlich, Effiziente Auswahl von Testfrequenzen für den Test kleiner Verzögerungsfehler. 27. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’15), Bad Urach, Germany, 2015.
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2014 | Conference Paper | LibreCat-ID: 12977
S. Hellebrand, T. Indlekofer, M. Kampmann, M. A. Kochte, C. Liu, and H.-J. Wunderlich, “FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects,” in IEEE International Test Conference (ITC’14), 2014.
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2014 | Journal Article | LibreCat-ID: 13054
S. Hellebrand and H.-J. Wunderlich, “SAT-Based ATPG beyond Stuck-at Fault Testing,” DeGruyter Journal on Information Technology (it), vol. 56, no. 4, pp. 165–172, 2014.
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2014 | Journal Article | LibreCat-ID: 13055
L. Rodriguez Gomez, A. Cook, T. Indlekofer, S. Hellebrand, and H.-J. Wunderlich, “Adaptive Bayesian Diagnosis of Intermittent Faults,” Journal of Electronic Testing - Theory and Applications (JETTA), vol. 30, no. 5, pp. 527–540, 2014.
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2013 | Misc | LibreCat-ID: 13075
A. Cook, L. Rodriguez Gomez, S. Hellebrand, T. Indlekofer, and H.-J. Wunderlich, Adaptive Test and Diagnosis of Intermittent Faults. 14th Latin American Test Workshop, Cordoba, Argentina, 2013.
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2013 | Conference Paper | LibreCat-ID: 12979
S. Hellebrand, “Analyzing and Quantifying Fault Tolerance Properties,” in 14th IEEE Latin American Test Workshop - (LATW’13), 2013.
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2012 | Conference Paper | LibreCat-ID: 12980
A. Cook, S. Hellebrand, M. E. Imhof, A. Mumtaz, and H.-J. Wunderlich, “Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test,” in 13th IEEE Latin American Test Workshop (LATW’12), 2012, pp. 1–4.
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2012 | Conference Paper | LibreCat-ID: 12981
A. Cook, S. Hellebrand, and H.-J. Wunderlich, “Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test,” in 17th IEEE European Test Symposium (ETS’12), 2012, pp. 1–6.
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2012 | Misc | LibreCat-ID: 13074
A. Cook, S. Hellebrand, and H.-J. Wunderlich, Eingebaute Selbstdiagnose mit zufälligen und deterministischen Mustern. 24. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’12), Cottbus, Germany, 2012.
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2011 | Conference Paper | LibreCat-ID: 12984
I. Polian, B. Becker, S. Hellebrand, H.-J. Wunderlich, and P. Maxwell, “Towards Variation-Aware Test Methods,” in 16th IEEE European Test Symposium Trondheim (ETS’11), 2011.
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2011 | Journal Article | LibreCat-ID: 13052
F. Hopsch et al., “Variation-Aware Fault Modeling,” {SCIENCE CHINA Information Sciences, Science China Press, co-published with Springer}, vol. 54, no. 4, pp. 1813–1826, 2011.
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2011 | Conference Paper | LibreCat-ID: 13053
A. Cook, S. Hellebrand, T. Indlekofer, and H.-J. Wunderlich, “Robuster Selbsttest mit Diagnose,” in 5. GMM/GI/ITG Fachtagung “Zuverlässigkeit und Entwurf,” 2011, pp. 48–53.
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2011 | Conference Paper | LibreCat-ID: 12982
A. Cook, S. Hellebrand, T. Indlekofer, and H.-J. Wunderlich, “Diagnostic Test of Robust Circuits,” in 20th IEEE Asian Test Symposium (ATS’11), 2011, pp. 285–290.
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2010 | Conference Paper | LibreCat-ID: 12983
F. Hopsch et al., “Variation-Aware Fault Modeling,” in {19th IEEE Asian Test Symposium (ATS’10)}, 2010, pp. 87–93.
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2010 | Conference Paper | LibreCat-ID: 12988
V. Froese, R. Ibers, and S. Hellebrand, “Reusing NoC-Infrastructure for Test Data Compression,” in {28th IEEE VLSI Test Symposium (VTS’10)}, 2010, pp. 227–231.
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2010 | Conference Paper | LibreCat-ID: 13049
B. Becker, S. Hellebrand, I. Polian, B. Straube, W. Vermeiren, and H.-J. Wunderlich, “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits,” in {4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper)}, 2010.
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2010 | Conference Paper | LibreCat-ID: 13051
M. Hunger and S. Hellebrand, “Ausbeute und Fehlertoleranz bei dreifach modularer Redundanz,” in 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf,” 2010, pp. 81–88.
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2010 | Conference Paper | LibreCat-ID: 12985
T. Indlekofer, M. Schnittger, and S. Hellebrand, “Efficient Test Response Compaction for Robust BIST Using Parity Sequences,” in {28th IEEE International Conference on Computer Design (ICCD’10)}, 2010, pp. 480–485.
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2010 | Misc | LibreCat-ID: 10670
V. Fröse, R. Ibers, and S. Hellebrand, Testdatenkompression mit Hilfe der Netzwerkinfrastruktur. 22. Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (TuZ’10), Paderborn, Germany, 2010.
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2010 | Conference Paper | LibreCat-ID: 12986
M. Hunger and S. Hellebrand, “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems,” in {25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10)}, 2010, pp. 101–108.
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2010 | Misc | LibreCat-ID: 13073
S. Hellebrand, Nano-Electronic Systems. Editorial, it 4/2010, pp. 179-180, 2010.
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2010 | Conference Paper | LibreCat-ID: 12987
B. Becker, S. Hellebrand, I. Polian, B. Straube, W. Vermeiren, and H.-J. Wunderlich, “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits,” in 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10), 2010.
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2010 | Conference Paper | LibreCat-ID: 13050
T. Indlekofer, M. Schnittger, and S. Hellebrand, “Robuster Selbsttest mit extremer Kompaktierung,” in {4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf”}, 2010, pp. 17–24.
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2009 | Conference Paper | LibreCat-ID: 12990
S. Hellebrand and M. Hunger, “Are Robust Circuits Really Robust?,” in {24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk)}, 2009, p. 77.
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2009 | Conference Paper | LibreCat-ID: 12991
M. Hunger, S. Hellebrand, A. Czutro, I. Polian, and B. Becker, “ATPG-Based Grading of Strong Fault-Secureness,” in {15th IEEE International On-Line Testing Symposium (IOLTS’09)}, 2009.
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2009 | Conference Paper | LibreCat-ID: 13030
M. Hunger, S. Hellebrand, A. Czutro, I. Polian, and B. Becker, “Robustheitsanalyse stark fehlersicherer Schaltungen mit SAT-basierter Testmustererzeugung,” in {3. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf”}, 2009.
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2008 | Conference Paper | LibreCat-ID: 13032
P. Oehler, A. Bosio, G. Di Natale, and S. Hellebrand, “Modularer Selbsttest und optimierte Reparaturanalyse,” in {2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf”}, 2008.
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2008 | Misc | LibreCat-ID: 13033
T. Coym, S. Hellebrand, S. Ludwig, B. Straube, H.-J. Wunderlich, and C. G. Zoellin, Ein verfeinertes elektrisches Modell für Teilchentreffer und dessen Auswirkung auf die Bewertung der Schaltungsempfindlichkeit. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” (Poster), Wien, Österreich, 2008.
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2008 | Conference Paper | LibreCat-ID: 12992
P. Oehler, A. Bosio, G. di Natale, and S. Hellebrand, “A Modular Memory BIST for Optimized Memory Repair,” in {14th IEEE International On-Line Testing Symposium (IOLTS’08), (Poster)}, 2008.
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2008 | Conference Paper | LibreCat-ID: 12993
M. Hunger and S. Hellebrand, “Verification and Analysis of Self-Checking Properties through ATPG,” in {14th IEEE International On-Line Testing Symposium (IOLTS’08)}, 2008.
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2008 | Misc | LibreCat-ID: 13035
U. Amgalan, C. Hachmann, S. Hellebrand, and H.-J. Wunderlich, Testen mit Rücksetzpunkten - ein Ansatz zur Verbesserung der Ausbeute bei robusten Schaltungen. 20. ITG/GI/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Wien, Österreich, 2008.
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2008 | Conference Paper | LibreCat-ID: 12994
U. Amgalan, C. Hachmann, S. Hellebrand, and H.-J. Wunderlich, “Signature Rollback - A Technique for Testing Robust Circuits,” in {26th IEEE VLSI Test Symposium (VTS’08)}, 2008, pp. 125–130.
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2008 | Conference Paper | LibreCat-ID: 13031
M. Hunger and S. Hellebrand, “Analyse selbstprüfender Schaltungen – Nachweis von Fehlersicherheit und Selbsttestbarkeit mit ATPG,” in {2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit und Entwurf”}, 2008.
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2007 | Conference Paper | LibreCat-ID: 12995
S. Hellebrand, C. G. Zoellin, H.-J. Wunderlich, S. Ludwig, T. Coym, and B. Straube, “A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction,” in {22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07)}, 2007, pp. 50–58.
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