Wolfgang Müller

Schaltungstechnik (SCT) / Heinz Nixdorf Institut
wmueller@hni.uni-paderborn.de
ID
16243

264 Publications

Mark all

[264]
2024 | Conference Paper | LibreCat-ID: 45778
Luchterhandt L, Nellius T, Beck R, et al. Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells. In: MBMV 2024 - 27. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“. VDE Verlag; 2024.
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[263]
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo P, Schmid P, Bringmann O, et al. A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. In: DATE 24 - Design Automation and Test in Europe. ; 2024.
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[262]
2023 | Conference Paper | LibreCat-ID: 45775
Luchterhandt L, Nellius T, Beck R, et al. Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture. In: MBMV 2023 - 26. Workshop "Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“, MBMV 2023, Freiburg. VDE Verlag; 2023.
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[261]
2023 | Conference Paper | LibreCat-ID: 45776
Ecker W, Krstic M, Ulbricht M, et al. Scale4Edge – Scaling RISC-V for Edge Applications. In: RISC-V Summit Europe 2023, Barcelona, Spain, June 2023. ; 2023.
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[260]
2023 | Conference Paper | LibreCat-ID: 48530
Müller W, Ulbricht M, Li L, Krstic M. Der TETRISC SoC - Ein resilientes Quad-Core System auf Pulpissimo-Basis. In: 5. ITG / GMM / GI -Workshop Testmethoden Und Zuverlässigkeit von Schaltungen Und Systemen . ; 2023.
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[259]
2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar M, Gowda H, Kneuper P, Sadiye B, Müller W, Scheytt C. A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology. In: 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS). ; 2023. doi:10.1109/BCICTS54660.2023.10310954
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[258]
2022 | Conference Paper | LibreCat-ID: 29302
Ecker W, Adelt P, Müller W, et al. The Scale4Edge RISC-V Ecosystem. In: In Proceedings of the Design Automation and Test Conference and Exhibition (DATE 2022). ; 2022.
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[257]
2021 | Conference Paper | LibreCat-ID: 32125
Adelt P, Koppelmann B, Müller W, Scheytt C. Register and Instruction Coverage Analysis for Different RISC-V ISA Modules. In: MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop. VDE; 2021.
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[256]
2021 | Conference Paper | LibreCat-ID: 32132
Adelt P, Koppelmann B, Müller W, Scheytt C. QEMU zur Simulation von Worst-Case-Ausführungszeiten. In: MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop. VDE; 2021.
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[255]
2021 | Conference Paper | LibreCat-ID: 23992
Adelt P, Koppelmann B, Müller W, Scheytt C. Register and Instruction Coverage Analysis for Different RISC-V ISA Modules. In: Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2021). ; 2021.
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[254]
2020 | Conference Paper | LibreCat-ID: 24027
Adelt P, Koppelmann B, Müller W, Scheytt C. A Scalable Platform for QEMU Based Fault Effect Analysis for RISC-V Hardware Architectures. In: MBMV 2020 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop. ; 2020.
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[253]
2019 | Conference Paper | LibreCat-ID: 24058
Koppelmann B, Adelt P, Müller W, Scheytt C. RISC-V Extensions for Bit Manipulation Instructions. In: 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). ; 2019. doi:10.1109/PATMOS.2019.8862170
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[252]
2019 | Conference Paper | LibreCat-ID: 24060
Adelt P, Koppelmann B, Müller W, Scheytt C. Analyse sicherheitskritischer Software für RISC-V Prozessoren. In: MBMV 2019-22.Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2019). ; 2019.
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[251]
2019 | Conference Paper | LibreCat-ID: 24061
Adelt P, Koppelmann B, Müller W, Scheytt C, Driessen B. QEMU for Dynamic Memory Analysis of Security Sensitive Software. In: 2nd International Workshop on Embedded Software for Industrial IoT in Conjunction with DATE 2019. ; 2019:32-34.
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[250]
2019 | Journal Article | LibreCat-ID: 24063
Adelt P, Koppelmann B, Müller W, Scheytt C. QEMU Support for RISC-V: Current State and Future Releases. 2nd International Workshop on RISC-V Research Activities. 2019;(Presentation).
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[249]
2019 | Book (Editor) | LibreCat-ID: 53596
Bringmann O, Ecker W, Müller W, Müller-Gridschneder D, eds. Proceedings of the 2nd International Workshop on Embedded Software for Industrial IoT - ESIIT.; 2019.
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[248]
2018 | Journal Article | LibreCat-ID: 24194
Adelt P, Koppelmann B, Müller W. Current and Future RISC-V Activities for Virtual Prototyping and Chip Design. International Workshop on RISC-V Research Activities. 2018;Presentation.
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[247]
2018 | Conference Paper | LibreCat-ID: 24196
Wu L, Hussain MK, Abughannam S, Müller W, Scheytt C, Ecker W. Analog fault simulation automation at schematic level with random sampling techniques. In: 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)) . IEEE; 2018. doi:10.1109/DTIS.2018.8368549
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[246]
2018 | Book (Editor) | LibreCat-ID: 53595
Bringmann O, Ecker W, Müller W, Müller-Gridschneder D, eds. Proceedings of the 1st International Workshop on Embedded Software for Industrial IoT - ESIIT.; 2018.
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[245]
2017 | Conference Paper | LibreCat-ID: 24220
Adelt P, Koppelmann B, Müller W, Mueller-Gritschneder D, Kleinjohann B, Scheytt C. Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen. In: Tagungsband des Wissenschaftsforums Intelligente Technische Systeme. Verlagsschriftenreihe des Heinz Nixdorf Instituts; 2017. doi:10.17619/UNIPB/1-93
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[244]
2017 | Conference Paper | LibreCat-ID: 24223
Wu L, Abughannam S, Müller W, Scheytt C, Ecker W. SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study. In: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES). ; 2017:68.
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[243]
2017 | Conference Paper | LibreCat-ID: 24224
Adelt P, Koppelmann B, Müller W, Kleinjohann B, Scheytt C. ANALISA - A Tool for Static Instruction Set Analysis. In: Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation. ; 2017.
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[242]
2017 | Conference Paper | LibreCat-ID: 24225
Adelt P, Koppelmann B, Müller W, Kleinjohann B, Scheytt C. An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries. In: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES) . ; 2017:44.
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[241]
2016 | Conference Paper | LibreCat-ID: 24264
Adelt P, Koppelmann B, Müller W, Becker M, Kleinjohann B, Scheytt C. Fast Dynamic Fault Injection for Virtual Microcontroller Platforms. In: Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC). ; 2016. doi:10.1109/VLSI-SoC.2016.7753545
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[240]
2016 | Conference Paper | LibreCat-ID: 24263
Abughannam S, Wu L, Müller W, Scheytt C, Ecker W, Novello C. Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study. In: Analog 2016 - VDE. ; 2016.
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[239]
2015 | Conference Paper | LibreCat-ID: 24289
Müller W, Wu L, Scheytt C, Becker M, Schoenberg S. On the Correlation of HW Faults and SW Errors. In: Mueller-Gritschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014). ; 2015.
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[238]
2015 | Book (Editor) | LibreCat-ID: 53590
Müller-Gridschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems.; 2015.
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[237]
2014 | Conference Paper | LibreCat-ID: 25145
Becker M, Kuznik C, Müller W. Virtual Platforms for Model-Based Design of Dependable Cyber-Physical System Software. In: 17th Euromicro Conference on Digital Systems Design (DSD). ; 2014.
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[236]
2014 | Conference Paper | LibreCat-ID: 25155
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Virtual Platform Framework for Cyber-Physical Systems. In: ACM/IEEE 5th International Conference on Cyber-Physical Systems. ; 2014.
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[235]
2014 | Conference Paper | LibreCat-ID: 25161
Koppelmann B, Becker M, Müller W. Portierung der TriCore-Architektur auf QEMU. In: 17. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2014) . ; 2014.
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[234]
2014 | Conference Paper | LibreCat-ID: 24305
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014. doi:10.1109/SAMOS.2014.6893219
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[233]
2014 | Journal Article | LibreCat-ID: 24302
Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt C. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. Design and Verification Conference (DVCON EUROPE). Published online 2014.
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[232]
2014 | Journal Article | LibreCat-ID: 24309
Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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[231]
2014 | Conference Paper | LibreCat-ID: 24311
Oetjens J-H, Becker M, Kuznik C, et al. Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. In: Design Automation Conference (DAC). ; 2014. doi:10.1145/2593069.2602976
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[230]
2014 | Conference Paper | LibreCat-ID: 25120
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014.
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[229]
2014 | Conference Paper | LibreCat-ID: 25146
Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection for soft real time embedded systems with resource constraints. In: 12th IEEE International Conference on Embedded Computing. ; 2014.
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[228]
2014 | Conference Paper | LibreCat-ID: 25144
Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. In: PATMOS 2014. ; 2014.
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[227]
2014 | Conference Paper | LibreCat-ID: 36918
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:10.1109/ICCPS.2014.6843726
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[226]
2014 | Conference Paper | LibreCat-ID: 36917
Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric Model Code Generation Methodology. In: ; 2014.
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[225]
2014 | Conference Paper | LibreCat-ID: 25166
Kuznik C, Müller W. Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. In: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. ; 2014.
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[224]
2014 | Conference Paper | LibreCat-ID: 25163
Kuznik C, Defo BG, Müller W. Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung. In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) . ; 2014.
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[223]
2014 | Journal Article | LibreCat-ID: 25151
Kuznik C, Defo BG, Müller W. An Assisted Single Source Verification Metric Model Code Generation Methodology. Electronic System Level Synthesis Conference (ESLSyn). Published online 2014.
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[222]
2014 | Conference Paper | LibreCat-ID: 34585
Koppelmann B, Messidat B, Becker M, Müller W, Scheytt JC. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. In: Proceedings of the Design and Verification Conference Europe (DVCON Europe). ; 2014.
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[221]
2014 | Journal Article | LibreCat-ID: 25164
Becker M, Müller W, Stroop J, Kiffmeier U. HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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[220]
2013 | Conference Paper | LibreCat-ID: 25270
Joy M tech. MM, Müller W, Rammig F-J. Early Phase Memory Leak Detection in Embedded Software Designs with Virtual Memory Management Model. In: Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society,. Linköping University Electronic Press; 2013.
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[219]
2013 | Conference Paper | LibreCat-ID: 25271
He D, Müller W. AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM ON MULTI-CORE PROCESSORS. In: Proceedings of International Conference on Applied Computing (AC). ; 2013.
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[218]
2013 | Conference Paper | LibreCat-ID: 25284
Mischkalla F, Müller W. Efficient Power Intent Validation Using Loosely-Timed Simulation Models. In: 23rd International Workshop on Power And Timing Modeling, Optimization and Simulation, Sep. 2013. ; 2013.
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[217]
2013 | Conference Paper | LibreCat-ID: 25291
Becker M, Kiffmeier U, Müller W. HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures. In: 16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing. ; 2013.
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[216]
2013 | Conference Paper | LibreCat-ID: 25606
Kuznik C, F. S. Oliveira M, Müller W. SystemC Verification Components - An enhanced OVM/UVM for SystemC. In: EdaWorkshop 13. ; 2013.
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[215]
2013 | Conference Paper | LibreCat-ID: 25612
Mischkalla F, Müller W. Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen. In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ; 2013.
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[214]
2013 | Conference Paper | LibreCat-ID: 25614
Kuznik C, F. S. Oliveira M, Müller W. SC OVM: An Advanced SystemC Library for OVM-based Verification. In: Open SANITAS SystemC Verification Workshop. ; 2013.
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[213]
2013 | Newspaper Article | LibreCat-ID: 25615
Engels G, Gerth C, Kleinjohann L, Kleinjohann B, Müller W. Informationstechnik spart Ressourcen. ForschungsForum Paderborn . 2013.
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[212]
2013 | Conference Paper | LibreCat-ID: 25620
Kuznik C, Oliveira MF, Defo B, Müller W. Systematic Application of UCIS to Improve the Automation on Verification Closure. In: Proceedings of DVCON. ; 2013.
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[211]
2013 | Conference Paper | LibreCat-ID: 25632
Klobedanz K, Jatzkowski J, Rettberg A, Müller W. Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks. In: International Embedded Systems Symposium (IESS) 2013. Springer; 2013.
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[210]
2013 | Journal Article | LibreCat-ID: 25740
He D, Müller W. A heuristic energy-aware approach for hard real-time systems on multi-core platforms. Microprocessors and Microsystems - Embedded Hardware Design 37(6-7). Published online 2013:845-857.
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[209]
2013 | Book Chapter | LibreCat-ID: 25743
Anacker H, Dellnitz M, Flaßkamp K, et al. Methods for the Design and Development. In: Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future. Springer-Verlag; 2013:187-356.
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[208]
2013 | Conference Paper | LibreCat-ID: 36919
Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:10.1109/PATMOS.2013.6662171
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[207]
2013 | Conference Paper | LibreCat-ID: 36920
He D, Müller W. An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors. In: Weghorn H, ed. Proceedings of the International Conference on Applied Computing (AC). ; 2013.
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[206]
2012 | Conference Paper | LibreCat-ID: 25744
Joy M tech. MM, Becker M, Mathews E, Müller W. Automated Source Code Annotation for Timing Analysis of Embedded Software. In: In Proceedings of Advanced Computing and Communications Conference 2012 (ADCOM 2012). IEEE; 2012.
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[205]
2012 | Conference Paper | LibreCat-ID: 25758
Becker M, Baldin D, Kuznik C, Joy M tech. MM, Xie T, Müller W. XEMU: An Efficient QEMU Based Binary Mutation Testing Framework for Embedded Software. In: EMSOFT’12: Teenth ACM International Conference on Embedded Software 2012 Proceedings . ; 2012.
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[204]
2012 | Conference Paper | LibreCat-ID: 25761
Oliveira MF, Kuznik C, Le HM, et al. The System Verification Methodology for Advanced TLM Verification. In: CODES/ISSS ’12: Eighth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Proceedings. ; 2012.
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[203]
2012 | Conference Paper | LibreCat-ID: 25767
He D, Müller W. A Heuristic Energy-Aware Approach for Hard Real-Time Systems on Multi-Core Platforms. In: 15th Euromicro Conference on Digital System Design (DSD). IEEE Xplore; 2012.
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[202]
2012 | Conference Paper | LibreCat-ID: 26022
Becker M, Kuznik C, Joy M tech. MM, Xie T, Müller W. Binary Mutation Testing Through Dynamic Translation. In: 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN). ; 2012.
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[201]
2012 | Conference Paper | LibreCat-ID: 26023
He D, Müller W. Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms. In: Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012). IEEE Xplore; 2012.
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[200]
2012 | Conference Paper | LibreCat-ID: 26024
Radke S, Rülke S, Oliveira MF, et al. Compilation of Methodologies to Speed up the Verification Process at System Level. In: EdaWorkshop 12. ; 2012.
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[199]
2012 | Conference Paper | LibreCat-ID: 26031
He D, Müller W. Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems. In: 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC). IEEE Xplore; 2012.
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[198]
2012 | Conference Paper | LibreCat-ID: 26036
Oliveira MF, Kuznik C, Müller W, Ecker W, Esen V. A SystemC Library for Advanced TLM Verification. In: Proceeding of Design and Verification Conference (DVCON). ; 2012.
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[197]
2012 | Conference Paper | LibreCat-ID: 26079
Becker M, Gnokam Defo GB, Müller W, Fummi F, Pravadelli G, Vinco S. MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution. In: Design, Automation and Test in Europe (DATE 2012). ; 2012.
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[196]
2012 | Conference Paper | LibreCat-ID: 26080
Becker M, Kuznik C, Joy M tech. M, Xie T, Müller W. XEMU: A QEMU Based Binary Mutation Testing Framework. In: Design, Automation and Test in Europe DATE. ; 2012.
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[195]
2012 | Conference Paper | LibreCat-ID: 26092
Müller W, Becker M, Zabel H, Elfeky A, DiPasquale A. Virtual Prototyping of Cyber-Physical Systems. In: In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012. ; 2012.
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[194]
2012 | Book Chapter | LibreCat-ID: 26695
Vanderperren Y, Müller W, He D, Mischkalla F, Dahaene W. Extending UML for Electronic Systems Design: A Code Generation Perspective. In: Nicolescu G, O’Connor I, Piguet C, eds. Design Technology for Heterogeneous Embedded Systems. 1st Edition. Auflage. Springer Verlag; 2012:13-39.
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[193]
2012 | Conference Paper | LibreCat-ID: 36922
Klobedanz K, Müller W, Rettberg A. An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems. In: IEEE; 2012. doi:10.1109/ISORCW.2012.41
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[192]
2012 | Conference Paper | LibreCat-ID: 36921
Oliveira MF, Kuznik C, Müller W, Esen V, Ecker W. Towards an Enhanced UVM for SystemC. In: Proceedings of the Design & Verification Conference (DVCon). ; 2012.
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[191]
2012 | Conference Paper | LibreCat-ID: 36994
Xie T, Müller W, Letombe F. Mutation-Analysis Driven Functional Verification of a Soft Microprocessor. In: Proceedings of SOCC2012. IEEE; 2012. doi:10.1109/SOCC.2012.6398362
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[190]
2012 | Conference Paper | LibreCat-ID: 36997
Xie T, Müller W. An IP-XACT-TO-SystemC Model Generator for Mutation Analysis. In: Proceedings of the MeCoES’12. ; 2012.
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[189]
2012 | Journal Article | LibreCat-ID: 26038
Kuznik C, Oliveira MF, Müller W. SYSTEMC UVM VERIFICATION COMPONENTS. Design, Automation and Test in Europe DATE. Published online 2012.
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[188]
2012 | Book (Editor) | LibreCat-ID: 53593
Müller W, Ecker W, eds. Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs .; 2012.
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[187]
2011 | Conference Paper | LibreCat-ID: 26667
Kuznik C, Müller W. Aspect enhanced functional coverage driven verification in the SystemC HDVL. In: Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011). ; 2011.
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[186]
2011 | Conference Paper | LibreCat-ID: 26669
Xie T, Müller W. IP-XACT based System Level Mutation Testing. In: Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT). ; 2011.
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[185]
2011 | Conference Paper | LibreCat-ID: 26698
Xie T, Müller W. HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. In: Proceedings of the 14th Euromicro Conference on Digital System Design (DSD). ; 2011.
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[184]
2011 | Journal Article | LibreCat-ID: 26705
Kuznik C, Müller W. Verification Closure of SystemC Designs with Functional Coverage. North American SystemC User Group Meeting (16th). Published online 2011.
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[183]
2011 | Conference Paper | LibreCat-ID: 26710
Becker M, Zabel H, Müller W, Elfeky A, DiPasquale A. Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie. In: 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294. Vol 294. Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn; 2011:315-327.
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[182]
2011 | Conference Paper | LibreCat-ID: 26713
Klobedanz K, König A, Müller W. A Reconfiguration Approach for Fault-Tolerant FlexRay Networks. In: Proceedings of Design, Automation, Test Europe - DATE2011. IEEE Computer Society Press; 2011.
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[181]
2011 | Conference Paper | LibreCat-ID: 26714
Klobedanz K, König A, Müller W, Rettberg A. Self-Reconfiguration for Fault-Tolerant FlexRay Networks. In: Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011. IEEE Computer Society Press; 2011.
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[180]
2011 | Conference Paper | LibreCat-ID: 26715
Kuznik C, Müller W. Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction. In: Proceedings of DVCON . ; 2011.
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[179]
2011 | Conference Paper | LibreCat-ID: 26716
Mischkalla F, He D, Müller W. A Retargetable SysML-based Front-End for High-Level Synthesis. In: Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED). ; 2011.
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[178]
2011 | Conference Paper | LibreCat-ID: 26717
He D, Mischkalla F, Müller W. A SysML-based Framework with QEMU-SystemC Code Generation. In: Proceedings of 1st International QEMU Users Forum. ; 2011.
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[177]
2011 | Conference Paper | LibreCat-ID: 26784
Gnokam Defo GB, Müller W. Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk. In: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV). ; 2011.
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[176]
2011 | Conference Paper | LibreCat-ID: 26789
Kuznik C, Müller W. Native binary mutation analysis for embedded software and virtual prototypes in SystemC. In: Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing. ; 2011.
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[175]
2011 | Conference Paper | LibreCat-ID: 37001
Becker M, Zabel H, Müller W, Elfeky A. Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie. In: ; 2011.
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[174]
2011 | Conference Paper | LibreCat-ID: 37005
Kuznik C, Müller W. A SystemC Based Library for Functional Coverage. In: ; 2011.
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[173]
2011 | Conference Paper | LibreCat-ID: 37006
Klobedanz K, König A, Müller W. A Reconfiguration Approach for Faul-Tolerant FlexRay Networks. In: Proceedings of DATE’11. IEEE; 2011. doi:10.1109/DATE.2011.5763022
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[172]
2011 | Book (Editor) | LibreCat-ID: 53580
Müller W, Petrot F, eds. Proceedings of the 1st International QEMU Users’ Forum.; 2011.
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[171]
2010 | Conference Paper | LibreCat-ID: 37007
Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456990
LibreCat | DOI
 
[170]
2010 | Conference Paper | LibreCat-ID: 37009
Oliveira MFS, Zabel H, Müller W. Assertion-Based Verification of RTOS Properties. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5457130
LibreCat | DOI
 
[169]
2010 | Conference Paper | LibreCat-ID: 37011
Klobedanz K, Kuznik C, Thuy A, Müller W. Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study. In: Proceedings of DATE’10, Dresden. IEEE; 2010. doi:10.1109/DATE.2010.5457125
LibreCat | DOI
 
[168]
2010 | Conference Paper | LibreCat-ID: 37037
Krupp A, Müller W. A Systematic Approach to Combined HW/SW System Test. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5457186
LibreCat | DOI
 
[167]
2010 | Conference Paper | LibreCat-ID: 37040
Becker M, Di Guglielmo G, Fummi F, Müller W, Pravadelli G, Xie T. RTOS-Aware Refinement for TLM2.0-based HW/SW Design. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456965
LibreCat | DOI
 
[166]
2010 | Conference Paper | LibreCat-ID: 37046
Becker M, Zabel H, Müller W. A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_15
LibreCat | DOI
 
[165]
2010 | Conference Paper | LibreCat-ID: 37044
Klobedanz K, Defo GB, Zabel H, Müller W, Zhi Y. Task Migration for Fault-Tolerant FlexRay Networks. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_7
LibreCat | DOI
 
[164]
2010 | Conference Paper | LibreCat-ID: 37042
Mischkalla F, Müller W, He D. A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis. In: Proceedings of the M-BED Workshop. ; 2010.
LibreCat
 
[163]
2010 | Conference Paper | LibreCat-ID: 37043
Bol A, Müller W, Krupp A. Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen. In: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV). ; 2010.
LibreCat
 
[162]
2010 | Conference Paper | LibreCat-ID: 37050
Müller W, He D, Mischkalla F, et al. The SATURN Approach to SysML-based HW/SW Codesign. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI. Lecture Notes in Electrical Engineering. ; 2010. doi:10.1007/978-94-007-1488-5_9
LibreCat | DOI
 
[161]
2010 | Conference Paper | LibreCat-ID: 37048
Müller W, Bol A, Krupp A, Lundkvist O. Generation of Executable Testbenches from Natural Language Requirement Specifications for Embedded Real-Time Systems. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_9
LibreCat | DOI
 
[160]
2010 | Conference Paper | LibreCat-ID: 37049
Xie T, Letombe F, Müller W. Mutation-Analysis Directed Constrained Random Verification. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010.
LibreCat
 
[159]
2010 | Conference Paper | LibreCat-ID: 37051
Xie T, Defo GB, Müller W. An Eclipse-based Framework for the IP-XACT-enabled Assembly of Mixed-Level IPs. In: ; 2010.
LibreCat
 
[158]
2010 | Conference Paper | LibreCat-ID: 37057
Defo GB, Müller W, Kuznik C. Verification of a CAN Bus Model in SystemC with Functional Coverage. In: Proceedings of SIES 2010. IEEE; 2010. doi:10.1109/SIES.2010.5551379
LibreCat | DOI
 
[157]
2010 | Conference Paper | LibreCat-ID: 37056
Klobedanz K, Defo GB, Müller W, Kerstan T. Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks. In: Proceedings of SIES 2010. ; 2010. doi:10.1109/SIES.2010.5551384
LibreCat | DOI
 
[156]
2010 | Conference Paper | LibreCat-ID: 37053
Müller W, da S. Oliveira MF, Zabel H, Becker M. Verification of Real-Time Properties for Hardware-Dependant Software. In: Proceedings of HLDVT2010. IEEE; 2010.
LibreCat
 
[155]
2010 | Conference Paper | LibreCat-ID: 37060
Oliveira MFS, do Nascimento FAM, Müller W. Design Space Abstraction and Metamodeling for Embedded Systems Design Space Exploration. In: Proceedings of MoMPES 2010. ; 2010.
LibreCat
 
[154]
2010 | Book (Editor) | LibreCat-ID: 53582
Gerard S, Müller W, Rioux L, Selic B, eds. Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design.; 2010.
LibreCat
 
[153]
2009 | Book Chapter | LibreCat-ID: 33813
Zabel H, Müller W, Gerstlauer A. Accurate RTOS Modelling and Analysis with SystemC. In: Ecker W, Müller W, Dömer R, eds. Hardware Dependent Software - Principles and Practice. Springer Verlag; 2009:233-260. doi:10.1007/978-1-4020-9436-1_9
LibreCat | DOI
 
[152]
2009 | Book Chapter | LibreCat-ID: 33814
Ecker W, Müller W, Dömer R. Hardware-dependent Software - Introduction and Overview. In: Ecker W, Müller W, Dömer R, eds. Hardware Dependent Software - Principles and Practice. Springer Verlag; 2009:1-14. doi:10.1007/978-1-4020-9436-1_1
LibreCat | DOI
 
[151]
2009 | Conference Paper | LibreCat-ID: 37067
Schattkowsky T, Xie T, Müller W. A UML Frontend for IP-XACT-based IP Management. In: Proceedings of DATE’09. IEEE; 2009. doi:10.1109/DATE.2009.5090664
LibreCat | DOI
 
[150]
2009 | Conference Paper | LibreCat-ID: 37066
Zabel H, Müller W. Increased Accuracy through Noise Injection in Abstract RTOS Simulation. In: Proceedings of DATE’09. ; 2009. doi:10.1109/DATE.2009.5090925
LibreCat | DOI
 
[149]
2009 | Conference Paper | LibreCat-ID: 37063
Klobedanz K, Kuznik C, Elfeky A, Müller W. Development of Automotive Communication Based Real-Time Systems - A Steer-by-Wire Case Study. In: Proceedings of IESS09. Springer Verlag; 2009. doi:10.1007/978-3-642-04284-3_20
LibreCat | DOI
 
[148]
2009 | Conference Paper | LibreCat-ID: 37064
Becker M, Zabel H, Müller W. Integration abstrakter RTOS-Simulation in den Entwurf eingebetteter automobiler E/E-Systeme. In: ; 2009.
LibreCat
 
[147]
2009 | Conference Paper | LibreCat-ID: 37061
Krupp A, Müller W. Systematic Model-in-the-Loop Test of Embedded Control Systems. In: Proceedings of IESS09. ; 2009.
LibreCat
 
[146]
2009 | Conference Paper | LibreCat-ID: 37068
Doemer R, Gerstlauer A, Müller W. Hardware-dependent Software for Multi- and Many-Core Embedded Systems. In: Proceedings of ASP-DAC’09. ; 2009.
LibreCat
 
[145]
2009 | Book (Editor) | LibreCat-ID: 40119
Ecker W, Müller W, Dömer R, eds. Hardware-Dependent Software. Springer Netherlands; 2009. doi:10.1007/978-1-4020-9436-1
LibreCat | DOI
 
[144]
2008 | Journal Article | LibreCat-ID: 34563
Vanderperren Y, Müller W, Dahaene W. UML for Electronic Systems Design – A Comprehensive Overview. Design Automation for Embedded Systems. 2008;12:261-292. doi:10.1007/s10617-008-9028-9
LibreCat | DOI
 
[143]
2008 | Journal Article | LibreCat-ID: 34564
Schäfer R, Müller W. Assessment of a Multimodal Interaction and Rendering System against Established Design Principles. Journal on Multimodal User Interfaces. 2008;2(1):25-41. doi:10.1007/s12193-008-0003-3
LibreCat | DOI
 
[142]
2008 | Book Chapter | LibreCat-ID: 33815
Großmann J, Fey I, Krupp A, Conrad M, Wewetzer C, Müller W. TestML – A Test Exchange Language for Model-based Testing of Embedded Software. In: Broy M, Krüger IH, Meisinger M, eds. ASWSD 2006: Model-Driven Development of Reliable Automotive Services. Springer Verlag; 2008:98-117. doi:10.1007/978-3-540-70930-5_7
LibreCat | DOI
 
[141]
2008 | Conference Paper | LibreCat-ID: 37075
Zabel H, Müller W. An Efficient Time Annotation Technique in Abstract RTOS Simulations for Multiprocessor Task Migration. Kleinjohann L, Kleinjohann B, eds. 2008;271. doi:10.1007/978-0-387-09661-2_18
LibreCat | DOI
 
[140]
2008 | Conference Paper | LibreCat-ID: 37072
Zabel H, Müller W. Präzises Interrupt Scheduling in abstrakten RTOS Modellen in SystemC. In: Scholl Ch, Disch S, eds. Methoden Und Beschreibungs-Sprachen Zur Modellierung Und Verifikation von Schaltungen Und System. Shaker Verlag; 2008.
LibreCat
 
[139]
2008 | Book (Editor) | LibreCat-ID: 53583
Müller W, Wolfe J, eds. Proceedings of the 5th International DAC Workshop of UML for SoC Design.; 2008.
LibreCat
 
[138]
2008 | Book (Editor) | LibreCat-ID: 53594
Wolfe J, Müller W, eds. Proceedings of the 4th DAC Workshop on UML for SOC Design .; 2008.
LibreCat
 
[137]
2007 | Conference Paper | LibreCat-ID: 37076
Zabel H, Müller W. Simulation mit abstrakten RTOS Modellen in SystemC. 2007;6(4).
LibreCat
 
[136]
2007 | Conference Paper | LibreCat-ID: 37083
Krupp A, Müller W. Systematic Testbench Specification for Constrained Randomized Test and Functional Coverage. In: Proceedings of the 21st European Conference on Modelling and Simulation (ECMS 2007). ; 2007.
LibreCat
 
[135]
2007 | Conference Paper | LibreCat-ID: 37080
Großmann J, Fey I, Conrad M, Wewetzer Ch, Müller W. TestML - A Test Exchange Language for Model-based Testing of Embedded Software. In: Proceedings of the Automotive Software Workshop ’06. ; 2007.
LibreCat
 
[134]
2007 | Conference Paper | LibreCat-ID: 37079
Müller W. On the Use and Misuse of UML- Application of Diagrams in Engineering. In: Proceedings of the UML for SoC Design Workshop at DAC’07. ; 2007.
LibreCat
 
[133]
2007 | Conference Paper | LibreCat-ID: 37085
Schäfer R, Müller W, Marin-López A, Díaz-Sánchez D. Using Smart Cards for Secure and Device Independent User Interfaces. In: Proceedings of the International Conference on Mobile Technology, Applications and Systems (Mobility 2007). ; 2007.
LibreCat
 
[132]
2007 | Conference Paper | LibreCat-ID: 38106
Marin A, Müller W, Schäfer R, Almenarez F, Diaz D, Ziegler M. Middleware for Secure Home Access and Control. In: Proc. of the IEEE PerCom Middleware Support for Pervasive Computing (PerWare 2007). IEEE; 2007.
LibreCat
 
[131]
2007 | Conference Paper | LibreCat-ID: 38100
Schäfer R, Müller W, Marin-López A, Díaz-Sánchez D. Device Independent User Interfaces for Smart Cards. In: Proceedings of the 9th International Conference on Human Computer Interaction with Mobile Devices and Services (MobileHCI2007). ; 2007.
LibreCat
 
[130]
2007 | Conference Paper | LibreCat-ID: 38104
Schäfer R, Müller W, Deimann R, Kleinjohann B. A Low-Cost Positioning System for Location-Aware Applications in Smart Homes. In: Proceedings of the Workshop on Mobile Spatial Interaction at CHI 2007. ; 2007.
LibreCat
 
[129]
2007 | Conference Paper | LibreCat-ID: 38102
Schäfer R, Müller W. Evaluation of a Multimodal System Based on Dialogue Models and Transformations International Workshop on Usability of User Interfaces: From Monomodal to Multimodal. In: Proceedings of IWUMUI’2007 at HCI’2007. ; 2007.
LibreCat
 
[128]
2006 | Conference Paper | LibreCat-ID: 38533
Müller W, Vanderperren Y. UML and Model-Driven Development for SoC Design. In: Proceedings of CODES/ISSS. ; 2006.
LibreCat
 
[127]
2006 | Conference Paper | LibreCat-ID: 38537
Schäfer R, Müller W, Groppe J. Profile Processing and Evolution for Smart Environments. In: Proceedings of the 3rd International Conference on Ubiquitous Intelligence and Computing (UIC-06). ; 2006.
LibreCat
 
[126]
2006 | Conference Paper | LibreCat-ID: 38538
Müller W, Zabel H. Towards a Unified Behavioural Modelling Language. In: Proceedings of the UML-SoC Workshop at DAC 2006. ; 2006.
LibreCat
 
[125]
2006 | Conference Paper | LibreCat-ID: 38536
Müller W. UML - The Emerging Hardware Description Language? In: Proc. of FDL’06. ; 2006.
LibreCat
 
[124]
2006 | Conference Paper | LibreCat-ID: 38540
Lavagno L, Müller W. UML: A Next Generation Language for SoC Design. In: ; 2006.
LibreCat
 
[123]
2006 | Conference Paper | LibreCat-ID: 38543
Schäfer R, Bleul S, Müller W. Dialog Modelling for Multiple Devices and Multiple Interaction Modalities. In: Proceedings of the 5th International Workshop on Task Models and Diagrams for User Interface Design (TAMODIA’2006). ; 2006. doi:10.1007/978-3-540-70816-2_4
LibreCat | DOI
 
[122]
2006 | Conference Paper | LibreCat-ID: 38784
Krupp A, Müller W. Classification Trees for Functional Coverage and Random Test Generation. In: Proceedings of the Design Automation & Test in Europe Conference. IEEE; 2006. doi:10.1109/DATE.2006.243902
LibreCat | DOI
 
[121]
2006 | Conference Paper | LibreCat-ID: 39028
Schäfer R, Ziegler M, Müller W. Securing Personal Data in Smart Home Environments. In: Proceedings of the Workshop on Privacy Enhanced Personalization (CHI 2006). ; 2006.
LibreCat
 
[120]
2006 | Conference Paper | LibreCat-ID: 38107
Großmann J, Müller W. A Formal Behavioral Semantics for TestML. In: Proc. of ISOLA 06. ; 2006. doi:10.1109/ISoLA.2006.37
LibreCat | DOI
 
[119]
2006 | Conference Paper | LibreCat-ID: 38109
Müller W, Rosti A, Bocchio S, Riccobene E. UML for ESL Design - Basic Principles, Tools, and Applications. In: Proc. of ICCAD’06. ; 2006.
LibreCat
 
[118]
2005 | Book Chapter | LibreCat-ID: 33822
Schattkowsky T, Müller W, Rettberg A. Model Based Specification for Platform Independent Hardware Execution. In: Martin G, Müller W, eds. UML for SoC Design. Kluwer; 2005:63-88.
LibreCat
 
[117]
2005 | Book Chapter | LibreCat-ID: 33824
Martin G, Müller W. When Worlds Collide: Can UML help SoC Design? In: Martin G, Müller W, eds. UML for SoC Design. Kluwer; 2005:1-15.
LibreCat
 
[116]
2005 | Conference Paper | LibreCat-ID: 39029
Schattkowsky T, Müller W, Rettberg A. A Model-Based Approach for Executable Specification on Reconfigurable Hardware. In: Proceedings of DATE’05. IEEE; 2005. doi:10.1109/DATE.2005.20
LibreCat | DOI
 
[115]
2005 | Conference Paper | LibreCat-ID: 39030
Schattkowsky T, Müller W. A UML Virtual Machine for Embedded Systems. In: Proceedings of ISNG 05. ; 2005.
LibreCat
 
[114]
2005 | Conference Paper | LibreCat-ID: 39032
Schattkowsky T, Müller W. Transformation of UML State Machines for Direct Execution. In: Proceedings of VL/HCC 05. ; 2005. doi:10.1109/VLHCC.2005.64
LibreCat | DOI
 
[113]
2005 | Conference Paper | LibreCat-ID: 39036
Krupp A, Müller W. Testmuster für nichtkontinuierliche Reglerelemente in der Klassifikationsbaummethode für eingebettete Systeme. Published online 2005.
LibreCat
 
[112]
2005 | Conference Paper | LibreCat-ID: 39038
Krupp A, Müller W. Modelchecking von Klassifikationsbaum-Testsequenzen. Published online 2005.
LibreCat
 
[111]
2005 | Conference Paper | LibreCat-ID: 39039
Zabel H, Müller W. Analyse von synchronen Kommunikationsnetzwerken durch laufzeiteffiziente formale Verifikation. Published online 2005.
LibreCat
 
[110]
2005 | Conference Paper | LibreCat-ID: 39041
Bleul S, Schäfer R, Müller W. A Dialog Model for Multi Device Interfaces with Different Modalities. In: Proceedings of the HCI International 2005. ; 2005.
LibreCat
 
[109]
2005 | Conference Paper | LibreCat-ID: 39050
Ziegler M, Müller W, Schäfer R, Loeser C. Secure Profile Management in Smart Home Networks. In: Proceedings of the 1st International Workshop on Secure and Ubiquitous Networks (SUN-2005). IEEE; 2005. doi:10.1109/DEXA.2005.171
LibreCat | DOI
 
[108]
2005 | Conference Paper | LibreCat-ID: 39052
Groppe J, Müller W. Profile Management technology for Smart Customization in Private Home Applications. In: Proceedings of the 1st International Workshop on Secure and Ubiquitous Networks (SUN-2005). IEEE; 2005. doi:10.1109/DEXA.2005.156
LibreCat | DOI
 
[107]
2004 | Book Chapter | LibreCat-ID: 33825
Flake S, Müller W, Pape U, Ruf J. Specification and Formal Verification of Temporal Properties of Production Automation Systems. In: Ehrig H, Damm W, Desel J, et al., eds. Integration of Software Specification Techniques for Applications in Engineering. Vol 3147. Lecture Notes in Computer Science. Springer-Verlag; 2004:206-226. doi:10.1007/978-3-540-27863-4_13
LibreCat | DOI
 
[106]
2004 | Book Chapter | LibreCat-ID: 33827
Schattkowsky T, Müller W, Pawlak A. Workflow Management Middleware for Secure Distance-Spanning Collaborative Engineering. In: Fischer L, ed. Workflow Handbook 2004. Workflow Management Coalition (WfMC); 2004.
LibreCat
 
[105]
2004 | Book Chapter | LibreCat-ID: 33830
Krupp A, Müller W. Refinement of Finite State Machines with Complementary Model Checking. In: Mermet J, ed. UML-B System Specification for Proven Electronic Design. Kluwer; 2004:155-168.
LibreCat
 
[104]
2004 | Book Chapter | LibreCat-ID: 33829
Krupp A, Müller W, Oliver I. Combining Formal Refinement and Model Checking for Analysis of Realtime Systems. In: Grimm Ch, ed. Best of FDL’03. Kluwer; 2004:301-314.
LibreCat
 
[103]
2004 | Book Chapter | LibreCat-ID: 33832
Krupp A, Müller W, Oliver I. The Echo Cancellation Unit Case Study. In: Mermet J, ed. UML-B System Specification for Proven Electronic Design. Kluwer; 2004:227-240.
LibreCat
 
[102]
2004 | Conference Paper | LibreCat-ID: 39053
Müller W, Schäfer R, Bleul S. Interactive Multimodal User Interfaces for Mobile Devices. In: Proceedings of HICCS-37. ; 2004. doi:10.1109/HICSS.2004.1265674
LibreCat | DOI
 
[101]
2004 | Conference Paper | LibreCat-ID: 39055
Zambaldi M, Ecker W, Kruse T, Müller W. The Formal Simulation Semantics of SystemVerilog. In: Proceedings of FDL’04. ; 2004.
LibreCat
 
[100]
2004 | Conference Paper | LibreCat-ID: 39060
Schattkowsky T, Müller W. Model-Based Specification and Execution of Embedded Real-Time Systems. In: Proceedings of DATE’04. ; 2004.
LibreCat
 
[99]
2004 | Conference Paper | LibreCat-ID: 39061
Krupp A, Müller W, Oliver I. Formal Refinement and Model Checking of An Echo Cancellation Unit. In: Proceedings of DATE’04 Designers’ Forum. ; 2004. doi:10.1109/DATE.2004.1269214
LibreCat | DOI
 
[98]
2004 | Conference Paper | LibreCat-ID: 39063
Müller W, Paelke V. A Formal Model of a Framework for Simulation-Based Animation. In: Proceedings of the Simulation and Visualisation 2004. ; 2004.
LibreCat
 
[97]
2004 | Conference Paper | LibreCat-ID: 39071
Schattkowsky T, Loeser C, Müller W. Peer-To-Peer Technology for Interconnecting Web Services in Heterogeneous Networks. In: Proceedings of AINA2004. IEEE; 2004. doi:10.1109/AINA.2004.1283977
LibreCat | DOI
 
[96]
2004 | Conference Paper | LibreCat-ID: 39069
Flake S, Müller W. Past- and Future-Oriented Time-Bound Temporal Properties with OCL. In: Proceedings of SEFM´04. IEEE; 2004. doi:10.1109/SEFM.2004.1347516
LibreCat | DOI
 
[95]
2004 | Conference Paper | LibreCat-ID: 39065
Gausemeier J, Müller W, Bauch J, Radkowski W, Shen T, Paelke V. Lösungselementbasiertes Virtual Prototyping von Selbstoptimierenden Mechatronischen Systemen in Virtual Reality. In: Proceedings of the Simulation and Visualisation 2004. ; 2004.
LibreCat
 
[94]
2004 | Conference Paper | LibreCat-ID: 39068
Schattkowsky T, Müller W. Model-Based Design of Embedded Systems. In: Proceedings of ISORC’04. ; 2004.
LibreCat
 
[93]
2004 | Conference Paper | LibreCat-ID: 39078
Gausemeier J, Müller W, Paelke V, Bauch J, Shen Q, Radkowski R. Virtual Prototyping Of Self-Optimizing Mechatronic Systems. In: Proceedings of the Design 2004. ; 2004.
LibreCat
 
[92]
2004 | Conference Paper | LibreCat-ID: 39075
Loeser C, Schäfer R, Müller W, Borowski M. RTMC - An Adaptive Fraemwork for Remote Tool Monitoring and Control. In: Proceedings of SCI’04. ; 2004.
LibreCat
 
[91]
2004 | Conference Paper | LibreCat-ID: 39082
Bleul S, Müller W, Schäfer R. Multimodal Dialog Description for Mobile Devices. In: Proceedings of AVI 2004. ; 2004.
LibreCat
 
[90]
2004 | Conference Paper | LibreCat-ID: 39350
Schäfer R, Bleul S, Müller W. A Novel Dialog Model for the Design of Multimodal User Interfaces. In: Proceedings of EHCI-DSVIS 2005. Lecture Notes in Computer Science . ; 2004.
LibreCat
 
[89]
2004 | Book (Editor) | LibreCat-ID: 53585
Müller W, Martin G, eds. Proceedings of the 1st International DAC Workshop of UML for SoC Design.; 2004.
LibreCat
 
[88]
2004 | Patent | LibreCat-ID: 53589
Dangberg A, Müller W. Control method for disposing graphical elements. Published online 2004.
LibreCat
 
[87]
2003 | Book Chapter | LibreCat-ID: 34446
Müller W, Ruf J, Rosenstiel W. An ASM Based SystemC Simulation Semantics. In: Müller W, Ruf J, Rosenstiel W, eds. SystemC - Methodologies and Applications. Kluwer; 2003:97-126. doi:10.1007/0-306-48735-7_4
LibreCat | DOI
 
[86]
2003 | Journal Article | LibreCat-ID: 34565
Flake S, Müller W. Formal Semantics of Static and Temporal State-Oriented OCL Constraints. Journal on Software and System Modeling (SoSyM). 2003;2(3):164-186. doi:10.1007/s10270-003-0026-x
LibreCat | DOI
 
[85]
2003 | Conference Paper | LibreCat-ID: 39357
Kostienko T, Müller W, Pawlak A, Schattkowsky T. An Advanced Infrastructure for Collaborative Engineering in Electronic Design Automation. In: Proceedings of CE 2003. ; 2003.
LibreCat
 
[84]
2003 | Conference Paper | LibreCat-ID: 39355
Loeser C, Müller W, Berger F, Eikerling H-J. Peer-to-Peer for Virtual Home Environments. In: Proceedings of HICCS-36. ; 2003.
LibreCat
 
[83]
2003 | Conference Paper | LibreCat-ID: 39354
Eikerling H-J, Müller W, Schattkowski T, Wegner J. Tool Integration and Management in Heterogeneous Computer Networks. In: Proceedings of DATE’03. ; 2003.
LibreCat
 
[82]
2003 | Conference Paper | LibreCat-ID: 39365
Schäfer R, Müller W. Adaptive profiles for Multi-Modal Interaction in Intelligent Frameworks. In: Proceedings of the Joint Workshop IJCAI Workshop on Artificial Intelligence, Information Access, and Mobile Computing. ; 2003.
LibreCat
 
[81]
2003 | Conference Paper | LibreCat-ID: 39364
Flake S, Müller W. Expressing Property Specification Patterns with OCL. In: Proceedings of SERP’03. ; 2003.
LibreCat
 
[80]
2003 | Conference Paper | LibreCat-ID: 39366
Schattkowsky T, Müller W. Distributed Engineering Environment for the Design of Electronic Systems. In: Proceedings of CCE’03. ; 2003.
LibreCat
 
[79]
2003 | Conference Paper | LibreCat-ID: 39363
Flake S, Müller W. Semantics of State-Oriented Expressions in the Object Constraint Language. In: Proceedings of SEKE 2003. ; 2003.
LibreCat
 
[78]
2003 | Conference Paper | LibreCat-ID: 39367
Wang J, Müller W. SmartCard for Secure Collaborative Engineering. In: Proceedings of CCE’03. ; 2003.
LibreCat
 
[77]
2003 | Conference Paper | LibreCat-ID: 39360
Krupp A, Müller W. Formale Verfeinerung und Modelchecking von zeitbehafteten endlichen Automaten. Published online 2003.
LibreCat
 
[76]
2003 | Conference Paper | LibreCat-ID: 39368
Krupp A, Müller W. Combining Formal Refinement and Model Checking for Analysis of Realtime Systems. In: Proceedings of FDL’03. ; 2003.
LibreCat
 
[75]
2003 | Conference Paper | LibreCat-ID: 39369
Flake S, Müller W. Formal Semantics of OCL Messages. In: Proceedings of the Workshop OCL 2.0 at UML 2003. ; 2003.
LibreCat
 
[74]
2002 | Book Chapter | LibreCat-ID: 34447
Flake S, Müller W. An OCL Extension for Real-Time Constraints. In: Clark T, Warmer J, eds. Advances in Object Modelling with the OCL. Springer-Verlag; 2002:150-171. doi:10.1007/3-540-45669-4_8
LibreCat | DOI
 
[73]
2002 | Journal Article | LibreCat-ID: 34576
Eikerling HJ, Müller W, Wegener J. Werkzeugintegration und -verwaltung in heterogenen Computernetzwerken. it+ti. Published online 2002:128-136.
LibreCat
 
[72]
2002 | Conference Paper | LibreCat-ID: 39371
Schäfer R, Dangberg A, Müller W. RDL/TT - A Description Language for Profile-Dependent Transcoding of XML Documents. In: Proceedings of the VHE Workshop. ; 2002.
LibreCat
 
[71]
2002 | Conference Paper | LibreCat-ID: 39370
Loeser C, Altenbernd P, Ditze M, Müller W. Distributed Video-on-Demand Services on Peer to Peer Basis. In: Proceedings of the Intl. Workshop on Real-Time LANs in the Internet Age (RTLIA 2002). ; 2002.
LibreCat
 
[70]
2002 | Conference Paper | LibreCat-ID: 39378
Schäfer R, Müller W, Dangberg A. Fuzzy Rules for the Transcoding of HTML Files. In: Proceedings of the HICSS-35. ; 2002.
LibreCat
 
[69]
2002 | Conference Paper | LibreCat-ID: 39398
Flake S, Müller W. A UML Profile for Real-Time Constraints with the OCL. In: Proceedings of the UML 2002 - The Unified Modeling Language. Springer-Verlag; 2002.
LibreCat
 
[68]
2002 | Conference Paper | LibreCat-ID: 39393
Dangelmeier W, Darnedde C, Flake S, Müller W, Pape U. Graphische Spezifikation und Echtzeitverifikation von Produktionsautomatisierungssystemen. Published online 2002.
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[67]
2002 | Conference Paper | LibreCat-ID: 39382
Müller W, Dömer R, Gerstlauer A. The Formal Execution Semantics of SpecC. In: Proceedings of the ISSS02. ; 2002. doi:10.1145/581199.581234
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[66]
2002 | Conference Paper | LibreCat-ID: 39387
Plomp J, Schäfer R, Müller W. Comparing Transcoding Tools for Use with a Generic User Interface Format. In: Proceedings of the Extreme Markup Languages 2002. ; 2002.
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[65]
2002 | Conference Paper | LibreCat-ID: 39403
Flake S, Müller W. Specification of Real-Time Properties for UML Models. In: Proceedings of HICSS-35. ; 2002. doi:10.1109/HICSS.2002.994469
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[264]
2024 | Conference Paper | LibreCat-ID: 45778
Luchterhandt L, Nellius T, Beck R, et al. Implementation of Different Communication Structures for a Rocket Chip Based RISC-V Grid of Processing Cells. In: MBMV 2024 - 27. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“. VDE Verlag; 2024.
LibreCat | Files available
 
[263]
2024 | Conference Paper | LibreCat-ID: 53579
Palomero Bernardo P, Schmid P, Bringmann O, et al. A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. In: DATE 24 - Design Automation and Test in Europe. ; 2024.
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[262]
2023 | Conference Paper | LibreCat-ID: 45775
Luchterhandt L, Nellius T, Beck R, et al. Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture. In: MBMV 2023 - 26. Workshop "Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen“, MBMV 2023, Freiburg. VDE Verlag; 2023.
LibreCat | Files available
 
[261]
2023 | Conference Paper | LibreCat-ID: 45776
Ecker W, Krstic M, Ulbricht M, et al. Scale4Edge – Scaling RISC-V for Edge Applications. In: RISC-V Summit Europe 2023, Barcelona, Spain, June 2023. ; 2023.
LibreCat | Files available
 
[260]
2023 | Conference Paper | LibreCat-ID: 48530
Müller W, Ulbricht M, Li L, Krstic M. Der TETRISC SoC - Ein resilientes Quad-Core System auf Pulpissimo-Basis. In: 5. ITG / GMM / GI -Workshop Testmethoden Und Zuverlässigkeit von Schaltungen Und Systemen . ; 2023.
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[259]
2023 | Conference Abstract | LibreCat-ID: 48961
Iftekhar M, Gowda H, Kneuper P, Sadiye B, Müller W, Scheytt C. A 28-Gb/s 27.2mW NRZ Full-Rate Bang-Bang Clock and Data Recovery in 22 nm FD-SOI CMOS Technology. In: 2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS). ; 2023. doi:10.1109/BCICTS54660.2023.10310954
LibreCat | Files available | DOI
 
[258]
2022 | Conference Paper | LibreCat-ID: 29302
Ecker W, Adelt P, Müller W, et al. The Scale4Edge RISC-V Ecosystem. In: In Proceedings of the Design Automation and Test Conference and Exhibition (DATE 2022). ; 2022.
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[257]
2021 | Conference Paper | LibreCat-ID: 32125
Adelt P, Koppelmann B, Müller W, Scheytt C. Register and Instruction Coverage Analysis for Different RISC-V ISA Modules. In: MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop. VDE; 2021.
LibreCat | Files available
 
[256]
2021 | Conference Paper | LibreCat-ID: 32132
Adelt P, Koppelmann B, Müller W, Scheytt C. QEMU zur Simulation von Worst-Case-Ausführungszeiten. In: MBMV 2021 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop. VDE; 2021.
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[255]
2021 | Conference Paper | LibreCat-ID: 23992
Adelt P, Koppelmann B, Müller W, Scheytt C. Register and Instruction Coverage Analysis for Different RISC-V ISA Modules. In: Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2021). ; 2021.
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[254]
2020 | Conference Paper | LibreCat-ID: 24027
Adelt P, Koppelmann B, Müller W, Scheytt C. A Scalable Platform for QEMU Based Fault Effect Analysis for RISC-V Hardware Architectures. In: MBMV 2020 - Methods and Description Languages for Modelling and Verification of Circuits and Systems; GMM/ITG/GI-Workshop. ; 2020.
LibreCat | Files available
 
[253]
2019 | Conference Paper | LibreCat-ID: 24058
Koppelmann B, Adelt P, Müller W, Scheytt C. RISC-V Extensions for Bit Manipulation Instructions. In: 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). ; 2019. doi:10.1109/PATMOS.2019.8862170
LibreCat | Files available | DOI
 
[252]
2019 | Conference Paper | LibreCat-ID: 24060
Adelt P, Koppelmann B, Müller W, Scheytt C. Analyse sicherheitskritischer Software für RISC-V Prozessoren. In: MBMV 2019-22.Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2019). ; 2019.
LibreCat | Files available
 
[251]
2019 | Conference Paper | LibreCat-ID: 24061
Adelt P, Koppelmann B, Müller W, Scheytt C, Driessen B. QEMU for Dynamic Memory Analysis of Security Sensitive Software. In: 2nd International Workshop on Embedded Software for Industrial IoT in Conjunction with DATE 2019. ; 2019:32-34.
LibreCat | Files available
 
[250]
2019 | Journal Article | LibreCat-ID: 24063
Adelt P, Koppelmann B, Müller W, Scheytt C. QEMU Support for RISC-V: Current State and Future Releases. 2nd International Workshop on RISC-V Research Activities. 2019;(Presentation).
LibreCat | Files available
 
[249]
2019 | Book (Editor) | LibreCat-ID: 53596
Bringmann O, Ecker W, Müller W, Müller-Gridschneder D, eds. Proceedings of the 2nd International Workshop on Embedded Software for Industrial IoT - ESIIT.; 2019.
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[248]
2018 | Journal Article | LibreCat-ID: 24194
Adelt P, Koppelmann B, Müller W. Current and Future RISC-V Activities for Virtual Prototyping and Chip Design. International Workshop on RISC-V Research Activities. 2018;Presentation.
LibreCat | Files available
 
[247]
2018 | Conference Paper | LibreCat-ID: 24196
Wu L, Hussain MK, Abughannam S, Müller W, Scheytt C, Ecker W. Analog fault simulation automation at schematic level with random sampling techniques. In: 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)) . IEEE; 2018. doi:10.1109/DTIS.2018.8368549
LibreCat | Files available | DOI
 
[246]
2018 | Book (Editor) | LibreCat-ID: 53595
Bringmann O, Ecker W, Müller W, Müller-Gridschneder D, eds. Proceedings of the 1st International Workshop on Embedded Software for Industrial IoT - ESIIT.; 2018.
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[245]
2017 | Conference Paper | LibreCat-ID: 24220
Adelt P, Koppelmann B, Müller W, Mueller-Gritschneder D, Kleinjohann B, Scheytt C. Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen. In: Tagungsband des Wissenschaftsforums Intelligente Technische Systeme. Verlagsschriftenreihe des Heinz Nixdorf Instituts; 2017. doi:10.17619/UNIPB/1-93
LibreCat | Files available | DOI
 
[244]
2017 | Conference Paper | LibreCat-ID: 24223
Wu L, Abughannam S, Müller W, Scheytt C, Ecker W. SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study. In: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES). ; 2017:68.
LibreCat | Files available
 
[243]
2017 | Conference Paper | LibreCat-ID: 24224
Adelt P, Koppelmann B, Müller W, Kleinjohann B, Scheytt C. ANALISA - A Tool for Static Instruction Set Analysis. In: Design Automation and Testing in Europe (DATE), University Booth Interactive Presentation. ; 2017.
LibreCat | Files available
 
[242]
2017 | Conference Paper | LibreCat-ID: 24225
Adelt P, Koppelmann B, Müller W, Kleinjohann B, Scheytt C. An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries. In: 2nd Workshop on Resiliency in Embedded Electronic Systems (REES) . ; 2017:44.
LibreCat | Files available
 
[241]
2016 | Conference Paper | LibreCat-ID: 24264
Adelt P, Koppelmann B, Müller W, Becker M, Kleinjohann B, Scheytt C. Fast Dynamic Fault Injection for Virtual Microcontroller Platforms. In: Proceedings of the IEEE/IFIP International Conference on VLSI (VLSI-SOC). ; 2016. doi:10.1109/VLSI-SoC.2016.7753545
LibreCat | Files available | DOI
 
[240]
2016 | Conference Paper | LibreCat-ID: 24263
Abughannam S, Wu L, Müller W, Scheytt C, Ecker W, Novello C. Fault Injection and Mixed-Level Simulation for Analog Circuits - A Case Study. In: Analog 2016 - VDE. ; 2016.
LibreCat | Files available
 
[239]
2015 | Conference Paper | LibreCat-ID: 24289
Müller W, Wu L, Scheytt C, Becker M, Schoenberg S. On the Correlation of HW Faults and SW Errors. In: Mueller-Gritschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems (REES 2014). ; 2015.
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[238]
2015 | Book (Editor) | LibreCat-ID: 53590
Müller-Gridschneder D, Müller W, Mitra S, eds. Proceedings of the 1st International Workshop on Resiliency in Embedded Electronic Systems.; 2015.
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[237]
2014 | Conference Paper | LibreCat-ID: 25145
Becker M, Kuznik C, Müller W. Virtual Platforms for Model-Based Design of Dependable Cyber-Physical System Software. In: 17th Euromicro Conference on Digital Systems Design (DSD). ; 2014.
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[236]
2014 | Conference Paper | LibreCat-ID: 25155
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Virtual Platform Framework for Cyber-Physical Systems. In: ACM/IEEE 5th International Conference on Cyber-Physical Systems. ; 2014.
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[235]
2014 | Conference Paper | LibreCat-ID: 25161
Koppelmann B, Becker M, Müller W. Portierung der TriCore-Architektur auf QEMU. In: 17. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV 2014) . ; 2014.
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[234]
2014 | Conference Paper | LibreCat-ID: 24305
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Modeling and Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014. doi:10.1109/SAMOS.2014.6893219
LibreCat | Files available | DOI
 
[233]
2014 | Journal Article | LibreCat-ID: 24302
Koppelmann B, Messidat B, Becker M, Kuznik C, Müller W, Scheytt C. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. Design and Verification Conference (DVCON EUROPE). Published online 2014.
LibreCat | Files available
 
[232]
2014 | Journal Article | LibreCat-ID: 24309
Kuznik C, Müller W. Verific-MM: Systematized Verification Metrics Generation with UCIS for Improved Automation on Verification Closure. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
LibreCat | Files available
 
[231]
2014 | Conference Paper | LibreCat-ID: 24311
Oetjens J-H, Becker M, Kuznik C, et al. Safety Evaluation of Automotive Electronics Using Virtual Prototypes: State of the Art and Research Challenges. In: Design Automation Conference (DAC). ; 2014. doi:10.1145/2593069.2602976
LibreCat | Files available | DOI
 
[230]
2014 | Conference Paper | LibreCat-ID: 25120
Mischkalla F, Müller W. Architectural Low-Power Design Using Transaction-Based System Simulation. In: Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV). IEEE; 2014.
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[229]
2014 | Conference Paper | LibreCat-ID: 25146
Joy M tech. MM, Müller W, Rammig F-J. Source code annotated memory leak detection for soft real time embedded systems with resource constraints. In: 12th IEEE International Conference on Embedded Computing. ; 2014.
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[228]
2014 | Conference Paper | LibreCat-ID: 25144
Mischkalla F, Müller W. Advanced SoC Virtual Prototyping for System-Level Power Planning and Validation. In: PATMOS 2014. ; 2014.
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[227]
2014 | Conference Paper | LibreCat-ID: 36918
Becker M, Kuznik C, Müller W. Fault Effect Modeling in a Heterogeneous SystemC Based Virtual Platform Framework for Cyber Physical Systems. In: IEEE; 2014. doi:10.1109/ICCPS.2014.6843726
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[226]
2014 | Conference Paper | LibreCat-ID: 36917
Kuznik C, Müller W, Defo GB. An Assisted Single Source Verification Metric Model Code Generation Methodology. In: ; 2014.
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[225]
2014 | Conference Paper | LibreCat-ID: 25166
Kuznik C, Müller W. Modellierung effizienter Stresstest-Umgebungen für virtuelle Prototypen mit SVM. In: 26. ITG / GI / GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen. ; 2014.
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[224]
2014 | Conference Paper | LibreCat-ID: 25163
Kuznik C, Defo BG, Müller W. Semi-automatische Generierung von Überdeckungsmetriken mittels methodischer Verikationsplan Verarbeitung. In: 17. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2014) . ; 2014.
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[223]
2014 | Journal Article | LibreCat-ID: 25151
Kuznik C, Defo BG, Müller W. An Assisted Single Source Verification Metric Model Code Generation Methodology. Electronic System Level Synthesis Conference (ESLSyn). Published online 2014.
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[222]
2014 | Conference Paper | LibreCat-ID: 34585
Koppelmann B, Messidat B, Becker M, Müller W, Scheytt JC. Fast and Open Virtual Platforms for TriCore-based SoCs Using QEMU. In: Proceedings of the Design and Verification Conference Europe (DVCON Europe). ; 2014.
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[221]
2014 | Journal Article | LibreCat-ID: 25164
Becker M, Müller W, Stroop J, Kiffmeier U. HeroeS - A Framework for Heterogeneous Software-Intensive System Design with SystemC. Design, Automation and Test in Europe DATE, University Booth, Dresden. Published online 2014.
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[220]
2013 | Conference Paper | LibreCat-ID: 25270
Joy M tech. MM, Müller W, Rammig F-J. Early Phase Memory Leak Detection in Embedded Software Designs with Virtual Memory Management Model. In: Proceedings of AVICPS 2013, Dez. 2013 IEEE Computer Society,. Linköping University Electronic Press; 2013.
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[219]
2013 | Conference Paper | LibreCat-ID: 25271
He D, Müller W. AN ENERGY-EFFICIENT HEURISTIC FOR HARD REAL- TIME SYSTEM ON MULTI-CORE PROCESSORS. In: Proceedings of International Conference on Applied Computing (AC). ; 2013.
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[218]
2013 | Conference Paper | LibreCat-ID: 25284
Mischkalla F, Müller W. Efficient Power Intent Validation Using Loosely-Timed Simulation Models. In: 23rd International Workshop on Power And Timing Modeling, Optimization and Simulation, Sep. 2013. ; 2013.
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[217]
2013 | Conference Paper | LibreCat-ID: 25291
Becker M, Kiffmeier U, Müller W. HeroeS: Virtual Platform Driven Integration of Heterogeneous Software Components for Multi-Core Real-Time Architectures. In: 16th IEEE Computer Society Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing. ; 2013.
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[216]
2013 | Conference Paper | LibreCat-ID: 25606
Kuznik C, F. S. Oliveira M, Müller W. SystemC Verification Components - An enhanced OVM/UVM for SystemC. In: EdaWorkshop 13. ; 2013.
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[215]
2013 | Conference Paper | LibreCat-ID: 25612
Mischkalla F, Müller W. Funktionale Verifikation von Low-Power Designs unter Verwendung Virtueller Prototypen. In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ; 2013.
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[214]
2013 | Conference Paper | LibreCat-ID: 25614
Kuznik C, F. S. Oliveira M, Müller W. SC OVM: An Advanced SystemC Library for OVM-based Verification. In: Open SANITAS SystemC Verification Workshop. ; 2013.
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[213]
2013 | Newspaper Article | LibreCat-ID: 25615
Engels G, Gerth C, Kleinjohann L, Kleinjohann B, Müller W. Informationstechnik spart Ressourcen. ForschungsForum Paderborn . 2013.
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[212]
2013 | Conference Paper | LibreCat-ID: 25620
Kuznik C, Oliveira MF, Defo B, Müller W. Systematic Application of UCIS to Improve the Automation on Verification Closure. In: Proceedings of DVCON. ; 2013.
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[211]
2013 | Conference Paper | LibreCat-ID: 25632
Klobedanz K, Jatzkowski J, Rettberg A, Müller W. Fault-Tolerant Deployment of Real-Time Software in AUTOSAR ECU Networks. In: International Embedded Systems Symposium (IESS) 2013. Springer; 2013.
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[210]
2013 | Journal Article | LibreCat-ID: 25740
He D, Müller W. A heuristic energy-aware approach for hard real-time systems on multi-core platforms. Microprocessors and Microsystems - Embedded Hardware Design 37(6-7). Published online 2013:845-857.
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[209]
2013 | Book Chapter | LibreCat-ID: 25743
Anacker H, Dellnitz M, Flaßkamp K, et al. Methods for the Design and Development. In: Design Methodology for Intelligent Technical Systems Systems – Develop Intelligent Technical Systems of the Future. Springer-Verlag; 2013:187-356.
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[208]
2013 | Conference Paper | LibreCat-ID: 36919
Mischkalla F, Müller W. Efficient Power-Intent Validation Using “Loosely-Timed” Simulation Models: A Non-Invasive Approach. In: IEEE; 2013. doi:10.1109/PATMOS.2013.6662171
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[207]
2013 | Conference Paper | LibreCat-ID: 36920
He D, Müller W. An Energy-Efficient Heuristic for Hard Real-Time System on Multi-Core Processors. In: Weghorn H, ed. Proceedings of the International Conference on Applied Computing (AC). ; 2013.
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[206]
2012 | Conference Paper | LibreCat-ID: 25744
Joy M tech. MM, Becker M, Mathews E, Müller W. Automated Source Code Annotation for Timing Analysis of Embedded Software. In: In Proceedings of Advanced Computing and Communications Conference 2012 (ADCOM 2012). IEEE; 2012.
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[205]
2012 | Conference Paper | LibreCat-ID: 25758
Becker M, Baldin D, Kuznik C, Joy M tech. MM, Xie T, Müller W. XEMU: An Efficient QEMU Based Binary Mutation Testing Framework for Embedded Software. In: EMSOFT’12: Teenth ACM International Conference on Embedded Software 2012 Proceedings . ; 2012.
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[204]
2012 | Conference Paper | LibreCat-ID: 25761
Oliveira MF, Kuznik C, Le HM, et al. The System Verification Methodology for Advanced TLM Verification. In: CODES/ISSS ’12: Eighth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Proceedings. ; 2012.
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[203]
2012 | Conference Paper | LibreCat-ID: 25767
He D, Müller W. A Heuristic Energy-Aware Approach for Hard Real-Time Systems on Multi-Core Platforms. In: 15th Euromicro Conference on Digital System Design (DSD). IEEE Xplore; 2012.
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[202]
2012 | Conference Paper | LibreCat-ID: 26022
Becker M, Kuznik C, Joy M tech. MM, Xie T, Müller W. Binary Mutation Testing Through Dynamic Translation. In: 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN). ; 2012.
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[201]
2012 | Conference Paper | LibreCat-ID: 26023
He D, Müller W. Enhanced Schedulability Analysis of Hard Real-Time Systems on Power Manageable Multi-Core Platforms. In: Third International Symposium on Advances in Embedded Systems and Applications (ESA-2012). IEEE Xplore; 2012.
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[200]
2012 | Conference Paper | LibreCat-ID: 26024
Radke S, Rülke S, Oliveira MF, et al. Compilation of Methodologies to Speed up the Verification Process at System Level. In: EdaWorkshop 12. ; 2012.
LibreCat | Download (ext.)
 
[199]
2012 | Conference Paper | LibreCat-ID: 26031
He D, Müller W. Online Energy-Efficient Hard Real-Time Scheduling for Component Oriented Systems. In: 2012 IEEE 15th International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC). IEEE Xplore; 2012.
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[198]
2012 | Conference Paper | LibreCat-ID: 26036
Oliveira MF, Kuznik C, Müller W, Ecker W, Esen V. A SystemC Library for Advanced TLM Verification. In: Proceeding of Design and Verification Conference (DVCON). ; 2012.
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[197]
2012 | Conference Paper | LibreCat-ID: 26079
Becker M, Gnokam Defo GB, Müller W, Fummi F, Pravadelli G, Vinco S. MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution. In: Design, Automation and Test in Europe (DATE 2012). ; 2012.
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[196]
2012 | Conference Paper | LibreCat-ID: 26080
Becker M, Kuznik C, Joy M tech. M, Xie T, Müller W. XEMU: A QEMU Based Binary Mutation Testing Framework. In: Design, Automation and Test in Europe DATE. ; 2012.
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[195]
2012 | Conference Paper | LibreCat-ID: 26092
Müller W, Becker M, Zabel H, Elfeky A, DiPasquale A. Virtual Prototyping of Cyber-Physical Systems. In: In Proceedings of 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012. ; 2012.
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[194]
2012 | Book Chapter | LibreCat-ID: 26695
Vanderperren Y, Müller W, He D, Mischkalla F, Dahaene W. Extending UML for Electronic Systems Design: A Code Generation Perspective. In: Nicolescu G, O’Connor I, Piguet C, eds. Design Technology for Heterogeneous Embedded Systems. 1st Edition. Auflage. Springer Verlag; 2012:13-39.
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[193]
2012 | Conference Paper | LibreCat-ID: 36922
Klobedanz K, Müller W, Rettberg A. An Approach for Self-Reconfiguring and Fault-Tolerant Distributed Real-Time Systems. In: IEEE; 2012. doi:10.1109/ISORCW.2012.41
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[192]
2012 | Conference Paper | LibreCat-ID: 36921
Oliveira MF, Kuznik C, Müller W, Esen V, Ecker W. Towards an Enhanced UVM for SystemC. In: Proceedings of the Design & Verification Conference (DVCon). ; 2012.
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[191]
2012 | Conference Paper | LibreCat-ID: 36994
Xie T, Müller W, Letombe F. Mutation-Analysis Driven Functional Verification of a Soft Microprocessor. In: Proceedings of SOCC2012. IEEE; 2012. doi:10.1109/SOCC.2012.6398362
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[190]
2012 | Conference Paper | LibreCat-ID: 36997
Xie T, Müller W. An IP-XACT-TO-SystemC Model Generator for Mutation Analysis. In: Proceedings of the MeCoES’12. ; 2012.
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[189]
2012 | Journal Article | LibreCat-ID: 26038
Kuznik C, Oliveira MF, Müller W. SYSTEMC UVM VERIFICATION COMPONENTS. Design, Automation and Test in Europe DATE. Published online 2012.
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[188]
2012 | Book (Editor) | LibreCat-ID: 53593
Müller W, Ecker W, eds. Proceedings of the 1st Workshop on Metamodelling and Code Generation for Embedded Systems - MeCoEs .; 2012.
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[187]
2011 | Conference Paper | LibreCat-ID: 26667
Kuznik C, Müller W. Aspect enhanced functional coverage driven verification in the SystemC HDVL. In: Proc. of the 8th International SoC Design Conference 2011 (ISOCC 2011). ; 2011.
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[186]
2011 | Conference Paper | LibreCat-ID: 26669
Xie T, Müller W. IP-XACT based System Level Mutation Testing. In: Proceedings of the 16th IEEE International High Level Design Validation and Test Workshop (HLDVT). ; 2011.
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[185]
2011 | Conference Paper | LibreCat-ID: 26698
Xie T, Müller W. HDL-Mutation Based Simulation Data Generation by Propagation Guided Search. In: Proceedings of the 14th Euromicro Conference on Digital System Design (DSD). ; 2011.
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[184]
2011 | Journal Article | LibreCat-ID: 26705
Kuznik C, Müller W. Verification Closure of SystemC Designs with Functional Coverage. North American SystemC User Group Meeting (16th). Published online 2011.
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[183]
2011 | Conference Paper | LibreCat-ID: 26710
Becker M, Zabel H, Müller W, Elfeky A, DiPasquale A. Virtual Prototyping softwareintensiver mechatronischer Systeme – Eine Fallstudie. In: 8. Paderborner Workshop Entwurf Mechatronischer Systeme, Band 294. Vol 294. Verlagsschriftenreihe des Heinz Nixdorf Instituts, Paderborn; 2011:315-327.
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[182]
2011 | Conference Paper | LibreCat-ID: 26713
Klobedanz K, König A, Müller W. A Reconfiguration Approach for Fault-Tolerant FlexRay Networks. In: Proceedings of Design, Automation, Test Europe - DATE2011. IEEE Computer Society Press; 2011.
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[181]
2011 | Conference Paper | LibreCat-ID: 26714
Klobedanz K, König A, Müller W, Rettberg A. Self-Reconfiguration for Fault-Tolerant FlexRay Networks. In: Second IEEE Workshop on Self-Organizing Real-Time Systems - SORT 2011. IEEE Computer Society Press; 2011.
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[180]
2011 | Conference Paper | LibreCat-ID: 26715
Kuznik C, Müller W. Functional Coverage-driven Verification with SystemC on Multiple Level of Abstraction. In: Proceedings of DVCON . ; 2011.
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[179]
2011 | Conference Paper | LibreCat-ID: 26716
Mischkalla F, He D, Müller W. A Retargetable SysML-based Front-End for High-Level Synthesis. In: Proceedings of 2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED). ; 2011.
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[178]
2011 | Conference Paper | LibreCat-ID: 26717
He D, Mischkalla F, Müller W. A SysML-based Framework with QEMU-SystemC Code Generation. In: Proceedings of 1st International QEMU Users Forum. ; 2011.
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[177]
2011 | Conference Paper | LibreCat-ID: 26784
Gnokam Defo GB, Müller W. Synchronisation eines SystemC Restbus-Simulators mit einem Hardware-In-the-Loop FlexRay Netzwerk. In: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV). ; 2011.
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[176]
2011 | Conference Paper | LibreCat-ID: 26789
Kuznik C, Müller W. Native binary mutation analysis for embedded software and virtual prototypes in SystemC. In: Proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing. ; 2011.
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[175]
2011 | Conference Paper | LibreCat-ID: 37001
Becker M, Zabel H, Müller W, Elfeky A. Virtual Prototyping software-intensiver mechatronischer Systeme - Eine Fallstudie. In: ; 2011.
LibreCat
 
[174]
2011 | Conference Paper | LibreCat-ID: 37005
Kuznik C, Müller W. A SystemC Based Library for Functional Coverage. In: ; 2011.
LibreCat
 
[173]
2011 | Conference Paper | LibreCat-ID: 37006
Klobedanz K, König A, Müller W. A Reconfiguration Approach for Faul-Tolerant FlexRay Networks. In: Proceedings of DATE’11. IEEE; 2011. doi:10.1109/DATE.2011.5763022
LibreCat | DOI
 
[172]
2011 | Book (Editor) | LibreCat-ID: 53580
Müller W, Petrot F, eds. Proceedings of the 1st International QEMU Users’ Forum.; 2011.
LibreCat
 
[171]
2010 | Conference Paper | LibreCat-ID: 37007
Mischkalla F, He D, Müller W. Closing the Gap between UML-based Modeling and Simulation of Combined HW/SW Systems. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456990
LibreCat | DOI
 
[170]
2010 | Conference Paper | LibreCat-ID: 37009
Oliveira MFS, Zabel H, Müller W. Assertion-Based Verification of RTOS Properties. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5457130
LibreCat | DOI
 
[169]
2010 | Conference Paper | LibreCat-ID: 37011
Klobedanz K, Kuznik C, Thuy A, Müller W. Timing Modeling and Analysis for AUTOSAR-Based Software Development - A Case Study. In: Proceedings of DATE’10, Dresden. IEEE; 2010. doi:10.1109/DATE.2010.5457125
LibreCat | DOI
 
[168]
2010 | Conference Paper | LibreCat-ID: 37037
Krupp A, Müller W. A Systematic Approach to Combined HW/SW System Test. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5457186
LibreCat | DOI
 
[167]
2010 | Conference Paper | LibreCat-ID: 37040
Becker M, Di Guglielmo G, Fummi F, Müller W, Pravadelli G, Xie T. RTOS-Aware Refinement for TLM2.0-based HW/SW Design. In: Proceedings of DATE’10. IEEE; 2010. doi:10.1109/DATE.2010.5456965
LibreCat | DOI
 
[166]
2010 | Conference Paper | LibreCat-ID: 37046
Becker M, Zabel H, Müller W. A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_15
LibreCat | DOI
 
[165]
2010 | Conference Paper | LibreCat-ID: 37044
Klobedanz K, Defo GB, Zabel H, Müller W, Zhi Y. Task Migration for Fault-Tolerant FlexRay Networks. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_7
LibreCat | DOI
 
[164]
2010 | Conference Paper | LibreCat-ID: 37042
Mischkalla F, Müller W, He D. A UML Profile for SysML-Based Comodeling for Embedded Systems Simulation and Synthesis. In: Proceedings of the M-BED Workshop. ; 2010.
LibreCat
 
[163]
2010 | Conference Paper | LibreCat-ID: 37043
Bol A, Müller W, Krupp A. Eine strukturierte Methode zur Generierung von SystemVerilog-Testumgebungen aus textuellen Anforderungsbeschreibungen. In: Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation von Schaltungen Und Systemen (MBMV). ; 2010.
LibreCat
 
[162]
2010 | Conference Paper | LibreCat-ID: 37050
Müller W, He D, Mischkalla F, et al. The SATURN Approach to SysML-based HW/SW Codesign. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI. Lecture Notes in Electrical Engineering. ; 2010. doi:10.1007/978-94-007-1488-5_9
LibreCat | DOI
 
[161]
2010 | Conference Paper | LibreCat-ID: 37048
Müller W, Bol A, Krupp A, Lundkvist O. Generation of Executable Testbenches from Natural Language Requirement Specifications for Embedded Real-Time Systems. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010. doi:10.1007/978-3-642-15234-4_9
LibreCat | DOI
 
[160]
2010 | Conference Paper | LibreCat-ID: 37049
Xie T, Letombe F, Müller W. Mutation-Analysis Directed Constrained Random Verification. In: Kleinjohann L, Kleinjohann B, eds. Springer Verlag; 2010.
LibreCat
 
[159]
2010 | Conference Paper | LibreCat-ID: 37051
Xie T, Defo GB, Müller W. An Eclipse-based Framework for the IP-XACT-enabled Assembly of Mixed-Level IPs. In: ; 2010.
LibreCat
 
[158]
2010 | Conference Paper | LibreCat-ID: 37057
Defo GB, Müller W, Kuznik C. Verification of a CAN Bus Model in SystemC with Functional Coverage. In: Proceedings of SIES 2010. IEEE; 2010. doi:10.1109/SIES.2010.5551379
LibreCat | DOI
 
[157]
2010 | Conference Paper | LibreCat-ID: 37056
Klobedanz K, Defo GB, Müller W, Kerstan T. Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks. In: Proceedings of SIES 2010. ; 2010. doi:10.1109/SIES.2010.5551384
LibreCat | DOI
 
[156]
2010 | Conference Paper | LibreCat-ID: 37053
Müller W, da S. Oliveira MF, Zabel H, Becker M. Verification of Real-Time Properties for Hardware-Dependant Software. In: Proceedings of HLDVT2010. IEEE; 2010.
LibreCat
 
[155]
2010 | Conference Paper | LibreCat-ID: 37060
Oliveira MFS, do Nascimento FAM, Müller W. Design Space Abstraction and Metamodeling for Embedded Systems Design Space Exploration. In: Proceedings of MoMPES 2010. ; 2010.
LibreCat
 
[154]
2010 | Book (Editor) | LibreCat-ID: 53582
Gerard S, Müller W, Rioux L, Selic B, eds. Proceedings of the 1st Workshop on Model Based Engineering for Embedded Systems Design.; 2010.
LibreCat
 
[153]
2009 | Book Chapter | LibreCat-ID: 33813
Zabel H, Müller W, Gerstlauer A. Accurate RTOS Modelling and Analysis with SystemC. In: Ecker W, Müller W, Dömer R, eds. Hardware Dependent Software - Principles and Practice. Springer Verlag; 2009:233-260. doi:10.1007/978-1-4020-9436-1_9
LibreCat | DOI
 
[152]
2009 | Book Chapter | LibreCat-ID: 33814
Ecker W, Müller W, Dömer R. Hardware-dependent Software - Introduction and Overview. In: Ecker W, Müller W, Dömer R, eds. Hardware Dependent Software - Principles and Practice. Springer Verlag; 2009:1-14. doi:10.1007/978-1-4020-9436-1_1
LibreCat | DOI
 
[151]
2009 | Conference Paper | LibreCat-ID: 37067
Schattkowsky T, Xie T, Müller W. A UML Frontend for IP-XACT-based IP Management. In: Proceedings of DATE’09. IEEE; 2009. doi:10.1109/DATE.2009.5090664
LibreCat | DOI
 
[150]
2009 | Conference Paper | LibreCat-ID: 37066
Zabel H, Müller W. Increased Accuracy through Noise Injection in Abstract RTOS Simulation. In: Proceedings of DATE’09. ; 2009. doi:10.1109/DATE.2009.5090925
LibreCat | DOI
 
[149]
2009 | Conference Paper | LibreCat-ID: 37063
Klobedanz K, Kuznik C, Elfeky A, Müller W. Development of Automotive Communication Based Real-Time Systems - A Steer-by-Wire Case Study. In: Proceedings of IESS09. Springer Verlag; 2009. doi:10.1007/978-3-642-04284-3_20
LibreCat | DOI
 
[148]
2009 | Conference Paper | LibreCat-ID: 37064
Becker M, Zabel H, Müller W. Integration abstrakter RTOS-Simulation in den Entwurf eingebetteter automobiler E/E-Systeme. In: ; 2009.
LibreCat
 
[147]
2009 | Conference Paper | LibreCat-ID: 37061
Krupp A, Müller W. Systematic Model-in-the-Loop Test of Embedded Control Systems. In: Proceedings of IESS09. ; 2009.
LibreCat
 
[146]
2009 | Conference Paper | LibreCat-ID: 37068
Doemer R, Gerstlauer A, Müller W. Hardware-dependent Software for Multi- and Many-Core Embedded Systems. In: Proceedings of ASP-DAC’09. ; 2009.
LibreCat
 
[145]
2009 | Book (Editor) | LibreCat-ID: 40119
Ecker W, Müller W, Dömer R, eds. Hardware-Dependent Software. Springer Netherlands; 2009. doi:10.1007/978-1-4020-9436-1
LibreCat | DOI
 
[144]
2008 | Journal Article | LibreCat-ID: 34563
Vanderperren Y, Müller W, Dahaene W. UML for Electronic Systems Design – A Comprehensive Overview. Design Automation for Embedded Systems. 2008;12:261-292. doi:10.1007/s10617-008-9028-9
LibreCat | DOI
 
[143]
2008 | Journal Article | LibreCat-ID: 34564
Schäfer R, Müller W. Assessment of a Multimodal Interaction and Rendering System against Established Design Principles. Journal on Multimodal User Interfaces. 2008;2(1):25-41. doi:10.1007/s12193-008-0003-3
LibreCat | DOI
 
[142]
2008 | Book Chapter | LibreCat-ID: 33815
Großmann J, Fey I, Krupp A, Conrad M, Wewetzer C, Müller W. TestML – A Test Exchange Language for Model-based Testing of Embedded Software. In: Broy M, Krüger IH, Meisinger M, eds. ASWSD 2006: Model-Driven Development of Reliable Automotive Services. Springer Verlag; 2008:98-117. doi:10.1007/978-3-540-70930-5_7
LibreCat | DOI
 
[141]
2008 | Conference Paper | LibreCat-ID: 37075
Zabel H, Müller W. An Efficient Time Annotation Technique in Abstract RTOS Simulations for Multiprocessor Task Migration. Kleinjohann L, Kleinjohann B, eds. 2008;271. doi:10.1007/978-0-387-09661-2_18
LibreCat | DOI
 
[140]
2008 | Conference Paper | LibreCat-ID: 37072
Zabel H, Müller W. Präzises Interrupt Scheduling in abstrakten RTOS Modellen in SystemC. In: Scholl Ch, Disch S, eds. Methoden Und Beschreibungs-Sprachen Zur Modellierung Und Verifikation von Schaltungen Und System. Shaker Verlag; 2008.
LibreCat
 
[139]
2008 | Book (Editor) | LibreCat-ID: 53583
Müller W, Wolfe J, eds. Proceedings of the 5th International DAC Workshop of UML for SoC Design.; 2008.
LibreCat
 
[138]
2008 | Book (Editor) | LibreCat-ID: 53594
Wolfe J, Müller W, eds. Proceedings of the 4th DAC Workshop on UML for SOC Design .; 2008.
LibreCat
 
[137]
2007 | Conference Paper | LibreCat-ID: 37076
Zabel H, Müller W. Simulation mit abstrakten RTOS Modellen in SystemC. 2007;6(4).
LibreCat
 
[136]
2007 | Conference Paper | LibreCat-ID: 37083
Krupp A, Müller W. Systematic Testbench Specification for Constrained Randomized Test and Functional Coverage. In: Proceedings of the 21st European Conference on Modelling and Simulation (ECMS 2007). ; 2007.
LibreCat
 
[135]
2007 | Conference Paper | LibreCat-ID: 37080
Großmann J, Fey I, Conrad M, Wewetzer Ch, Müller W. TestML - A Test Exchange Language for Model-based Testing of Embedded Software. In: Proceedings of the Automotive Software Workshop ’06. ; 2007.
LibreCat
 
[134]
2007 | Conference Paper | LibreCat-ID: 37079
Müller W. On the Use and Misuse of UML- Application of Diagrams in Engineering. In: Proceedings of the UML for SoC Design Workshop at DAC’07. ; 2007.
LibreCat
 
[133]
2007 | Conference Paper | LibreCat-ID: 37085
Schäfer R, Müller W, Marin-López A, Díaz-Sánchez D. Using Smart Cards for Secure and Device Independent User Interfaces. In: Proceedings of the International Conference on Mobile Technology, Applications and Systems (Mobility 2007). ; 2007.
LibreCat
 
[132]
2007 | Conference Paper | LibreCat-ID: 38106
Marin A, Müller W, Schäfer R, Almenarez F, Diaz D, Ziegler M. Middleware for Secure Home Access and Control. In: Proc. of the IEEE PerCom Middleware Support for Pervasive Computing (PerWare 2007). IEEE; 2007.
LibreCat
 
[131]
2007 | Conference Paper | LibreCat-ID: 38100
Schäfer R, Müller W, Marin-López A, Díaz-Sánchez D. Device Independent User Interfaces for Smart Cards. In: Proceedings of the 9th International Conference on Human Computer Interaction with Mobile Devices and Services (MobileHCI2007). ; 2007.
LibreCat
 
[130]
2007 | Conference Paper | LibreCat-ID: 38104
Schäfer R, Müller W, Deimann R, Kleinjohann B. A Low-Cost Positioning System for Location-Aware Applications in Smart Homes. In: Proceedings of the Workshop on Mobile Spatial Interaction at CHI 2007. ; 2007.
LibreCat
 
[129]
2007 | Conference Paper | LibreCat-ID: 38102
Schäfer R, Müller W. Evaluation of a Multimodal System Based on Dialogue Models and Transformations International Workshop on Usability of User Interfaces: From Monomodal to Multimodal. In: Proceedings of IWUMUI’2007 at HCI’2007. ; 2007.
LibreCat
 
[128]
2006 | Conference Paper | LibreCat-ID: 38533
Müller W, Vanderperren Y. UML and Model-Driven Development for SoC Design. In: Proceedings of CODES/ISSS. ; 2006.
LibreCat
 
[127]
2006 | Conference Paper | LibreCat-ID: 38537
Schäfer R, Müller W, Groppe J. Profile Processing and Evolution for Smart Environments. In: Proceedings of the 3rd International Conference on Ubiquitous Intelligence and Computing (UIC-06). ; 2006.
LibreCat
 
[126]
2006 | Conference Paper | LibreCat-ID: 38538
Müller W, Zabel H. Towards a Unified Behavioural Modelling Language. In: Proceedings of the UML-SoC Workshop at DAC 2006. ; 2006.
LibreCat
 
[125]
2006 | Conference Paper | LibreCat-ID: 38536
Müller W. UML - The Emerging Hardware Description Language? In: Proc. of FDL’06. ; 2006.
LibreCat
 
[124]
2006 | Conference Paper | LibreCat-ID: 38540
Lavagno L, Müller W. UML: A Next Generation Language for SoC Design. In: ; 2006.
LibreCat
 
[123]
2006 | Conference Paper | LibreCat-ID: 38543
Schäfer R, Bleul S, Müller W. Dialog Modelling for Multiple Devices and Multiple Interaction Modalities. In: Proceedings of the 5th International Workshop on Task Models and Diagrams for User Interface Design (TAMODIA’2006). ; 2006. doi:10.1007/978-3-540-70816-2_4
LibreCat | DOI
 
[122]
2006 | Conference Paper | LibreCat-ID: 38784
Krupp A, Müller W. Classification Trees for Functional Coverage and Random Test Generation. In: Proceedings of the Design Automation & Test in Europe Conference. IEEE; 2006. doi:10.1109/DATE.2006.243902
LibreCat | DOI
 
[121]
2006 | Conference Paper | LibreCat-ID: 39028
Schäfer R, Ziegler M, Müller W. Securing Personal Data in Smart Home Environments. In: Proceedings of the Workshop on Privacy Enhanced Personalization (CHI 2006). ; 2006.
LibreCat
 
[120]
2006 | Conference Paper | LibreCat-ID: 38107
Großmann J, Müller W. A Formal Behavioral Semantics for TestML. In: Proc. of ISOLA 06. ; 2006. doi:10.1109/ISoLA.2006.37
LibreCat | DOI
 
[119]
2006 | Conference Paper | LibreCat-ID: 38109
Müller W, Rosti A, Bocchio S, Riccobene E. UML for ESL Design - Basic Principles, Tools, and Applications. In: Proc. of ICCAD’06. ; 2006.
LibreCat
 
[118]
2005 | Book Chapter | LibreCat-ID: 33822
Schattkowsky T, Müller W, Rettberg A. Model Based Specification for Platform Independent Hardware Execution. In: Martin G, Müller W, eds. UML for SoC Design. Kluwer; 2005:63-88.
LibreCat
 
[117]
2005 | Book Chapter | LibreCat-ID: 33824
Martin G, Müller W. When Worlds Collide: Can UML help SoC Design? In: Martin G, Müller W, eds. UML for SoC Design. Kluwer; 2005:1-15.
LibreCat
 
[116]
2005 | Conference Paper | LibreCat-ID: 39029
Schattkowsky T, Müller W, Rettberg A. A Model-Based Approach for Executable Specification on Reconfigurable Hardware. In: Proceedings of DATE’05. IEEE; 2005. doi:10.1109/DATE.2005.20
LibreCat | DOI
 
[115]
2005 | Conference Paper | LibreCat-ID: 39030
Schattkowsky T, Müller W. A UML Virtual Machine for Embedded Systems. In: Proceedings of ISNG 05. ; 2005.
LibreCat
 
[114]
2005 | Conference Paper | LibreCat-ID: 39032
Schattkowsky T, Müller W. Transformation of UML State Machines for Direct Execution. In: Proceedings of VL/HCC 05. ; 2005. doi:10.1109/VLHCC.2005.64
LibreCat | DOI
 
[113]
2005 | Conference Paper | LibreCat-ID: 39036
Krupp A, Müller W. Testmuster für nichtkontinuierliche Reglerelemente in der Klassifikationsbaummethode für eingebettete Systeme. Published online 2005.
LibreCat
 
[112]
2005 | Conference Paper | LibreCat-ID: 39038
Krupp A, Müller W. Modelchecking von Klassifikationsbaum-Testsequenzen. Published online 2005.
LibreCat
 
[111]
2005 | Conference Paper | LibreCat-ID: 39039
Zabel H, Müller W. Analyse von synchronen Kommunikationsnetzwerken durch laufzeiteffiziente formale Verifikation. Published online 2005.
LibreCat
 
[110]
2005 | Conference Paper | LibreCat-ID: 39041
Bleul S, Schäfer R, Müller W. A Dialog Model for Multi Device Interfaces with Different Modalities. In: Proceedings of the HCI International 2005. ; 2005.
LibreCat
 
[109]
2005 | Conference Paper | LibreCat-ID: 39050
Ziegler M, Müller W, Schäfer R, Loeser C. Secure Profile Management in Smart Home Networks. In: Proceedings of the 1st International Workshop on Secure and Ubiquitous Networks (SUN-2005). IEEE; 2005. doi:10.1109/DEXA.2005.171
LibreCat | DOI
 
[108]
2005 | Conference Paper | LibreCat-ID: 39052
Groppe J, Müller W. Profile Management technology for Smart Customization in Private Home Applications. In: Proceedings of the 1st International Workshop on Secure and Ubiquitous Networks (SUN-2005). IEEE; 2005. doi:10.1109/DEXA.2005.156
LibreCat | DOI
 
[107]
2004 | Book Chapter | LibreCat-ID: 33825
Flake S, Müller W, Pape U, Ruf J. Specification and Formal Verification of Temporal Properties of Production Automation Systems. In: Ehrig H, Damm W, Desel J, et al., eds. Integration of Software Specification Techniques for Applications in Engineering. Vol 3147. Lecture Notes in Computer Science. Springer-Verlag; 2004:206-226. doi:10.1007/978-3-540-27863-4_13
LibreCat | DOI
 
[106]
2004 | Book Chapter | LibreCat-ID: 33827
Schattkowsky T, Müller W, Pawlak A. Workflow Management Middleware for Secure Distance-Spanning Collaborative Engineering. In: Fischer L, ed. Workflow Handbook 2004. Workflow Management Coalition (WfMC); 2004.
LibreCat
 
[105]
2004 | Book Chapter | LibreCat-ID: 33830
Krupp A, Müller W. Refinement of Finite State Machines with Complementary Model Checking. In: Mermet J, ed. UML-B System Specification for Proven Electronic Design. Kluwer; 2004:155-168.
LibreCat
 
[104]
2004 | Book Chapter | LibreCat-ID: 33829
Krupp A, Müller W, Oliver I. Combining Formal Refinement and Model Checking for Analysis of Realtime Systems. In: Grimm Ch, ed. Best of FDL’03. Kluwer; 2004:301-314.
LibreCat
 
[103]
2004 | Book Chapter | LibreCat-ID: 33832
Krupp A, Müller W, Oliver I. The Echo Cancellation Unit Case Study. In: Mermet J, ed. UML-B System Specification for Proven Electronic Design. Kluwer; 2004:227-240.
LibreCat
 
[102]
2004 | Conference Paper | LibreCat-ID: 39053
Müller W, Schäfer R, Bleul S. Interactive Multimodal User Interfaces for Mobile Devices. In: Proceedings of HICCS-37. ; 2004. doi:10.1109/HICSS.2004.1265674
LibreCat | DOI
 
[101]
2004 | Conference Paper | LibreCat-ID: 39055
Zambaldi M, Ecker W, Kruse T, Müller W. The Formal Simulation Semantics of SystemVerilog. In: Proceedings of FDL’04. ; 2004.
LibreCat
 
[100]
2004 | Conference Paper | LibreCat-ID: 39060
Schattkowsky T, Müller W. Model-Based Specification and Execution of Embedded Real-Time Systems. In: Proceedings of DATE’04. ; 2004.
LibreCat
 
[99]
2004 | Conference Paper | LibreCat-ID: 39061
Krupp A, Müller W, Oliver I. Formal Refinement and Model Checking of An Echo Cancellation Unit. In: Proceedings of DATE’04 Designers’ Forum. ; 2004. doi:10.1109/DATE.2004.1269214
LibreCat | DOI
 
[98]
2004 | Conference Paper | LibreCat-ID: 39063
Müller W, Paelke V. A Formal Model of a Framework for Simulation-Based Animation. In: Proceedings of the Simulation and Visualisation 2004. ; 2004.
LibreCat
 
[97]
2004 | Conference Paper | LibreCat-ID: 39071
Schattkowsky T, Loeser C, Müller W. Peer-To-Peer Technology for Interconnecting Web Services in Heterogeneous Networks. In: Proceedings of AINA2004. IEEE; 2004. doi:10.1109/AINA.2004.1283977
LibreCat | DOI
 
[96]
2004 | Conference Paper | LibreCat-ID: 39069
Flake S, Müller W. Past- and Future-Oriented Time-Bound Temporal Properties with OCL. In: Proceedings of SEFM´04. IEEE; 2004. doi:10.1109/SEFM.2004.1347516
LibreCat | DOI
 
[95]
2004 | Conference Paper | LibreCat-ID: 39065
Gausemeier J, Müller W, Bauch J, Radkowski W, Shen T, Paelke V. Lösungselementbasiertes Virtual Prototyping von Selbstoptimierenden Mechatronischen Systemen in Virtual Reality. In: Proceedings of the Simulation and Visualisation 2004. ; 2004.
LibreCat
 
[94]
2004 | Conference Paper | LibreCat-ID: 39068
Schattkowsky T, Müller W. Model-Based Design of Embedded Systems. In: Proceedings of ISORC’04. ; 2004.
LibreCat
 
[93]
2004 | Conference Paper | LibreCat-ID: 39078
Gausemeier J, Müller W, Paelke V, Bauch J, Shen Q, Radkowski R. Virtual Prototyping Of Self-Optimizing Mechatronic Systems. In: Proceedings of the Design 2004. ; 2004.
LibreCat
 
[92]
2004 | Conference Paper | LibreCat-ID: 39075
Loeser C, Schäfer R, Müller W, Borowski M. RTMC - An Adaptive Fraemwork for Remote Tool Monitoring and Control. In: Proceedings of SCI’04. ; 2004.
LibreCat
 
[91]
2004 | Conference Paper | LibreCat-ID: 39082
Bleul S, Müller W, Schäfer R. Multimodal Dialog Description for Mobile Devices. In: Proceedings of AVI 2004. ; 2004.
LibreCat
 
[90]
2004 | Conference Paper | LibreCat-ID: 39350
Schäfer R, Bleul S, Müller W. A Novel Dialog Model for the Design of Multimodal User Interfaces. In: Proceedings of EHCI-DSVIS 2005. Lecture Notes in Computer Science . ; 2004.
LibreCat
 
[89]
2004 | Book (Editor) | LibreCat-ID: 53585
Müller W, Martin G, eds. Proceedings of the 1st International DAC Workshop of UML for SoC Design.; 2004.
LibreCat
 
[88]
2004 | Patent | LibreCat-ID: 53589
Dangberg A, Müller W. Control method for disposing graphical elements. Published online 2004.
LibreCat
 
[87]
2003 | Book Chapter | LibreCat-ID: 34446
Müller W, Ruf J, Rosenstiel W. An ASM Based SystemC Simulation Semantics. In: Müller W, Ruf J, Rosenstiel W, eds. SystemC - Methodologies and Applications. Kluwer; 2003:97-126. doi:10.1007/0-306-48735-7_4
LibreCat | DOI
 
[86]
2003 | Journal Article | LibreCat-ID: 34565
Flake S, Müller W. Formal Semantics of Static and Temporal State-Oriented OCL Constraints. Journal on Software and System Modeling (SoSyM). 2003;2(3):164-186. doi:10.1007/s10270-003-0026-x
LibreCat | DOI
 
[85]
2003 | Conference Paper | LibreCat-ID: 39357
Kostienko T, Müller W, Pawlak A, Schattkowsky T. An Advanced Infrastructure for Collaborative Engineering in Electronic Design Automation. In: Proceedings of CE 2003. ; 2003.
LibreCat
 
[84]
2003 | Conference Paper | LibreCat-ID: 39355
Loeser C, Müller W, Berger F, Eikerling H-J. Peer-to-Peer for Virtual Home Environments. In: Proceedings of HICCS-36. ; 2003.
LibreCat
 
[83]
2003 | Conference Paper | LibreCat-ID: 39354
Eikerling H-J, Müller W, Schattkowski T, Wegner J. Tool Integration and Management in Heterogeneous Computer Networks. In: Proceedings of DATE’03. ; 2003.
LibreCat
 
[82]
2003 | Conference Paper | LibreCat-ID: 39365
Schäfer R, Müller W. Adaptive profiles for Multi-Modal Interaction in Intelligent Frameworks. In: Proceedings of the Joint Workshop IJCAI Workshop on Artificial Intelligence, Information Access, and Mobile Computing. ; 2003.
LibreCat
 
[81]
2003 | Conference Paper | LibreCat-ID: 39364
Flake S, Müller W. Expressing Property Specification Patterns with OCL. In: Proceedings of SERP’03. ; 2003.
LibreCat
 
[80]
2003 | Conference Paper | LibreCat-ID: 39366
Schattkowsky T, Müller W. Distributed Engineering Environment for the Design of Electronic Systems. In: Proceedings of CCE’03. ; 2003.
LibreCat
 
[79]
2003 | Conference Paper | LibreCat-ID: 39363
Flake S, Müller W. Semantics of State-Oriented Expressions in the Object Constraint Language. In: Proceedings of SEKE 2003. ; 2003.
LibreCat
 
[78]
2003 | Conference Paper | LibreCat-ID: 39367
Wang J, Müller W. SmartCard for Secure Collaborative Engineering. In: Proceedings of CCE’03. ; 2003.
LibreCat
 
[77]
2003 | Conference Paper | LibreCat-ID: 39360
Krupp A, Müller W. Formale Verfeinerung und Modelchecking von zeitbehafteten endlichen Automaten. Published online 2003.
LibreCat
 
[76]
2003 | Conference Paper | LibreCat-ID: 39368
Krupp A, Müller W. Combining Formal Refinement and Model Checking for Analysis of Realtime Systems. In: Proceedings of FDL’03. ; 2003.
LibreCat
 
[75]
2003 | Conference Paper | LibreCat-ID: 39369
Flake S, Müller W. Formal Semantics of OCL Messages. In: Proceedings of the Workshop OCL 2.0 at UML 2003. ; 2003.
LibreCat
 
[74]
2002 | Book Chapter | LibreCat-ID: 34447
Flake S, Müller W. An OCL Extension for Real-Time Constraints. In: Clark T, Warmer J, eds. Advances in Object Modelling with the OCL. Springer-Verlag; 2002:150-171. doi:10.1007/3-540-45669-4_8
LibreCat | DOI
 
[73]
2002 | Journal Article | LibreCat-ID: 34576
Eikerling HJ, Müller W, Wegener J. Werkzeugintegration und -verwaltung in heterogenen Computernetzwerken. it+ti. Published online 2002:128-136.
LibreCat
 
[72]
2002 | Conference Paper | LibreCat-ID: 39371
Schäfer R, Dangberg A, Müller W. RDL/TT - A Description Language for Profile-Dependent Transcoding of XML Documents. In: Proceedings of the VHE Workshop. ; 2002.
LibreCat
 
[71]
2002 | Conference Paper | LibreCat-ID: 39370
Loeser C, Altenbernd P, Ditze M, Müller W. Distributed Video-on-Demand Services on Peer to Peer Basis. In: Proceedings of the Intl. Workshop on Real-Time LANs in the Internet Age (RTLIA 2002). ; 2002.
LibreCat
 
[70]
2002 | Conference Paper | LibreCat-ID: 39378
Schäfer R, Müller W, Dangberg A. Fuzzy Rules for the Transcoding of HTML Files. In: Proceedings of the HICSS-35. ; 2002.
LibreCat
 
[69]
2002 | Conference Paper | LibreCat-ID: 39398
Flake S, Müller W. A UML Profile for Real-Time Constraints with the OCL. In: Proceedings of the UML 2002 - The Unified Modeling Language. Springer-Verlag; 2002.
LibreCat
 
[68]
2002 | Conference Paper | LibreCat-ID: 39393
Dangelmeier W, Darnedde C, Flake S, Müller W, Pape U. Graphische Spezifikation und Echtzeitverifikation von Produktionsautomatisierungssystemen. Published online 2002.
LibreCat
 
[67]
2002 | Conference Paper | LibreCat-ID: 39382
Müller W, Dömer R, Gerstlauer A. The Formal Execution Semantics of SpecC. In: Proceedings of the ISSS02. ; 2002. doi:10.1145/581199.581234
LibreCat | DOI
 
[66]
2002 | Conference Paper | LibreCat-ID: 39387
Plomp J, Schäfer R, Müller W. Comparing Transcoding Tools for Use with a Generic User Interface Format. In: Proceedings of the Extreme Markup Languages 2002. ; 2002.
LibreCat
 
[65]
2002 | Conference Paper | LibreCat-ID: 39403
Flake S, Müller W. Specification of Real-Time Properties for UML Models. In: Proceedings of HICSS-35. ; 2002. doi:10.1109/HICSS.2002.994469
LibreCat | DOI
 
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