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84 Publications
2024 | Conference Paper | LibreCat-ID: 52744
Jafarzadeh, Hanieh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Time and Space Optimized Storage-Based BIST under Multiple Voltages and Variations.” In European Test Symposium, The Hague, Netherlands, May 20-24, 2024, 6. IEEE, n.d.
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2024 | Conference Paper | LibreCat-ID: 52742
Jafarzadeh, Hanieh, Florian Klemme, Hussam Amrouch, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Vmin Testing under Variations: Defect vs. Fault Coverage.” In IEEE Latin American Test Symposium (LATS), Maceió, Brazil, April 9-12, 2024, 6. IEEE, n.d.
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2024 | Conference Paper | LibreCat-ID: 52743
Hellebrand, Sybille, Somayeh Sadeghi-Kohan, and Hans-Joachim Wunderlich. “Functional Safety and Reliability of Interconnects throughout the Silicon Life Cycle.” In International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, 1, n.d.
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2024 | Conference Paper | LibreCat-ID: 52745
Wunderlich, Hans-Joachim, Hanieh Jafarzadeh, and Sybille Hellebrand. “Robust Test of Small Delay Faults under PVT-Variations.” In International Symposium of EDA (ISEDA), Xi’an, China, May 10-13, 2024, 1, n.d.
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2023 | Conference Paper | LibreCat-ID: 46739
Sadeghi-Kohan, Somayeh, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication.” In 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W). IEEE, 2023. https://doi.org/10.1109/dsn-w58399.2023.00056.
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2023 | Conference Paper | LibreCat-ID: 46738
Sadeghi-Kohan, Somayeh, Jan Dennis Reimer, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Optimizing the Streaming of Sensor Data with Approximate Communication.” In IEEE Asian Test Symposium (ATS’23), October 2023. Beijing, China, 2023.
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2023 | Conference Paper | LibreCat-ID: 45830
Jafarzadeh, Hanieh, Florian Klemme, Jan Dennis Reimer, Zahra Paria Najafi Haghi, Hussam Amrouch, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Robust Pattern Generation for Small Delay Faults under Process Variations.” In IEEE International Test Conference (ITC’23), Anaheim, USA, October 2023. Anaheim, CA, USA: IEEE, 2023.
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2020 | Conference Paper | LibreCat-ID: 19422
Sprenger, Alexander, Somayeh Sadeghi-Kohan, Jan Dennis Reimer, and Sybille Hellebrand. “Variation-Aware Test for Logic Interconnects Using Neural Networks - A Case Study.” In IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’20), October 2020. Virtual Conference - Originally Frascati (Rome), Italy, 2020.
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2020 | Conference Paper | LibreCat-ID: 29200
Sadeghi-Kohan, Somayeh, and Sybille Hellebrand. “Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects.” In 38th IEEE VLSI Test Symposium (VTS). Virtual Conference - Originally San Diego, CA, USA: IEEE, 2020. https://doi.org/10.1109/vts48691.2020.9107591.
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2020 | Conference Paper | LibreCat-ID: 19421
Holst, Stefan, Matthias Kampmann, Alexander Sprenger, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich, and Xiaoqing Weng. “Logic Fault Diagnosis of Hidden Delay Defects.” In IEEE International Test Conference (ITC’20), November 2020. Virtual Conference - Originally Washington, DC, USA, 2020.
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2019 | Conference Paper | LibreCat-ID: 12918
Maaz, Mohammad Urf, Alexander Sprenger, and Sybille Hellebrand. “A Hybrid Space Compactor for Adaptive X-Handling.” In 50th IEEE International Test Conference (ITC), 1–8. Washington, DC, USA: IEEE, 2019.
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2018 | Conference Paper | LibreCat-ID: 29460
Rezaeizadeh Rookerd, Ramin, Somayeh Sadeghi-Kohan, and Zainalabedin Navabi. “Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture.” In Proceedings of the 2018 on Great Lakes Symposium on VLSI. ACM, 2018. https://doi.org/10.1145/3194554.3194599.
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2018 | Conference Paper | LibreCat-ID: 4575
Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” In 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Budapest, Hungary: IEEE, 2018. https://doi.org/10.1109/ddecs.2018.00020.
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2018 | Conference Paper | LibreCat-ID: 10575
Liu, Chang, Eric Schneider, Matthias Kampmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Extending Aging Monitors for Early Life and Wear-Out Failure Prevention.” In 27th IEEE Asian Test Symposium (ATS’18), 2018. https://doi.org/10.1109/ats.2018.00028.
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2018 | Conference Paper | LibreCat-ID: 29459
Sadeghi-Kohan, Somayeh, Arash Vafaei, and Zainalabedin Navabi. “Near-Optimal Node Selection Procedure for Aging Monitor Placement.” In 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS). IEEE, 2018. https://doi.org/10.1109/iolts.2018.8474120.
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2017 | Conference Paper | LibreCat-ID: 12973
Deshmukh, Jyotirmoy, Wolfgang Kunz, Hans-Joachim Wunderlich, and Sybille Hellebrand. “Special Session on Early Life Failures.” In 35th IEEE VLSI Test Symposium (VTS’17). Caesars Palace, Las Vegas, Nevada, USA: IEEE, 2017. https://doi.org/10.1109/vts.2017.7928933.
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2017 | Conference Paper | LibreCat-ID: 10576
Kampmann, Matthias, and Sybille Hellebrand. “Design-for-FAST: Supporting X-Tolerant Compaction during Faster-than-at-Speed Test.” In 20th IEEE International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS’17). IEEE, 2017. https://doi.org/10.1109/ddecs.2017.7934564.
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2017 | Conference Paper | LibreCat-ID: 29463
Jenihhin, Maksim, Alexander Kamkin, Zainalabedin Navabi, and Somayeh Sadeghi-Kohan. “Universal Mitigation of NBTI-Induced Aging by Design Randomization.” In 2016 IEEE East-West Design & Test Symposium (EWDTS). IEEE, 2017. https://doi.org/10.1109/ewdts.2016.7807635.
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2016 | Conference Paper | LibreCat-ID: 12975
Kampmann, Matthias, and Sybille Hellebrand. “X Marks the Spot: Scan-Flip-Flop Clustering for Faster-than-at-Speed Test.” In 25th IEEE Asian Test Symposium (ATS’16), 1–6. Hiroshima, Japan: IEEE, 2016. https://doi.org/10.1109/ats.2016.20.
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2015 | Conference Paper | LibreCat-ID: 12976
Kampmann, Matthias, Michael A. Kochte, Eric Schneider, Thomas Indlekofer, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Optimized Selection of Frequencies for Faster-Than-at-Speed Test.” In 24th IEEE Asian Test Symposium (ATS’15), 109–14. Mumbai, India: IEEE, 2015. https://doi.org/10.1109/ats.2015.26.
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2015 | Conference Paper | LibreCat-ID: 29465
Sadeghi-Kohan, Somayeh, Arezoo Kamran, Farnaz Forooghifar, and Zainalabedin Navabi. “Aging in Digital Circuits and Age Monitoring: Object-Oriented Modeling and Evaluation.” In 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). IEEE, 2015. https://doi.org/10.1109/dtis.2015.7127373.
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2015 | Conference Paper | LibreCat-ID: 29466
Sadeghi-Kohan, Somayeh, Mehdi Kamal, John McNeil, Paolo Prinetto, and Zain Navabi. “Online Self Adjusting Progressive Age Monitoring of Timing Variations.” In 2015 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS). IEEE, 2015. https://doi.org/10.1109/dtis.2015.7127368.
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2014 | Conference Paper | LibreCat-ID: 12977
Hellebrand, Sybille, Thomas Indlekofer, Matthias Kampmann, Michael A. Kochte, Chang Liu, and Hans-Joachim Wunderlich. “FAST-BIST: Faster-than-at-Speed BIST Targeting Hidden Delay Defects.” In IEEE International Test Conference (ITC’14). Seattle, Washington, USA: IEEE, 2014. https://doi.org/10.1109/test.2014.7035360.
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2014 | Conference Paper | LibreCat-ID: 46268
Mohammadi, Marzieh, Somayeh Sadeghi-Kohan, Nasser Masoumi, and Zainalabedin Navabi. “An Off-Line MDSI Interconnect BIST Incorporated in BS 1149.1.” In 2014 19th IEEE European Test Symposium (ETS). IEEE, 2014. https://doi.org/10.1109/ets.2014.6847847.
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2014 | Conference Paper | LibreCat-ID: 46267
Sadeghi-Kohan, Somayeh, Payman Behnam, Bijan Alizadeh, Masahiro Fujita, and Zainalabedin Navabi. “Improving Polynomial Datapath Debugging with HEDs.” In 2014 19th IEEE European Test Symposium (ETS). IEEE, 2014. https://doi.org/10.1109/ets.2014.6847797.
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2013 | Conference Paper | LibreCat-ID: 12979
Hellebrand, Sybille. “Analyzing and Quantifying Fault Tolerance Properties.” In 14th IEEE Latin American Test Workshop - (LATW’13). Cordoba, Argentina: IEEE, 2013. https://doi.org/10.1109/latw.2013.6562662.
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2013 | Conference Paper | LibreCat-ID: 46271
Sadeghi-Kohan, Somayeh, Majid Namaki-Shoushtari, Fatemeh Javaheri, and Zainalabedin Navabi. “BS 1149.1 Extensions for an Online Interconnect Fault Detection and Recovery.” In 2012 IEEE International Test Conference. IEEE, 2013. https://doi.org/10.1109/test.2012.6401583.
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2013 | Conference Paper | LibreCat-ID: 46270
Sadeghi-Kohan, Somayeh, Shahrzad Keshavarz, Farzaneh Zokaee, Farimah Farahmandi, and Zainalabedin Navabi. “A New Structure for Interconnect Offline Testing.” In East-West Design & Test Symposium (EWDTS 2013). IEEE, 2013. https://doi.org/10.1109/ewdts.2013.6673207.
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2012 | Conference Paper | LibreCat-ID: 12980
Cook, Alejandro, Sybille Hellebrand, Michael E. Imhof, Abdullah Mumtaz, and Hans-Joachim Wunderlich. “Built-in Self-Diagnosis Targeting Arbitrary Defects with Partial Pseudo-Exhaustive Test.” In 13th IEEE Latin American Test Workshop (LATW’12), 1–4. Quito, Ecuador: IEEE, 2012. https://doi.org/10.1109/latw.2012.6261229.
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2012 | Conference Paper | LibreCat-ID: 12981
Cook, Alejandro, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Built-in Self-Diagnosis Exploiting Strong Diagnostic Windows in Mixed-Mode Test.” In 17th IEEE European Test Symposium (ETS’12), 1–6. Annecy, France: IEEE, 2012. https://doi.org/10.1109/ets.2012.6233025.
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2011 | Conference Paper | LibreCat-ID: 12982
Cook, Alejandro, Sybille Hellebrand, Thomas Indlekofer, and Hans-Joachim Wunderlich. “Diagnostic Test of Robust Circuits.” In 20th IEEE Asian Test Symposium (ATS’11), 285–90. New Delhi, India: IEEE, 2011. https://doi.org/10.1109/ats.2011.55.
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2011 | Conference Paper | LibreCat-ID: 12984
Polian, Ilia, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, and Peter Maxwell. “Towards Variation-Aware Test Methods.” In 16th IEEE European Test Symposium Trondheim (ETS’11). Trondheim, Norway: IEEE, 2011. https://doi.org/10.1109/ets.2011.51.
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2011 | Conference Paper | LibreCat-ID: 13053
Cook, Alejandro, Sybille Hellebrand, Thomas Indlekofer, and Hans-Joachim Wunderlich. “Robuster Selbsttest Mit Diagnose.” In 5. GMM/GI/ITG Fachtagung “Zuverlässigkeit Und Entwurf,” 48–53. Hamburg, Germany, 2011.
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2011 | Conference Paper | LibreCat-ID: 46272
Kamran, Arezoo, Nastaran Nemati, Somayeh Sadeghi-Kohan, and Zainalabedin Navabi. “Virtual Tester Development Using HDL/PLI.” In 2010 East-West Design & Test Symposium (EWDTS). IEEE, 2011. https://doi.org/10.1109/ewdts.2010.5742156.
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2010 | Conference Paper | LibreCat-ID: 12987
Becker, Bernd, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” In 40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10). Chicago, IL, USA: IEEE, 2010. https://doi.org/10.1109/dsnw.2010.5542612.
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2010 | Conference Paper | LibreCat-ID: 13051
Hunger, Marc, and Sybille Hellebrand. “Ausbeute Und Fehlertoleranz Bei Dreifach Modularer Redundanz.” In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 81–88. Wildbad Kreuth, Germany, 2010.
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2010 | Conference Paper | LibreCat-ID: 12983
Hopsch, Fabian, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Variation-Aware Fault Modeling.” In 19th IEEE Asian Test Symposium (ATS’10), 87–93. Shanghai, China: IEEE, 2010. https://doi.org/10.1109/ats.2010.24.
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2010 | Conference Paper | LibreCat-ID: 12985
Indlekofer, Thomas, Michael Schnittger, and Sybille Hellebrand. “Efficient Test Response Compaction for Robust BIST Using Parity Sequences.” In 28th IEEE International Conference on Computer Design (ICCD’10), 480–85. Amsterdam, The Netherlands: IEEE, 2010. https://doi.org/10.1109/iccd.2010.5647648.
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2010 | Conference Paper | LibreCat-ID: 12986
Hunger, Marc, and Sybille Hellebrand. “The Impact of Manufacturing Defects on the Fault Tolerance of TMR-Systems.” In 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10), 101–8. Kyoto, Japan: IEEE, 2010. https://doi.org/10.1109/dft.2010.19.
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2010 | Conference Paper | LibreCat-ID: 12988
Froese, Viktor, Rüdiger Ibers, and Sybille Hellebrand. “Reusing NoC-Infrastructure for Test Data Compression.” In 28th IEEE VLSI Test Symposium (VTS’10), 227–31. Santa Cruz, CA, USA: IEEE, 2010. https://doi.org/10.1109/vts.2010.5469570.
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2010 | Conference Paper | LibreCat-ID: 13049
Becker, Bernd, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, and Hans-Joachim Wunderlich. “Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits.” In 4th Workshop on Dependable and Secure Nanocomputing (WDSN’10), (Invited Paper). Chicago, IL, USA, 2010.
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2010 | Conference Paper | LibreCat-ID: 13050
Indlekofer, Thomas, Michael Schnittger, and Sybille Hellebrand. “Robuster Selbsttest Mit Extremer Kompaktierung.” In 4. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf,” 17–24. Wildbad Kreuth, Germany, 2010.
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2009 | Conference Paper | LibreCat-ID: 12991
Hunger, Marc, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, and Bernd Becker. “ATPG-Based Grading of Strong Fault-Secureness.” In 15th IEEE International On-Line Testing Symposium (IOLTS’09. Sesimbra-Lisbon, Portugal: IEEE, 2009. https://doi.org/10.1109/iolts.2009.5196027.
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2009 | Conference Paper | LibreCat-ID: 12990
Hellebrand, Sybille, and Marc Hunger. “Are Robust Circuits Really Robust?” In 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’09), (Invited Talk), 77. Chicago, IL, USA: IEEE, 2009. https://doi.org/10.1109/dft.2009.28.
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2009 | Conference Paper | LibreCat-ID: 13030
Hunger, Marc, Sybille Hellebrand, Alexander Czutro, Ilia Polian, and Bernd Becker. “Robustheitsanalyse Stark Fehlersicherer Schaltungen Mit SAT-Basierter Testmustererzeugung.” In 3. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Stuttgart, Germany, 2009.
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2008 | Conference Paper | LibreCat-ID: 12992
Oehler, Philipp, Alberto Bosio, Giorgio di Natale, and Sybille Hellebrand. “A Modular Memory BIST for Optimized Memory Repair.” In 14th IEEE International On-Line Testing Symposium (IOLTS’08), (Poster). Rhodos, Greece: IEEE, 2008. https://doi.org/10.1109/iolts.2008.30.
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2008 | Conference Paper | LibreCat-ID: 12994
Amgalan, Uranmandakh, Christian Hachmann, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Signature Rollback - A Technique for Testing Robust Circuits.” In 26th IEEE VLSI Test Symposium (VTS’08), 125–30. San Diego, CA, USA: IEEE, 2008. https://doi.org/10.1109/vts.2008.34.
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2008 | Conference Paper | LibreCat-ID: 12993
Hunger, Marc, and Sybille Hellebrand. “Verification and Analysis of Self-Checking Properties through ATPG.” In 14th IEEE International On-Line Testing Symposium (IOLTS’08). Rhodos, Greece: IEEE, 2008. https://doi.org/10.1109/iolts.2008.32.
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2008 | Conference Paper | LibreCat-ID: 13031
Hunger, Marc, and Sybille Hellebrand. “Analyse Selbstprüfender Schaltungen – Nachweis von Fehlersicherheit Und Selbsttestbarkeit Mit ATPG.” In 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Ingolstadt, Germany, 2008.
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2008 | Conference Paper | LibreCat-ID: 13032
Oehler, Philipp, Alberto Bosio, Giorgio Di Natale, and Sybille Hellebrand. “Modularer Selbsttest Und Optimierte Reparaturanalyse.” In 2. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Ingolstadt, Germany, 2008.
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2007 | Conference Paper | LibreCat-ID: 12995
Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “A Refined Electrical Model for Particle Strikes and Its Impact on SEU Prediction.” In 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT’07), 50–58. Rome, Italy: IEEE, 2007. https://doi.org/10.1109/dft.2007.43.
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2007 | Conference Paper | LibreCat-ID: 12996
Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair.” In 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07), 185–90. Krakow, Poland: IEEE, 2007. https://doi.org/10.1109/ddecs.2007.4295278.
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2007 | Conference Paper | LibreCat-ID: 12997
Oehler, Philipp, Sybille Hellebrand, and Hans-Joachim Wunderlich. “An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy.” In 12th IEEE European Test Symposium (ETS’07), 91–96. Freiburg, Germany: IEEE, 2007. https://doi.org/10.1109/ets.2007.10.
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2007 | Conference Paper | LibreCat-ID: 13037
Hellebrand, Sybille, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, and Bernd Straube. “Testing and Monitoring Nanoscale Systems - Challenges and Strategies for Advanced Quality Assurance.” In 43rd International Conference on Microelectronics, Devices and Material with the Workshop on Electronic Testing (MIDEM’07), (Invited Paper). Bled, Slovenia, 2007.
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2007 | Conference Paper | LibreCat-ID: 13040
Ali, Muhammad, Michael Welzl, Sven Hessler, and Sybille Hellebrand. “A Fault Tolerant Mechanism for Handling Permanent and Transient Failures in a Network on Chip.” In 4th International Conference on Information Technology: New Generations (ITNG’07), 1027–32. Las Vegas, Nevada, USA, 2007.
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2007 | Conference Paper | LibreCat-ID: 13041
Becker, Bernd, Ilia Polian, Sybille Hellebrand, Bernd Straube, and Hans-Joachim Wunderlich. “Test Und Zuverlässigkeit Nanoelektronischer Systeme.” In 1. GMM/GI/ITG-Fachtagung “Zuverlässigkeit Und Entwurf.” Munich, Germany, 2007.
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2005 | Conference Paper | LibreCat-ID: 12999
Ali, Muhammad, Michael Welzl, Martin Zwicknagl, and Sybille Hellebrand. “Considerations for Fault-Tolerant Networks on Chips.” In IEEE International Conference on Microelectronics (ICM’05). Islamabad, Pakistan: IEEE, 2005. https://doi.org/10.1109/icm.2005.1590063.
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2005 | Conference Paper | LibreCat-ID: 13000
Oehler, Philipp, and Sybille Hellebrand. “Low Power Embedded DRAMs with High Quality Error Correcting Capabilities.” In 10th IEEE European Test Symposium (ETS’05), 148–53. Tallinn, Estonia: IEEE, 2005. https://doi.org/10.1109/ets.2005.28.
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2005 | Conference Paper | LibreCat-ID: 12998
Ali, Muhammad, Michael Welzl, and Sybille Hellebrand. “A Dynamic Routing Mechanism for Network on Chip.” In 23rd IEEE NORCHIP Conference, 70–73. Oulu, Finland: IEEE, 2005. https://doi.org/10.1109/norchp.2005.1596991.
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2004 | Conference Paper | LibreCat-ID: 13071
Liu Jing, Michelle, Stefan Ruehrup, Christian Schindelhauer, Klaus Volbert, Martin Dierkes, Andreas Bellgardt, Rüdiger Ibers, and Ulrich Hilleringmann. “Sensor Networks with More Features Using Less Hardware.” In {GOR/NGB Conference Tilburg 2004}. Tilburg, Netherlands, 2004.
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2004 | Conference Paper | LibreCat-ID: 13001
Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “Data Compression for Multiple Scan Chains Using Dictionaries with Corrections.” In IEEE International Test Conference (ITC’04), 926–35. Charlotte, NC, USA: IEEE, 2004. https://doi.org/10.1109/test.2004.1387357.
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2003 | Conference Paper | LibreCat-ID: 13002
Wuertenberger, Armin, Christofer S. Tautermann, and Sybille Hellebrand. “A Hybrid Coding Strategy for Optimized Test Data Compression.” In IEEE International Test Conference (ITC’03), 451–59. Charlotte, NC, USA: IEEE, 2003. https://doi.org/10.1109/test.2003.1270870.
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2001 | Conference Paper | LibreCat-ID: 13004
Liang, Hua-Guo, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST.” In IEEE International Test Conference (ITC’01), 894–902. Baltimore, MD, USA: IEEE, 2001. https://doi.org/10.1109/test.2001.966712.
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2000 | Conference Paper | LibreCat-ID: 13005
Hellebrand, Sybille, Hua-Guo Liang, and Hans-Joachim Wunderlich. “A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters.” In IEEE International Test Conference (ITC’00), 778–84. Atlantic City, NJ, USA: IEEE, 2000. https://doi.org/10.1109/test.2000.894274.
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1999 | Conference Paper | LibreCat-ID: 13006
Hellebrand, Sybille, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, and Vyacheslav N. Yarmolik. “Error Detecting Refreshment for Embedded DRAMs.” In 17th IEEE VLSI Test Symposium (VTS’99), 384–90. Dana Point, CA, USA: IEEE, 1999. https://doi.org/10.1109/vtest.1999.766693.
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1999 | Conference Paper | LibreCat-ID: 13066
N. Yarmolik, Vyacheslav, Iuri V. Bykov, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms.” In Third European Dependable Computing Conference (EDCC-3). Prague, Czech Republic, 1999.
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1999 | Conference Paper | LibreCat-ID: 13067
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Symmetric Transparent BIST for RAMs.” In Design Automation and Test in Europe (DATE’99), 702–7. Munich, Germany, 1999.
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1998 | Conference Paper | LibreCat-ID: 13007
Hertwig, Andre, Sybille Hellebrand, and Hans-Joachim Wunderlich. “Fast Self-Recovering Controllers.” In 16th IEEE VLSI Test Symposium (VTS’98), 296–302. Monterey, CA, USA: IEEE, 1998. https://doi.org/10.1109/vtest.1998.670883.
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1998 | Conference Paper | LibreCat-ID: 13008
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Vyacheslav N. Yarmolik. “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs.” In Design Automation and Test in Europe (DATE’98), 173–79. Paris, France, 1998. https://doi.org/10.1109/date.1998.655853.
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1998 | Conference Paper | LibreCat-ID: 13063
N. Yarmolik, Vyacheslav, Yuri V. Klimets, Sybille Hellebrand, and Hans-Joachim Wunderlich. “New Transparent RAM BIST Based on Self-Adjusting Output Data Compression.” In Design & Diagnostics of Electronic Circuits & Systems (DDECS’98), 27–33. Szczyrk, Poland, 1998.
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1997 | Conference Paper | LibreCat-ID: 13009
Tsai, Kun-Han, Sybille Hellebrand, Malgorzata Marek-Sadowska, and Janusz Rajski. “STARBIST: Scan Autocorrelated Random Pattern Generation.” In 34th ACM/IEEE Design Automation Conference (DAC’97). Anaheim, CA, USA: IEEE, 1997. https://doi.org/10.1109/dac.1997.597194.
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1996 | Conference Paper | LibreCat-ID: 13010
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Andre Hertwig. “Mixed-Mode BIST Using Embedded Processors.” In IEEE International Test Conference (ITC’96), 195–204. Washington, DC, USA: IEEE, 1996. https://doi.org/10.1109/test.1996.556962.
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1995 | Conference Paper | LibreCat-ID: 13012
Hellebrand, Sybille, Birgit Reeb, Steffen Tarnick, and Hans-Joachim Wunderlich. “Pattern Generation for a Deterministic BIST Scheme.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’95), 88–94. San Jose, CA, USA: IEEE, 1995. https://doi.org/10.1109/iccad.1995.479997.
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1994 | Conference Paper | LibreCat-ID: 13014
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures.” In ACM/IEEE International Conference on Computer-Aided Design (ICCAD’94), 110–16. San Jose, CA, USA: IEEE, 1994. https://doi.org/10.1109/iccad.1994.629752.
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| DOI
1994 | Conference Paper | LibreCat-ID: 13059
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthese Schneller Selbsttestbarer Steuerwerke.” In Tagungsband Der GI/GME/ITG-Fachtagung \& Rechnergestützter Entwurf Und Architektur Mikroelektronischer Systeme, 3–11. Oberwiesenthal, Informatik Xpress 4, TU Chemnitz Zwickau, Germany, 1994.
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1994 | Conference Paper | LibreCat-ID: 13013
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthesis of Self-Testable Controllers.” In European Design and Test Conference (EDAC/ETC/EUROASIC), 580–85. Paris, France, 1994. https://doi.org/10.1109/edtc.1994.326815.
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| DOI
1993 | Conference Paper | LibreCat-ID: 13015
Venkataraman, Srikanth, Janusz Rajski, Sybille Hellebrand, and Steffen Tarnick. “An Efficient Bist Scheme Based On Reseeding Of Multiple Polynomial Linear Feedback Shift Registers.” In ACM/IEEE International Conference on Computer Aided Design (ICCAD’93). IEEE, 1993. https://doi.org/10.1109/iccad.1993.580117.
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1992 | Conference Paper | LibreCat-ID: 13016
Hellebrand, Sybille, Steffen Tarnick, Janusz Rajski, and Bernard Courtois. “Generation of Vector Patterns through Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” In IEEE International Test Conference (ITC’92), 120–29. Baltimore, MD, USA: IEEE, 1992. https://doi.org/10.1109/test.1992.527812.
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1990 | Conference Paper | LibreCat-ID: 13018
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Tools and Devices Supporting the Pseudo-Exhaustive Test.” In European Design Automation Conference (EDAC’90), 13–17. Glasgow, UK: IEEE, 1990. https://doi.org/10.1109/edac.1990.136612.
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1990 | Conference Paper | LibreCat-ID: 13019
Hellebrand, Sybille, Hans-Joachim Wunderlich, and Oliver F. Haberl. “Generating Pseudo-Exhaustive Vectors for External Testing.” In IEEE International Test Conference (ITC’90), 670–79. Washington, DC, USA: IEEE, 1990. https://doi.org/10.1109/test.1990.114082.
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| DOI
1989 | Conference Paper | LibreCat-ID: 13020
Wunderlich, Hans-Joachim, and Sybille Hellebrand. “The Pseudo-Exhaustive Test of Sequential Circuits.” In IEEE International Test Conference (ITC’89), 19–27. Washington, DC, USA: IEEE, 1989. https://doi.org/10.1109/test.1989.82273.
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1988 | Conference Paper | LibreCat-ID: 13021
Wunderlich, Hans-Joachim, and Sybille Hellebrand. “Generating Pattern Sequences for the Pseudo-Exhaustive Test of MOS-Circuits.” In 18th International Symposium on Fault-Tolerant Computing, FTCS-18, 36–45. Tokyo, Japan, 1988. https://doi.org/10.1109/ftcs.1988.5294.
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| DOI
1988 | Conference Paper | LibreCat-ID: 13058
Schmid, Detlef, Hans-Joachim Wunderlich, Fridtjof Feldbusch, Sybille Hellebrand, Juergen Holzinger, and Arno Kunzmann. “Integrated Tools for Automatic Design for Testability.” In Tool Integration and Design Environments, F.J. Rammig (Editor), 233–58. Amsterdam, The Netherlands: Amsterdam: Elsevier Science Publishers B.V.(North Holland), IFIP, 1988.
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1988 | Conference Paper | LibreCat-ID: 13062
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Automatisierung Des Entwurfs Vollständig Testbarer Schaltungen.” In GI - 18. Jahrestagung II, Hamburg, 1988, Informatik-Fachberichte 188, 145–59. Hamburg, Germany: Springer Verlag, 1988.
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